公开(公告)号：US20050045937A1

公开(公告)日：2005-03-03

申请号：US10654376

申请日：2003-09-03

申请人： Ulrich Egger ,  Haoren Zhuang ,  George Stojakovic ,  Kazuhiro Tomioka

发明人： Ulrich Egger ,  Haoren Zhuang ,  George Stojakovic ,  Kazuhiro Tomioka

IPC分类号： H01L21/02 ,  H01L21/3213 ,  H01L21/8246 ,  H01L21/00 ,  H01L21/8242 ,  H01L27/108 ,  H01L29/76 ,  H01L31/119

CPC分类号： H01L28/60 ,  H01L21/32136 ,  H01L27/11507 ,  H01L28/55 ,  H01L28/75

摘要： An Iridium barrier layer is between a contact plug and a bottom electrode of a capacitor. Etching is performed to pattern the bottom electrode and barrier layer using a fluorine-based recipe resulting in the formation of a first fence clinging to the sidewalls. Next the remaining barrier layer is etched using a CO-based recipe. A second fence is formed clinging to and structurally supported by the first fence. At the same time, the CO-based recipe etches away a substantial portion of the first fence to remove the structural support provided to the second fence. The second fence is therefore lifted-off from the sidewalls leaving the sidewalls substantially free of clinging fences. The etched barrier layer has a sidewall transition. The sidewalls have a relatively low taper angle above the sidewall transition and a relatively steep taper angle below the sidewall transition.

摘要翻译： 铱屏障层位于电容器的接触插塞和底部电极之间。 进行蚀刻以使用氟基配方对底部电极和阻挡层进行图案化，从而形成紧贴在侧壁上的第一栅栏。 接下来，使用基于CO的配方蚀刻剩余的阻挡层。 第二个围栏是由第一个围栏固定在结构上。 同时，基于CO的配方消除了第一篱笆的大部分，以移除提供给第二篱笆的结构支撑。 因此，第二围栏从侧壁脱离，留下侧壁基本上没有附着的栅栏。 蚀刻的阻挡层具有侧壁过渡。 侧壁在侧壁过渡之上具有相对较低的锥角，并且在侧壁过渡之下具有相对较陡的锥角。

公开(公告)号：US07071506B2

公开(公告)日：2006-07-04

申请号：US10655757

申请日：2003-09-05

申请人： Bum-Ki Moon ,  Karl Hornik ,  Haoren Zhuang ,  Ulrich Egger ,  Jenny Lian ,  Andreas Hilliger

发明人： Bum-Ki Moon ,  Karl Hornik ,  Haoren Zhuang ,  Ulrich Egger ,  Jenny Lian ,  Andreas Hilliger

IPC分类号： H01L29/76

CPC分类号： H01L28/57 ,  H01L27/0805 ,  H01L27/11507

摘要： A ferroelectric capacitor device comprises a substrate, a contact plug passing through the substrate, a first electrode formed on the substrate, the first electrode being electrically connected to said plug, a ferroelectric layer formed on the first electrode, a second electrode formed on the ferroelectric layer, one or more first encapsulation layers on the second electrode, the encapsulation layers extending over the device, and one or more hydrogen storage material layers on the encapsulation layers. One or more second encapsulation layers may be formed on the one or more hydrogen storage material layers.

摘要翻译： 铁电电容器装置包括基板，穿过基板的接触插塞，形成在基板上的第一电极，第一电极电连接到所述插头，形成在第一电极上的铁电层，形成在铁电体上的第二电极 层，在第二电极上的一个或多个第一封装层，在器件上延伸的封装层以及封装层上的一个或多个储氢材料层。 一个或多个第二封装层可以形成在一个或多个储氢材料层上。

公开(公告)号：US20050067643A1

公开(公告)日：2005-03-31

申请号：US10676360

申请日：2003-09-30

申请人： Haoren Zhuang ,  Ulrich Egger

发明人： Haoren Zhuang ,  Ulrich Egger

IPC分类号： H01L21/02 ,  H01L21/033 ,  H01L21/311 ,  H01L21/3213 ,  H01L29/76

CPC分类号： H01L28/60 ,  H01L21/0337 ,  H01L21/31144 ,  H01L21/32139 ,  H01L28/55

摘要： A ferroelectric capacitor device, such as an FeRAM device is formed by forming a substrate extending in a first plane and comprising a number of layers of material, forming a hard mask layer on the substrate and forming a first layer of a first material on the hard mask layer. The hard mask shape is then defined by etching the hard mask layer. A second layer of the first material is deposited on the etched hard mask layer. The deposited second layer has one or more side surfaces extending substantially perpendicular to the plane of the substrate. The second layer and the number of layers forming the substrate are then etched to shape the ferroelectric capacitor device.

摘要翻译： 诸如FeRAM器件的铁电电容器器件通过形成在第一平面中延伸并且包括多个材料层的衬底形成，在衬底上形成硬掩模层，并在硬质层上形成第一材料的第一层 掩模层。 然后通过蚀刻硬掩模层来限定硬掩模形状。 第一材料的第二层沉积在蚀刻的硬掩模层上。 沉积的第二层具有基本上垂直于衬底的平面延伸的一个或多个侧表面。 然后蚀刻第二层和形成衬底的层数，以形成铁电电容器器件。

公开(公告)号：US06734057B2

公开(公告)日：2004-05-11

申请号：US10260229

申请日：2002-09-27

申请人： Jenny Lian ,  Haoren Zhuang ,  Ulrich Egger ,  Karl Hornik

发明人： Jenny Lian ,  Haoren Zhuang ,  Ulrich Egger ,  Karl Hornik

IPC分类号： H01L218242

CPC分类号： H01L28/55 ,  H01L21/31122

摘要： A method of forming a ferroelectric capacitor, in particular for use in a FeRAM or high-k DRAM application, and a capacitor made by the method. The method comprises forming a first layer which is patterned, for example by a reactive ion etching method. A ferroelectric material is then formed over the patterned first layer. The morphology of the ferroelectric material will be dependent upon the patterning of the first layer. The ferroeletric layer is then patterned, for example using a wet etching or a reactive ion etching method. The etching will depend upon the morphology of the ferroelectric layer. After etching the ferroelectric layer, a conductive layer is provided over the ferroelectric layer to form a first electrode of the capacitor. If the first layer is a conductive layer, this forms the second electrode. If the first layer is a non-conductive layer, the conductive layer is patterned to form both the first and second electrodes.

摘要翻译： 形成铁电电容器的方法，特别是用于FeRAM或高k DRAM应用的方法，以及由该方法制成的电容器。 该方法包括形成图案化的第一层，例如通过反应离子蚀刻方法。 然后在图案化的第一层上形成铁电材料。 铁电材料的形态将取决于第一层的图案化。 然后将铁素体层图案化，例如使用湿蚀刻或反应离子蚀刻方法。 蚀刻将取决于铁电层的形态。 在对铁电体层进行蚀刻之后，在铁电层上设置导电层，形成电容器的第一电极。 如果第一层是导电层，则形成第二电极。 如果第一层是非导电层，则导电层被图案化以形成第一和第二电极。

公开(公告)号：US07015049B2

公开(公告)日：2006-03-21

申请号：US10654376

申请日：2003-09-03

申请人： Ulrich Egger ,  Haoren Zhuang ,  George Stojakovic ,  Kazuhiro Tomioka

发明人： Ulrich Egger ,  Haoren Zhuang ,  George Stojakovic ,  Kazuhiro Tomioka

IPC分类号： H01L21/00

CPC分类号： H01L28/60 ,  H01L21/32136 ,  H01L27/11507 ,  H01L28/55 ,  H01L28/75

摘要： An Iridium barrier layer is between a contact plug and a bottom electrode of a capacitor. Etching is performed to pattern the bottom electrode and barrier layer using a fluorine-based recipe resulting in the formation of a first fence clinging to the sidewalls. Next the remaining barrier layer is etched using a CO-based recipe. A second fence is formed clinging to and structurally supported by the first fence. At the same time, the CO-based recipe etches away a substantial portion of the first fence to remove the structural support provided to the second fence. The second fence is therefore lifted-off from the sidewalls leaving the sidewalls substantially free of clinging fences. The etched barrier layer has a sidewall transition. The sidewalls have a relatively low taper angle above the sidewall transition and a relatively steep taper angle below the sidewall transition.

摘要翻译： 铱屏障层位于电容器的接触插塞和底部电极之间。 进行蚀刻以使用氟基配方对底部电极和阻挡层进行图案化，从而形成紧贴在侧壁上的第一栅栏。 接下来，使用基于CO的配方蚀刻剩余的阻挡层。 第二个围栏是由第一个围栏固定在结构上。 同时，基于CO的配方消除了第一篱笆的大部分，以移除提供给第二篱笆的结构支撑。 因此，第二围栏从侧壁脱离，留下侧壁基本上没有附着的栅栏。 蚀刻的阻挡层具有侧壁过渡。 侧壁在侧壁过渡之上具有相对较低的锥角，并且在侧壁过渡之下具有相对较陡的锥角。

公开(公告)号：US20050084984A1

公开(公告)日：2005-04-21

申请号：US10678952

申请日：2003-10-02

申请人： Haoren Zhuang ,  Rainer Bruchhaus ,  Ulrich Egger ,  Jenny Lian ,  Nicolas Nagel

发明人： Haoren Zhuang ,  Rainer Bruchhaus ,  Ulrich Egger ,  Jenny Lian ,  Nicolas Nagel

IPC分类号： H01L21/02 ,  H01L21/8246 ,  H01L27/115 ,  H01L31/119

CPC分类号： H01L27/11502 ,  H01L27/11507 ,  H01L28/55

摘要： A vertical capacitor of an FeRAM device is formed by depositing conductive material and etching it to form electrodes, which are located over openings in an insulating layer so that they are electrically connected to lower levels of the structure. A layer of ferroelectric material is formed on the sides of the electrodes, and etched to a desired, uniform thickness. Conductive material is deposited over the ferroelectric material to form a uniform surface onto which another insulating layer can be deposited. Since this process does not include etching of an insulating layer at a time between the formation of the electrodes and the deposition of the ferroelectric material, no fences of insulating material are formed between them. The geometry can be accurately controlled, to give uniform electric fields and reliable operating parameters.

摘要翻译： FeRAM器件的垂直电容器通过沉积导电材料并进行蚀刻而形成，以形成位于绝缘层中的开口上方的电极，使得它们电连接到结构的较低层。 在电极的侧面形成铁电材料层，并且蚀刻到期望的均匀厚度。 导电材料沉积在铁电材料上以形成可沉积另一绝缘层的均匀表面。 由于该方法不包括在形成电极之间的时间刻蚀绝缘层和铁电体的沉积，所以在它们之间不形成绝缘材料栅栏。 几何形状可以精确控制，给出均匀的电场和可靠的工作参数。

公开(公告)号：US06867053B2

公开(公告)日：2005-03-15

申请号：US10629326

申请日：2003-07-28

申请人： Ulrich Egger ,  Haoren Zhuang ,  Rainer Bruchhaus

发明人： Ulrich Egger ,  Haoren Zhuang ,  Rainer Bruchhaus

IPC分类号： H01L21/02 ,  H01L21/311 ,  H01L21/3213 ,  H01L21/00 ,  H01L21/8234

CPC分类号： H01L28/55 ,  H01L21/31122 ,  H01L21/31144 ,  H01L21/32136 ,  H01L21/32139 ,  H01L28/65

摘要： A ferroelectric capacitor is fabricated using a noble metal hardmask. A hardmask is deposited on a top electrode of a capacitor stack comprising a ferroelectric layer sandwiched between the top electrode and a bottom electrode. The top electrode is patterned according to the pattern of the hardmask by etching at a first temperature. The top electrode serves as the noble metal hardmask and the ferroelectric layer is patterned according to the pattern of the top electrode at a second temperature lower than the first temperature, resulting in the top electrode having sidewalls beveled relative to a top surface of the top electrode etching. The bottom electrode is etched at a third temperature to form the capacitor.

摘要翻译： 使用贵金属硬掩模制造铁电电容器。 硬掩模沉积在电容器堆叠的顶部电极上，该电容器堆叠包括夹在顶部电极和底部电极之间的铁电层。 根据硬掩模的图案，通过在第一温度下蚀刻来对顶部电极进行图案化。 顶部电极用作贵金属硬掩模，并且铁电层根据顶部电极的图案在低于第一温度的第二温度下被图案化，导致顶部电极具有相对于顶部电极的顶表面倾斜的侧壁 蚀刻。 在第三温度下蚀刻底部电极以形成电容器。

公开(公告)号：US06762064B1

公开(公告)日：2004-07-13

申请号：US10417526

申请日：2003-04-17

申请人： Haoren Zhuang ,  Ulrich Egger ,  Kazuhiro Tomioka

发明人： Haoren Zhuang ,  Ulrich Egger ,  Kazuhiro Tomioka

IPC分类号： H01L2100

CPC分类号： H01L28/55 ,  H01L21/32139 ,  H01L27/11507 ,  H01L28/60

摘要： A process for the fabrication of a ferrocapacitor comprising depositing a first mask element 7 over a structure having a bottom electrode 1, a ferroelectric layer 3 and a top electrode 5. RIE etching is performed to remove portions of the top electrode 5 and the ferroelectric layer 3. Then a second hard mask element 9 is deposited over the first hardmask element. The second hard mask element is rounded by an etch back process, and its taper angle is controlled to be in the range 75-87°. A second RIE etching process is performed to remove portions of the bottom electrode 1. Due to the rounding of the second hard mask elements 9 low residues are formed on the sides of the etched bottom electrode 1.

摘要翻译： 一种用于制造铁电体的方法，包括在具有底部电极1，铁电体层3和顶部电极5的结构上沉积第一掩模元件7.进行RIE蚀刻以去除顶部电极5和铁电层的部分 然后，第二硬掩模元件9沉积在第一硬掩模元件上。 第二个硬掩模元件通过回蚀工艺圆化，其锥角控制在75-87°的范围内。 执行第二RIE蚀刻工艺以去除底部电极1的部分。由于第二硬掩模元件9的四舍五入，在蚀刻的底部电极1的侧面上形成低残留物。

公开(公告)号：US07098142B2

公开(公告)日：2006-08-29

申请号：US10377083

申请日：2003-02-26

申请人： Ulrich Egger ,  Haoren Zhuang ,  Rainer Bruchhaus

发明人： Ulrich Egger ,  Haoren Zhuang ,  Rainer Bruchhaus

IPC分类号： H01L21/302 ,  H01L21/461

CPC分类号： H01L21/32139 ,  H01L21/31122 ,  H01L21/32136 ,  H01L28/55 ,  H01L28/60

摘要： A method of etching a ferroelectric device 100 having a ferroelectric layer 112 between a top and a bottom electrode 114, 108 is disclosed herein. Hardmasks 116, 118 are deposited on the top electrode 114, two or more hardmasks being spaced apart by narrow first regions 115 and spaced apart from other hardmasks by wider second regions 117. The top electrode 114 and ferroelectric layer 112 are then etched to pattern the top electrode 114 thus forming capacitors 102, 104, and the bottom electrode 108 is etched by a process in which the second regions are etched more slowly than the second regions. Those capacitors having a first region between them have a common bottom electrode 108, but in the second regions the bottom electrode is severed. To pattern the bottom electrode 108, a fluorine-based chemistry followed thereafter by a CO-based chemistry are used in a two step etching process.

摘要翻译： 本文公开了一种在顶部和底部电极114,108之间蚀刻具有铁电层112的铁电体元件100的方法。 硬掩模116,118沉积在顶部电极114上，两个或更多个硬掩模被狭窄的第一区域115隔开，并且由较宽的第二区域117与其它硬掩模隔开。 然后蚀刻顶部电极114和铁电层112以对顶部电极114进行图案，从而形成电容器102,104，并且通过其中第二区域被蚀刻得比第二区域更慢的工艺来蚀刻底部电极108。 那些在它们之间具有第一区域的电容器具有共同的底部电极108，但是在第二区域中，底部电极被切断。 为了对底部电极108进行图案化，其后采用基于CO的化学物质的氟基化学物质用于两步蚀刻工艺。

公开(公告)号：US06924156B2

公开(公告)日：2005-08-02

申请号：US10676360

申请日：2003-09-30

申请人： Haoren Zhuang ,  Ulrich Egger

发明人： Haoren Zhuang ,  Ulrich Egger

IPC分类号： H01L21/02 ,  H01L21/033 ,  H01L21/311 ,  H01L21/3213 ,  H01L21/00

CPC分类号： H01L28/60 ,  H01L21/0337 ,  H01L21/31144 ,  H01L21/32139 ,  H01L28/55

摘要： A ferroelectric capacitor device, such as an FeRAM device is formed by forming a substrate extending in a first plane and comprising a number of layers of material, forming a hard mask layer on the substrate and forming a first layer of a first material on the hard mask layer. The hard mask shape is then defined by etching the hard mask layer. A second layer of the first material is deposited on the etched hard mask layer. The deposited second layer has one or more side surfaces extending substantially perpendicular to the plane of the substrate. The second layer and the number of layers forming the substrate are then etched to shape the ferroelectric capacitor device.

摘要翻译： 诸如FeRAM器件的铁电电容器器件通过形成在第一平面中延伸并且包括多个材料层的衬底形成，在衬底上形成硬掩模层，并在硬质层上形成第一材料的第一层 掩模层。 然后通过蚀刻硬掩模层来限定硬掩模形状。 第一材料的第二层沉积在蚀刻的硬掩模层上。 沉积的第二层具有基本上垂直于衬底的平面延伸的一个或多个侧表面。 然后蚀刻第二层和形成衬底的层数，以形成铁电电容器器件。