公开(公告)号：US08763766B2

公开(公告)日：2014-07-01

申请号：US13576697

申请日：2011-01-27

申请人： Christian Ebner ,  Erich Fuderer ,  André Stegmann

发明人： Christian Ebner ,  Erich Fuderer ,  André Stegmann

IPC分类号： F16D65/40

CPC分类号： F16D55/2245 ,  F16D65/567

摘要： A wear adjuster for a brake caliper of a disk brake of a rail vehicle, having a) a helical gearing which has a threaded spindle and a nut to be screwed thereon as the screw connection elements, one of the screw connection elements and an adjusting element being rotatable in a first wear adjuster housing to rotatingly drive the screw connection element in the wear adjusting direction and the other screw connection element being non-rotatably mounted in a second wear adjuster housing, b) a wrap spring freewheeling mechanism which is blocked in a direction of rotation of the rotatable screw connection element against a wear adjustment and which is freewheeling in the opposite direction of rotation, the wrap spring freewheeling mechanism coupling the rotatable screw connection element to a rotationally fixed element. The rotationally fixed element is formed directly by the first wear adjuster housing.

摘要翻译： 一种用于轨道车辆的盘式制动器的制动钳的磨损调节器，具有：a）螺旋齿轮，其具有螺纹主轴和螺母，作为螺纹连接元件，螺钉连接元件中的一个和调节元件 可在第一磨损调节器壳体中旋转以在磨损调节方向上旋转地驱动螺钉连接元件，而另一个螺钉连接元件不可旋转地安装在第二磨损调节器壳体中，b）封闭弹簧续流机构， 可旋转的螺钉连接元件的旋转方向抵抗磨损调节并且沿相反的旋转方向空转，所述卷绕弹簧续流机构将可旋转的螺旋连接元件联接到旋转固定的元件。 旋转固定元件由第一磨损调节器壳体直接形成。

公开(公告)号：US20120292138A1

公开(公告)日：2012-11-22

申请号：US13576697

申请日：2011-01-27

申请人： Christian Ebner ,  Erich Fuderer ,  André Stegmann

发明人： Christian Ebner ,  Erich Fuderer ,  André Stegmann

IPC分类号： B61H15/00 ,  F16D65/56

CPC分类号： F16D55/2245 ,  F16D65/567

摘要： A wear adjuster for a brake caliper of a disk brake of a rail vehicle, having a) a helical gearing which has a threaded spindle and a nut to be screwed thereon as the screw connection elements, one of the screw connection elements and an adjusting element being rotatable in a first wear adjuster housing to rotatingly drive the screw connection element in the wear adjusting direction and the other screw connection element being non-rotatably mounted in a second wear adjuster housing, b) a wrap spring freewheeling mechanism which is blocked in a direction of rotation of the rotatable screw connection element against a wear adjustment and which is freewheeling in the opposite direction of rotation, the wrap spring freewheeling mechanism coupling the rotatable screw connection element to a rotationally fixed element. The rotationally fixed element is formed directly by the first wear adjuster housing.

摘要翻译： 一种用于轨道车辆的盘式制动器的制动钳的磨损调节器，具有：a）螺旋齿轮，其具有螺纹主轴和螺母，作为螺纹连接元件，螺钉连接元件中的一个和调节元件 可在第一磨损调节器壳体中旋转以在磨损调节方向上旋转地驱动螺钉连接元件，而另一个螺钉连接元件不可旋转地安装在第二磨损调节器壳体中，b）封闭弹簧续流机构， 可旋转的螺钉连接元件的旋转方向抵抗磨损调节并且沿相反的旋转方向空转，所述卷绕弹簧续流机构将可旋转的螺旋连接元件联接到旋转固定的元件。 旋转固定元件由第一磨损调节器壳体直接形成。

公开(公告)号：US08689949B2

公开(公告)日：2014-04-08

申请号：US13145639

申请日：2010-01-14

申请人： Christian Mosbach ,  Michael Mathieu ,  Michael Lehneis ,  Christian Ebner ,  André Stegmann

发明人： Christian Mosbach ,  Michael Mathieu ,  Michael Lehneis ,  Christian Ebner ,  André Stegmann

IPC分类号： F16D65/04

CPC分类号： F16D65/092

摘要： A connection of a brake lining, preferably a disc brake of a railway vehicle, having a lining mount, wherein the brake lining includes a guide bar on the back side thereof lying in a guide track of the lining mount and held on the lining mount by means of a clamping element of at least one clamping device engaging behind the guide bar under spring load and pressing against the guide track, designed so that the clamping element can be brought out of engagement by an actuating element rotatably or displaceably mounted on the lining mount.

摘要翻译： 制动衬片，优选铁路车辆的盘式制动器的连接件，其具有衬里安装件，其中所述制动衬片在其背侧上包括引导杆，所述导杆位于所述衬里安装件的引导轨道中并且通过 至少一个夹紧装置的夹紧元件的装置，其在弹簧载荷下接合在引导杆的后面并压靠导轨，设计成使得夹紧元件可被可旋转地或可移动地安装在衬套上的致动元件脱离接合 。

公开(公告)号：US20120152666A1

公开(公告)日：2012-06-21

申请号：US13145639

申请日：2010-01-14

申请人： Christian Mosbach ,  Michael Mathieu ,  Michael Lehneis ,  Christian Ebner ,  André Stegmann

发明人： Christian Mosbach ,  Michael Mathieu ,  Michael Lehneis ,  Christian Ebner ,  André Stegmann

IPC分类号： F16D65/092 ,  B61H5/00

CPC分类号： F16D65/092

摘要： A connection of a brake lining, preferably a disc brake of a railway vehicle, having a lining mount, wherein the brake lining includes a guide bar on the back side thereof lying in a guide track of the lining mount and held on the lining mount by means of a clamping element of at least one clamping device engaging behind the guide bar under spring load and pressing against the guide track, designed so that the clamping element can be brought out of engagement by an actuating element rotatably or displaceably mounted on the lining mount.

摘要翻译： 制动衬片，优选铁路车辆的盘式制动器的连接件，其具有衬里安装件，其中所述制动衬片在其背侧上包括引导杆，所述导杆位于所述衬里安装件的引导轨道中并且通过 至少一个夹紧装置的夹紧元件的装置，其在弹簧载荷下接合在引导杆的后面并压靠导轨，设计成使得夹紧元件可被可旋转地或可移动地安装在衬套上的致动元件脱离接合 。

公开(公告)号：US07551023B2

公开(公告)日：2009-06-23

申请号：US11257568

申请日：2005-10-25

申请人： Christian Ebner

发明人： Christian Ebner

IPC分类号： H03F1/38

CPC分类号： H03F3/45 ,  H03F1/34

摘要： An amplifier is described which amplifies an input signal according to a defined amplification factor, and which generates an output signal. To reduce an offset fraction of the output signal the amplifier comprises a feedback path which has lowpass characteristics and which returns the output signal in a lowpass-filtered state to an input of the amplifier. The feedback path comprises an amplifier stage as well as at least one Miller capacitance connected between an input and an output of the amplifier stage.

摘要翻译： 描述了放大器，其根据定义的放大因子放大输入信号，并产生输出信号。 为了减小输出信号的偏移分数，放大器包括具有低通特性的反馈路径，并将低通滤波状态的输出信号返回到放大器的输入端。 反馈路径包括放大器级以及连接在放大器级的输入和输出之间的至少一个米勒电容。

公开(公告)号：US20070226563A1

公开(公告)日：2007-09-27

申请号：US11597139

申请日：2005-05-24

申请人： Reinhard Buchner ,  Christian Ebner ,  Stefan Mosel ,  Peter Rauscher ,  Arndt Voigtlander

发明人： Reinhard Buchner ,  Christian Ebner ,  Stefan Mosel ,  Peter Rauscher ,  Arndt Voigtlander

IPC分类号： G01R31/317

CPC分类号： G01R31/318536

摘要： A test method and a test device for testing an integrated circuit are configured to allow for a test device which dispenses with the hardware provision of the boundary scan cells in the device. For this purpose, the boundary scan cells are reproduced by way of a boundary scan program. All functionalities of the chain of boundary scan cells and the TAP interface are fulfilled by the use of the boundary scan program, which is executed by a program-controlled control device that is controlled by the integrated circuit.

摘要翻译： 用于测试集成电路的测试方法和测试设备被配置为允许免除设备中边界扫描单元的硬件提供的测试设备。 为此，通过边界扫描程序再现边界扫描单元。 边界扫描单元链和TAP接口链的所有功能通过使用由集成电路控制的程序控制控制装置执行的边界扫描程序来实现。

公开(公告)号：US20070139240A1

公开(公告)日：2007-06-21

申请号：US11605919

申请日：2006-11-29

申请人： Gerhard Mitteregger ,  Christian Ebner

发明人： Gerhard Mitteregger ,  Christian Ebner

IPC分类号： H03M3/00

CPC分类号： H03M3/37 ,  H03M3/424 ,  H03M3/454

摘要： The invention relates to a continuous-time delta-sigma analog digital converter (10) for converting an analog input signal (IN) to a digital output signal (OUT), comprising an analog filter (20), which filters the analog input signal, a quantifier (30) cycled by a clock signal (CLK), which quantifier quantifies the filtered analog signal transmitted by the analog filter (20) to generate the digital output signal, and a feedback device (40) with at last one digital analog converter, which transmits at least one analog feedback signal based on the digital output signal (OUT) to the analog filter (20). To simplify the feedback without adversely affecting the converter stability and power consumption, provision is made, according to the invention, for the feedback device (40) for generating a feedback signal corresponding to the differentiated output signal of the quantifier, to comprise two digital analog converters (44-1, 44-2) to which the digital output signal (OUT) of the quantifier (30) is transmitted via a delay stage (42-1, 42-2) with different delays, and hose analog output signals are transmitted to an analog subtractor (24-3).

摘要翻译： 本发明涉及一种用于将模拟输入信号（IN）转换为数字输出信号（OUT）的连续时间Δ-Σ模拟数字转换器（10），包括模拟滤波器（20），其对模拟输入信号进行滤波， 定时器（30），其由时钟信号（CLK）循环，该量化器对由模拟滤波器（20）发送的滤波的模拟信号进行量化以产生数字输出信号;以及反馈装置（40），其具有至少一个数字模拟转换器 ，其将基于数字输出信号（OUT）的至少一个模拟反馈信号发送到模拟滤波器（20）。 为了简化反馈而不会不利地影响转换器的稳定性和功率消耗，根据本发明，为反馈装置（40）提供用于产生对应于量化器的微分输出信号的反馈信号的反馈装置，以包括两个数字模拟 通过具有不同延迟的延迟级（42-1,42-2）和软管模拟输出信号来传送定量器（30）的数字输出信号（OUT）的转换器（44-1,44-2） 传输到模拟减法器（24-3）。

公开(公告)号：US20050141565A1

公开(公告)日：2005-06-30

申请号：US10613000

申请日：2003-07-07

申请人： Thomas Forest ,  Bernd Hedenetz ,  Mathias Rausch ,  Christopher Temple ,  Harald Eisele ,  Bernd Elend ,  Jorn Ungermann ,  Matthias Kuhlewein ,  Ralf Belschner ,  Peter Lohrmann ,  Florian Bogenberger ,  Thomas Wuerz ,  Arnold Millsap ,  Patrick Heuts ,  Robert Hugel ,  Thomas Fuhrer ,  Bernd Muller ,  Florian Hartwich ,  Manfred Zinke ,  Josef Berwanger ,  Christian Ebner ,  Harald Weiler ,  Peter Fuhrmann ,  Anton Schedl ,  Martin Peller

发明人： Thomas Forest ,  Bernd Hedenetz ,  Mathias Rausch ,  Christopher Temple ,  Harald Eisele ,  Bernd Elend ,  Jorn Ungermann ,  Matthias Kuhlewein ,  Ralf Belschner ,  Peter Lohrmann ,  Florian Bogenberger ,  Thomas Wuerz ,  Arnold Millsap ,  Patrick Heuts ,  Robert Hugel ,  Thomas Fuhrer ,  Bernd Muller ,  Florian Hartwich ,  Manfred Zinke ,  Josef Berwanger ,  Christian Ebner ,  Harald Weiler ,  Peter Fuhrmann ,  Anton Schedl ,  Martin Peller

IPC分类号： H03M13/09 ,  H03M13/43 ,  H04J3/06 ,  H04L12/26 ,  H04L12/413 ,  H04L12/417 ,  H04L12/44 ,  H04L12/64

CPC分类号： H04L12/40026 ,  H03M13/09 ,  H03M13/43 ,  H04J3/0652 ,  H04J3/0682 ,  H04J3/0694 ,  H04L7/0331 ,  H04L12/4035 ,  H04L12/417 ,  H04L12/44 ,  H04L12/6418 ,  H04L43/00 ,  H04L43/0847 ,  H04L2012/40241 ,  H04L2012/40273 ,  H04L2012/6435 ,  H04L2012/644 ,  H04L2012/6459

摘要： The invention refers to one of a number of nodes of a communication system. The nodes are connected to a communication media for transmitting data among the nodes. Said one node comprises a communication controller, across which the node is connected to the communication media, and a bus guardian for controlling access of the communication controller to the communication media. In order to provide a cheap but nevertheless reliable way for monitoring the synchronized clock signal of a node of a communication system and in particular for detecting deviations of the synchronized clock signal it is suggested that a synchronized clock signal from the communication controller is made available to the bus guardian, and that the bus guardian comprises means for monitoring the synchronized clock signal using a bus guardian internal clock signal, which is generated by means of an electronic circuit and which is less accurate than the synchronized clock signal to be monitored.

摘要翻译： 本发明涉及通信系统的多个节点之一。 节点连接到通信媒体，用于在节点之间传输数据。 所述一个节点包括通信控制器，所述节点连接到通信介质，以及总线监控器，用于控制通信控制器对通信介质的访问。 为了提供用于监测通信系统的节点的同步时钟信号的便宜但仍然可靠的方式，特别是用于检测同步时钟信号的偏差，建议来自通信控制器的同步时钟信号可用于 总线监护人，并且总线监护人包括使用总线监控内部时钟信号监视同步时钟信号的装置，其通过电子电路产生，并且其精度低于要监视的同步时钟信号。

公开(公告)号：US08031098B1

公开(公告)日：2011-10-04

申请号：US12689874

申请日：2010-01-19

申请人： Christian Ebner ,  Jipeng Li ,  Bernd Schafferer

发明人： Christian Ebner ,  Jipeng Li ,  Bernd Schafferer

IPC分类号： H03M1/72

CPC分类号： H03M1/1061 ,  H03M1/747 ,  H03M3/464

摘要： In one embodiment, digital-to-analog converter (DAC) circuit includes dual DAC units employing pseudo-return-to-zero DAC operations to reduce inter-symbol interference. Moreover, each DAC unit is implemented using complementary MOS transistors to improve conversion performance. In another embodiment, a DAC calibration scheme performs background calibration of an array of DAC circuits in continuous time using a reference DAC circuit and a spare DAC circuit. Calibration (also referred to as “trimming”) of the DAC circuit using the calibration scheme of the present invention ensures that the DAC operates with high linearity over process variations. In one embodiment, the DAC circuit and the DAC calibration scheme are applied as the feedback DAC in a continuous-time sigma-delta (CT-ΣΔ) analog-to-digital converter to realize high performance and high precision analog-to-digital conversions.

摘要翻译： 在一个实施例中，数模转换器（DAC）电路包括采用伪返归至零DAC操作的双DAC单元，以减少符号间干扰。 此外，每个DAC单元使用互补MOS晶体管实现，以提高转换性能。 在另一个实施例中，DAC校准方案使用参考DAC电路和备用DAC电路在连续时间内执行DAC电路阵列的背景校准。 使用本发明的校准方案的DAC电路的校准（也称为“修整”）确保了DAC在工艺变化上以高线性度运行。 在一个实施例中，DAC电路和DAC校准方案作为反馈DAC应用于连续时间Σ-Δ（CT-＆Sgr＆amp; Dgr）模数转换器，以实现高性能和高精度的模数转换 数字转换。

公开(公告)号：US07430261B2

公开(公告)日：2008-09-30

申请号：US10613039

申请日：2003-07-07

申请人： Thomas Forest ,  Bernd Hedenetz ,  Mathias Rausch ,  Christopher Temple ,  Harald Eisele ,  Bernd Elend ,  Jörn Ungermann ,  Matthias Kühlewein ,  Ralf Belschner ,  Peter Lohrmann ,  Florian Bogenberger ,  Thomas Wuerz ,  Arnold Millsap ,  Patrick Heuts ,  Robert Hugel ,  Thomas Führer ,  Bernd Müller ,  Florian Hartwich ,  Manfred Zinke ,  Josef Berwanger ,  Christian Ebner ,  Harald Weiler ,  Peter Fuhrmann ,  Anton Schedl ,  Martin Peller

发明人： Thomas Forest ,  Bernd Hedenetz ,  Mathias Rausch ,  Christopher Temple ,  Harald Eisele ,  Bernd Elend ,  Jörn Ungermann ,  Matthias Kühlewein ,  Ralf Belschner ,  Peter Lohrmann ,  Florian Bogenberger ,  Thomas Wuerz ,  Arnold Millsap ,  Patrick Heuts ,  Robert Hugel ,  Thomas Führer ,  Bernd Müller ,  Florian Hartwich ,  Manfred Zinke ,  Josef Berwanger ,  Christian Ebner ,  Harald Weiler ,  Peter Fuhrmann ,  Anton Schedl ,  Martin Peller

IPC分类号： H04L7/06

CPC分类号： H04L12/40026 ,  H03M13/09 ,  H03M13/43 ,  H04J3/0652 ,  H04J3/0682 ,  H04J3/0694 ,  H04L7/0331 ,  H04L12/4035 ,  H04L12/417 ,  H04L12/44 ,  H04L12/6418 ,  H04L43/00 ,  H04L43/0847 ,  H04L2012/40241 ,  H04L2012/40273 ,  H04L2012/6435 ,  H04L2012/644 ,  H04L2012/6459

摘要： A method and a bit stream decoding unit for bit stream decoding has a bit stream comprising a number of consecutive samples. In order to provide for rapid and, in particular, reliable decoding of the bit stream, a detection window comprising a number of samples is defined and the detection window is positioned at certain positions on the bit stream in order to comprise certain samples with respective sample values. A majority voting is applied to the sample values in the detection window and, in dependence on the result of the majority voting, the bit stream is decoded and respective bit values are generated.

摘要翻译： 用于比特流解码的方法和比特流解码单元具有包括多个连续样本的比特流。 为了提供对比特流的快速，特别是可靠的解码，定义包括多个样本的检测窗口，并且检测窗口位于比特流中的特定位置，以便包含具有相应样本的某些样本 价值观。 多数投票被应用于检测窗口中的样本值，并且根据多数投票的结果，比特流被解码并且生成相应的比特值。