公开(公告)号：US09671685B2

公开(公告)日：2017-06-06

申请号：US12976646

申请日：2010-12-22

申请人： Chin-Hsiang Lin ,  Heng-Jen Lee ,  I-Hsiung Huang ,  Chih-Chiang Tu ,  Chun-Jen Chen ,  Rick Lai

发明人： Chin-Hsiang Lin ,  Heng-Jen Lee ,  I-Hsiung Huang ,  Chih-Chiang Tu ,  Chun-Jen Chen ,  Rick Lai

IPC分类号： G06F17/50 ,  G03F1/72 ,  G03F1/86

CPC分类号： G03F1/72 ,  G03F1/86

摘要： The present disclosure provides for many different embodiments. An exemplary method can include providing a mask fabricated according to a design pattern; extracting a mask pattern from the mask; converting the mask pattern into a rendered mask pattern, wherein the simulated design pattern includes the design pattern and any defects in the mask; simulating a lithography process using the rendered mask pattern to create a virtual wafer pattern; and determining whether any defects in the mask are critical based on the virtual wafer pattern. The critical defects in the mask can be repaired.

公开(公告)号：US08903532B2

公开(公告)日：2014-12-02

申请号：US13429921

申请日：2012-03-26

申请人： I-Hsiung Huang ,  Heng-Hsin Liu ,  Heng-Jen Lee ,  Chin-Hsiang Lin

发明人： I-Hsiung Huang ,  Heng-Hsin Liu ,  Heng-Jen Lee ,  Chin-Hsiang Lin

IPC分类号： H01L31/18

CPC分类号： G03F7/30 ,  G03F7/16 ,  G03F7/70991 ,  H01L21/67225 ,  H01L21/67745

摘要： The present disclosure relates to a lithographic tool arrangement for semiconductor workpiece processing. The lithographic tool arrangement groups lithographic tools into clusters, and selectively transfers a semiconductor workpiece between a plurality of lithographic tools of a first type in a first cluster to a plurality of lithographic tools of a second type in a second cluster. The selective transfer is achieved though a transfer assembly, which is coupled to a defect scan tool that identifies defects generated in the lithographic tool of the first type. The disclosed lithographic tool arrangement also utilizes shared structural elements such as a housing assembly, and shared functional elements such as gases and chemicals. The lithographic tool arrangement may consist of baking, coating, exposure, and development units configured to provide a modularization of these various components in order to optimize throughput and efficiency for a given lithographic fabrication process.

摘要翻译： 本公开涉及一种用于半导体工件加工的平版印刷工具装置。 光刻工具装置将光刻工具组合成簇，并且将半导体工件在第一簇中的第一类型的多个光刻工具之间选择性地传输到第二簇中的第二类型的光刻工具。 通过转移组件实现选择性转移，转移组件耦合到识别第一类型的光刻工具中产生的缺陷的缺陷扫描工具。 所公开的平版印刷工具装置还利用共同的结构元件，例如壳体组件和诸如气体和化学品的共享功能元件。 光刻工具装置可以包括被配置成提供这些各种部件的模块化的烘烤，涂覆，曝光和显影单元，以便为给定的光刻制造工艺优化产量和效率。

公开(公告)号：US20110159410A1

公开(公告)日：2011-06-30

申请号：US12650985

申请日：2009-12-31

申请人： Chin-Hsiang Lin ,  Heng-Jen Lee ,  I-Hsiung Huang ,  Chih-Chiang Tu ,  Chun-Jen Chen ,  Rick Lai

发明人： Chin-Hsiang Lin ,  Heng-Jen Lee ,  I-Hsiung Huang ,  Chih-Chiang Tu ,  Chun-Jen Chen ,  Rick Lai

IPC分类号： G03F1/00 ,  G06F17/50

CPC分类号： G03F1/24 ,  G03F1/72 ,  G03F1/84

摘要： The present disclosure provides for many different embodiments. An exemplary method can include providing a blank mask and a design layout to be patterned on the blank mask, the design layout including a critical area; inspecting the blank mask for defects and generating a defect distribution map associated with the blank mask; mapping the defect distribution map to the design layout; performing a mask making process; and performing a mask defect repair process based on the mapping.

摘要翻译： 本公开提供了许多不同的实施例。 示例性方法可以包括提供空白掩模和要在空白掩模上图案化的设计布局，所述设计布局包括临界区域; 检查空白掩模的缺陷并产生与空白掩模相关联的缺陷分布图; 将缺陷分布图映射到设计布局; 进行面膜制作过程; 以及基于所述映射执行掩模缺陷修复处理。

公开(公告)号：US08609545B2

公开(公告)日：2013-12-17

申请号：US12031501

申请日：2008-02-14

申请人： I-Hsiung Huang ,  Chi-Lin Lu ,  Heng-Jen Lee ,  Sheng-Chi Chin ,  Yao-Ching Ku

发明人： I-Hsiung Huang ,  Chi-Lin Lu ,  Heng-Jen Lee ,  Sheng-Chi Chin ,  Yao-Ching Ku

IPC分类号： H01L21/302 ,  H01L21/461

CPC分类号： G03F1/32 ,  G03F1/36 ,  G03F1/80 ,  H01J37/32422 ,  H01L21/67167 ,  H01L21/67207 ,  H01L21/67236

摘要： A method and system for fabricating a substrate is disclosed. First, a plurality of process chambers are provided, at least one of the plurality of process chambers adapted to receive at least one plasma filtering plate and at least one of the plurality of process chambers containing a plasma filtering plate library. A plasma filtering plate is selected and removed from the plasma filtering plate library. Then, the plasma filtering plate is inserted into at least one of the plurality of process chambers adapted to receive at least one plasma filtering plate. Subsequently, an etching process is performed in the substrate.

摘要翻译： 公开了一种用于制造衬底的方法和系统。 首先，提供多个处理室，多个处理室中的至少一个适于接收至少一个等离子体过滤板和多个处理室中的至少一个包含等离子体过滤板库。 从等离子体过滤板文库中选择并除去等离子体过滤板。 然后，将等离子体过滤板插入适于接收至少一个等离子体过滤板的多个处理室中的至少一个。 随后，在衬底中进行蚀刻处理。

公开(公告)号：US08592102B2

公开(公告)日：2013-11-26

申请号：US12650985

申请日：2009-12-31

申请人： Chin-Hsiang Lin ,  Heng-Jen Lee ,  I-Hsiung Huang ,  Chih-Chiang Tu ,  Chun-Jen Chen ,  Rick Lai

发明人： Chin-Hsiang Lin ,  Heng-Jen Lee ,  I-Hsiung Huang ,  Chih-Chiang Tu ,  Chun-Jen Chen ,  Rick Lai

IPC分类号： G03F1/24 ,  G03F1/72 ,  G03F1/84

CPC分类号： G03F1/24 ,  G03F1/72 ,  G03F1/84

摘要： The present disclosure provides for many different embodiments. An exemplary method can include providing a blank mask and a design layout to be patterned on the blank mask, the design layout including a critical area; inspecting the blank mask for defects and generating a defect distribution map associated with the blank mask; mapping the defect distribution map to the design layout; performing a mask making process; and performing a mask defect repair process based on the mapping.

摘要翻译： 本公开提供了许多不同的实施例。 示例性方法可以包括提供空白掩模和要在空白掩模上图案化的设计布局，所述设计布局包括临界区域; 检查空白掩模的缺陷并产生与空白掩模相关联的缺陷分布图; 将缺陷分布图映射到设计布局; 进行面膜制作过程; 以及基于所述映射执行掩模缺陷修复处理。

公开(公告)号：US20110161893A1

公开(公告)日：2011-06-30

申请号：US12976646

申请日：2010-12-22

申请人： CHIN-HSIANG LIN ,  Heng-Jen Lee ,  I-Hsiung Huang ,  Chih-Chiang Tu ,  Chun-Jen Chen ,  Rick Lai

发明人： CHIN-HSIANG LIN ,  Heng-Jen Lee ,  I-Hsiung Huang ,  Chih-Chiang Tu ,  Chun-Jen Chen ,  Rick Lai

IPC分类号： G06F17/50

CPC分类号： G03F1/72 ,  G03F1/86

摘要： The present disclosure provides for many different embodiments. An exemplary method can include providing a mask fabricated according to a design pattern; extracting a mask pattern from the mask; converting the mask pattern into a rendered mask pattern, wherein the simulated design pattern includes the design pattern and any defects in the mask; simulating a lithography process using the rendered mask pattern to create a virtual wafer pattern; and determining whether any defects in the mask are critical based on the virtual wafer pattern. The critical defects in the mask can be repaired.

摘要翻译： 本公开提供了许多不同的实施例。 示例性方法可以包括提供根据设计图案制造的掩模; 从掩模中提取掩模图案; 将掩模图案转换成渲染的掩模图案，其中模拟设计图案包括设计图案和掩模中的任何缺陷; 使用所渲染的掩模图案来模拟光刻工艺以产生虚拟晶片图案; 以及基于所述虚拟晶片图案确定所述掩模中的任何缺陷是否是关键的。 面罩中的关键缺陷可以修复。

公开(公告)号：US20130252175A1

公开(公告)日：2013-09-26

申请号：US13429921

申请日：2012-03-26

申请人： I-Hsiung Huang ,  Heng-Hsin Liu ,  Heng-Jen Lee ,  Chin-Hsiang Lin

发明人： I-Hsiung Huang ,  Heng-Hsin Liu ,  Heng-Jen Lee ,  Chin-Hsiang Lin

IPC分类号： G03F7/20 ,  H01L21/00

CPC分类号： G03F7/30 ,  G03F7/16 ,  G03F7/70991 ,  H01L21/67225 ,  H01L21/67745

摘要： The present disclosure relates to a lithographic tool arrangement for semiconductor workpiece processing. The lithographic tool arrangement groups lithographic tools into clusters, and selectively transfers a semiconductor workpiece between a plurality of lithographic tools of a first type in a first cluster to a plurality of lithographic tools of a second type in a second cluster. The selective transfer is achieved though a transfer assembly, which is coupled to a defect scan tool that identifies defects generated in the lithographic tool of the first type. The disclosed lithographic tool arrangement also utilizes shared structural elements such as a housing assembly, and shared functional elements such as gases and chemicals. The lithographic tool arrangement may consist of baking, coating, exposure, and development units configured to provide a modularization of these various components in order to optimize throughput and efficiency for a given lithographic fabrication process.

摘要翻译： 本公开涉及一种用于半导体工件加工的平版印刷工具装置。 光刻工具装置将光刻工具组合成簇，并且将半导体工件在第一簇中的第一类型的多个光刻工具之间选择性地传输到第二簇中的第二类型的光刻工具。 通过转移组件实现选择性转移，转移组件耦合到识别第一类型的光刻工具中产生的缺陷的缺陷扫描工具。 所公开的平版印刷工具装置还利用共同的结构元件，例如壳体组件和诸如气体和化学品的共享功能元件。 光刻工具装置可以包括被配置成提供这些各种部件的模块化的烘烤，涂覆，曝光和显影单元，以便为给定的光刻制造工艺优化产量和效率。

公开(公告)号：US20110076843A1

公开(公告)日：2011-03-31

申请号：US12566853

申请日：2009-09-25

申请人： I-Hsiung Huang ,  Chin-Hsiang Lin ,  Heng-Jen Lee ,  Heng-Hsin Liu

发明人： I-Hsiung Huang ,  Chin-Hsiang Lin ,  Heng-Jen Lee ,  Heng-Hsin Liu

IPC分类号： H01L21/28 ,  H01L21/302

CPC分类号： H01L21/823871 ,  G03F7/091 ,  G03F7/093 ,  G03F7/11 ,  Y10S438/942

摘要： A method for fabricating an integrated circuit device is disclosed. The method is a lithography patterning method that can include providing a substrate; forming a protective layer over the substrate; forming a conductive layer over the protective layer; forming a resist layer over the conductive layer; and exposing and developing the resist layer.

摘要翻译： 公开了一种用于制造集成电路器件的方法。 该方法是可以包括提供衬底的光刻图案化方法; 在衬底上形成保护层; 在保护层上形成导电层; 在导电层上形成抗蚀剂层; 并且曝光和显影抗蚀剂层。

公开(公告)号：US20090206057A1

公开(公告)日：2009-08-20

申请号：US12031501

申请日：2008-02-14

申请人： I-Hsiung Huang ,  Chi-Lun Lu ,  Heng-Jen Lee ,  Sheng-Chi Chin ,  Yao-Ching Ku

发明人： I-Hsiung Huang ,  Chi-Lun Lu ,  Heng-Jen Lee ,  Sheng-Chi Chin ,  Yao-Ching Ku

IPC分类号： C23F1/08

CPC分类号： G03F1/32 ,  G03F1/36 ,  G03F1/80 ,  H01J37/32422 ,  H01L21/67167 ,  H01L21/67207 ,  H01L21/67236

摘要： A method and system for fabricating a substrate is disclosed. First, a plurality of process chambers are provided, at least one of the plurality of process chambers adapted to receive at least one plasma filtering plate and at least one of the plurality of process chambers containing a plasma filtering plate library. A plasma filtering plate is selected and removed from the plasma filtering plate library. Then, the plasma filtering plate is inserted into at least one of the plurality of process chambers adapted to receive at least one plasma filtering plate. Subsequently, an etching process is performed in the substrate.

摘要翻译： 公开了一种用于制造衬底的方法和系统。 首先，提供多个处理室，多个处理室中的至少一个适于接收至少一个等离子体过滤板和多个处理室中的至少一个包含等离子体过滤板库。 从等离子体过滤板文库中选择并除去等离子体过滤板。 然后，将等离子体过滤板插入适于接收至少一个等离子体过滤板的多个处理室中的至少一个。 随后，在衬底中进行蚀刻处理。

公开(公告)号：US07901854B2

公开(公告)日：2011-03-08

申请号：US12437776

申请日：2009-05-08

申请人： Po-Chang Huang ,  Heng-Hsin Liu ,  Heng-Jen Lee

发明人： Po-Chang Huang ,  Heng-Hsin Liu ,  Heng-Jen Lee

IPC分类号： G03F9/00 ,  G03C5/00 ,  G03B27/32 ,  G03B27/42

CPC分类号： G03B27/62 ,  G03F7/70425

摘要： A wafer edge exposure unit comprises a chuck for supporting a wafer. The chuck is rotatable about a central axis. A plurality of light sources are positioned or movably positionable with a common radial distance from the axis of the rotatable chuck, each light source configured to direct exposure light on a respective edge portion of the wafer simultaneously.

摘要翻译： 晶片边缘曝光单元包括用于支撑晶片的卡盘。 卡盘可绕中心轴线旋转。 多个光源以可旋转卡盘的轴线的公共径向距离定位或可移动地定位，每个光源被配置为将曝光光同时引导到晶片的相应边缘部分。