公开(公告)号：US20090155989A1

公开(公告)日：2009-06-18

申请号：US12388983

申请日：2009-02-19

申请人： Koji UEMATSU ,  Fumitaka Sato ,  Ryu Hirota ,  Seiji Nakahata ,  Hideaki Nakahata

发明人： Koji UEMATSU ,  Fumitaka Sato ,  Ryu Hirota ,  Seiji Nakahata ,  Hideaki Nakahata

IPC分类号： H01L21/20

CPC分类号： C30B29/403 ,  C30B25/18 ,  C30B29/406 ,  H01L21/0237 ,  H01L21/02395 ,  H01L21/0242 ,  H01L21/02433 ,  H01L21/02458 ,  H01L21/0254 ,  H01L21/0262 ,  H01L21/02631 ,  H01L21/02639 ,  H01L21/02642 ,  H01L21/02647

摘要： A nitride semiconductor crystal substrate is produced by forming a network mask repeating a closed loop unit shape upon an undersubstrate, growing a nitride semiconductor crystal in vapor phase, producing convex facet hills covered with facets on exposed parts Π, forming outlining concavities on mask-covered parts not burying the facets, maintaining the convex facet hills on Π and the network concavities on excluding dislocations in the facet hills down to the outlining concavities on forming a defect accumulating region H on decreasing dislocations in the facet hills and improving the facet hills to low defect density single crystal regions Z, producing a rugged nitride crystal, and slicing and polishing the nitride crystal into mirror nitride crystal wafers. After the fabrication of devices on the nitride wafer, dry-etching or wet etching of hot KOH or NaOH divides the device-carrying wafer into chips by corroding the network defect accumulating region H.

摘要翻译： 氮化物半导体晶体基板通过在下衬底上形成重复闭环单元形状的网络掩模，在气相中生长氮化物半导体晶体，在露出部分Pi上产生由小面覆盖的凸面小丘，从而形成掩模覆盖的凹面 部分不包括小平面上的位错，直到减少小平面山丘的位错，改善小丘到低缺陷 密度单晶区域Z，产生坚固的氮化物晶体，并将氮化物晶体切割和研磨成镜面氮化物晶片。 在氮化物晶片上的器件制造之后，通过腐蚀网络缺陷累积区域H将热的KOH或NaOH的干蚀刻或湿法蚀刻将装载的晶片分成芯片。

公开(公告)号：US20060272572A1

公开(公告)日：2006-12-07

申请号：US11446955

申请日：2006-06-06

申请人： Koji Uematsu ,  Fumitaka Sato ,  Ryu Hirota ,  Seiji Nakahata ,  Hideaki Nakahata

发明人： Koji Uematsu ,  Fumitaka Sato ,  Ryu Hirota ,  Seiji Nakahata ,  Hideaki Nakahata

IPC分类号： C30B23/00 ,  C30B25/00 ,  C30B28/12 ,  C30B28/14

CPC分类号： C30B29/403 ,  C30B25/18 ,  C30B29/406 ,  H01L21/0237 ,  H01L21/02395 ,  H01L21/0242 ,  H01L21/02433 ,  H01L21/02458 ,  H01L21/0254 ,  H01L21/0262 ,  H01L21/02631 ,  H01L21/02639 ,  H01L21/02642 ,  H01L21/02647

摘要： A nitride semiconductor crystal substrate is produced by forming a network mask repeating a closed loop unit shape upon an undersubstrate, growing a nitride semiconductor crystal in vapor phase, producing convex facet hills covered with facets on exposed parts Π, forming outlining concavities on mask-covered parts γ, not burying the facets, maintaining the convex facet hills on Π and the network concavities on γ, excluding dislocations in the facet hills down to the outlining concavities on γ, forming a defect accumulating region H on γ, decreasing dislocations in the facet hills and improving the facet hills to low defect density single crystal regions Z, producing a rugged nitride crystal, and slicing and polishing the nitride crystal into mirror nitride crystal wafers. After the fabrication of devices on the nitride wafer, dry-etching or wet etching of hot KOH or NaOH divides the device-carrying wafer into chips by corroding the network defect accumulating region H.

摘要翻译： 氮化物半导体晶体基板通过在下衬底上形成重复闭环单元形状的网络掩模，在气相中生长氮化物半导体晶体，在露出部分Pi上产生由小面覆盖的凸面小丘，从而形成掩模覆盖的凹面 部分伽马，不掩埋小平面，保持Pi上的凸面小丘和γ上的网格凹面，不考虑小平面丘上的位错，直到伽马的轮廓凹面，在伽马上形成缺陷累积区H，减小刻面上的位错 小丘，改善小缺陷密度单晶区域Z，产生坚固的氮化物晶体，并将氮化物晶体切割和研磨成镜面氮化物晶片。 在氮化物晶片上的器件制造之后，通过腐蚀网络缺陷累积区域H将热的KOH或NaOH的干蚀刻或湿法蚀刻将装载的晶片分成芯片。

公开(公告)号：US20100275836A1

公开(公告)日：2010-11-04

申请号：US12812338

申请日：2009-01-08

申请人： Fumitaka Sato ,  Seiji Nakahata

发明人： Fumitaka Sato ,  Seiji Nakahata

IPC分类号： C30B23/04

CPC分类号： C30B29/406 ,  C30B25/18 ,  C30B25/186 ,  H01L21/02389 ,  H01L21/0243 ,  H01L21/02433 ,  H01L21/02458 ,  H01L21/0254 ,  H01L21/02609 ,  H01L21/0262 ,  H01L21/02658

摘要： The present method for growing group III nitride crystal includes the steps of: preparing a substrate including group III nitride seed crystal constituting one main surface thereof; forming a plurality of facets on the main surface of the substrate through vapor phase etching; and growing group III nitride crystal on the main surface on which the facets are formed. In this way, group III nitride crystal having a low dislocation density can be obtained readily and efficiently.

摘要翻译： 用于生长III族氮化物晶体的本发明方法包括以下步骤：制备包含构成其一个主表面的III族氮化物晶种的衬底; 通过气相蚀刻在基板的主表面上形成多个面; 并且在其上形成有小平面的主表面上生长III族氮化物晶体。 以这种方式，可以容易且有效地获得具有低位错密度的III族氮化物晶体。

公开(公告)号：US20080308814A1

公开(公告)日：2008-12-18

申请号：US12136275

申请日：2008-06-10

申请人： Seiji NAKAHATA ,  Fumitaka Sato ,  Yoshiki Miura ,  Akinori Koukitu ,  Yoshinao Kumagai

发明人： Seiji NAKAHATA ,  Fumitaka Sato ,  Yoshiki Miura ,  Akinori Koukitu ,  Yoshinao Kumagai

IPC分类号： H01L29/205 ,  H01L21/205

CPC分类号： C30B25/00 ,  C30B29/406 ,  H01L21/02389 ,  H01L21/02458 ,  H01L21/0254 ,  H01L21/02581 ,  H01L21/0262 ,  H01L29/045 ,  H01L29/2003 ,  H01L29/207

摘要： There is disclosed a method for forming a gallium nitride layer of which resistivity is 1×106Ω·cm or more, including steps of: forming a gallium nitride layer containing iron on a substrate; and heating said gallium nitride layer formed on said substrate.

摘要翻译： 公开了形成电阻率为1×10 6Ω·cm以上的氮化镓层的方法，包括以下步骤：在基板上形成含有铁的氮化镓层; 以及加热形成在所述衬底上的所述氮化镓层。

公开(公告)号：US07556687B2

公开(公告)日：2009-07-07

申请号：US11602948

申请日：2006-11-22

申请人： Fumitaka Sato ,  Seiji Nakahata

发明人： Fumitaka Sato ,  Seiji Nakahata

IPC分类号： C30B29/38

CPC分类号： C30B25/04 ,  C30B25/18 ,  C30B29/40 ,  C30B29/406

摘要： A low-distortion gallium nitride crystal substrate including low dislocation single crystal regions (Z) having a definite c-axis and a definite a-axis, C-plane growth regions (Y) having a c-axis and a-axis parallel to the c-axis and a-axis of the low dislocation single crystal regions (Z), voluminous defect accumulating regions (H) having a c-axis inverse to the c-axis of the low dislocation single crystal regions (Z) and an a-axis parallel with the a-axis of the low dislocation single crystal regions (Z), and 0.1/cm2 to 10/cm2 c-axis gross core regions (F) containing at least one crystal having a c-axis parallel to the c-axis of the low dislocation single crystal regions (Z) and an a-axis different from the a-axis of the low dislocation single crystal regions (Z).

摘要翻译： 一种低失真氮化镓晶体基板，包括具有确定的c轴和一定a轴的低位错单晶区域（Z），C平面生长区域（Y）具有平行于 低位错单晶区域（Z）的c轴和a轴，具有与低位错单晶区域（Z）的c轴相反的c轴的大量缺陷积聚区域（H） 轴向与低位错单晶区域（Z）的a轴平行，以及包含至少一个c轴平行于c-轴的晶体的0.1 / cm 2至10 / cm 2的c轴总芯区域（F） 低位错单晶区域（Z）的轴线和与低位错单晶区域（Z）的a轴不同的a轴。

公开(公告)号：US08110484B1

公开(公告)日：2012-02-07

申请号：US12950686

申请日：2010-11-19

申请人： Fumitaka Sato ,  Seiji Nakahata ,  Makoto Kiyama

发明人： Fumitaka Sato ,  Seiji Nakahata ,  Makoto Kiyama

IPC分类号： H01L21/20 ,  H01L21/36

CPC分类号： H01L21/02395 ,  C30B25/04 ,  C30B29/403 ,  H01L21/02433 ,  H01L21/0254 ,  H01L21/02573 ,  H01L21/02576 ,  H01L21/0262 ,  H01L21/02639 ,  H01L21/02664

摘要： A method for producing a conductive nitride semiconductor substrate circuit includes the steps of forming, on an underlying substrate, a mask including dot or stripe masking portions having a width or diameter of 10 to 100 μm and arranged at a spacing of 250 to 10,000 μm; growing a nitride semiconductor crystal on the underlying substrate by hydride vapor phase epitaxy (HVPE) at a growth temperature of 1,040° C. to 1,150° C. by supplying a group III source gas, a group V source gas, and a silicon-containing gas in a V/III ratio of 1 to 10; and removing the underlying substrate, thus forming a free-standing conductive nitride semiconductor crystal substrate having a resistivity r of 0.0015 Ωcm≦r≦0.01 Ωcm, a thickness of 100 μm or more, and a radius of bow curvature U of 3.5 m≦U≦8 m.

摘要翻译： 一种导电氮化物半导体衬底电路的制造方法，其特征在于，在下面的基板上形成具有宽度为10〜100μm，宽度为250〜10000μm的点状或条状掩模部的掩模的工序， 通过氢化物气相外延（HVPE）在1,040℃至1150℃的生长温度下在下面的衬底上生长氮化物半导体晶体，通过提供III族源气体，V族源气体和含硅 V / III比为1〜10的气体; 并且除去下面的衬底，从而形成电阻率r为0.0015Ω·cm·cm-1;独立电极;0.01Ω·cm·cm，厚度为100μm以上的独立的导电氮化物半导体晶体衬底，以及弓形曲率U的半径 3.5 m＆nlE; U＆nlE; 8 m。

公开(公告)号：US07915149B2

公开(公告)日：2011-03-29

申请号：US12136275

申请日：2008-06-10

申请人： Seiji Nakahata ,  Fumitaka Sato ,  Yoshiki Miura ,  Akinori Koukitu ,  Yoshinao Kumagai

发明人： Seiji Nakahata ,  Fumitaka Sato ,  Yoshiki Miura ,  Akinori Koukitu ,  Yoshinao Kumagai

IPC分类号： H01L21/00

CPC分类号： C30B25/00 ,  C30B29/406 ,  H01L21/02389 ,  H01L21/02458 ,  H01L21/0254 ,  H01L21/02581 ,  H01L21/0262 ,  H01L29/045 ,  H01L29/2003 ,  H01L29/207

摘要： There is disclosed a method for forming a gallium nitride layer of which resistivity is 1×106 Ω·cm or more, including steps of: forming a gallium nitride layer containing iron on a substrate; and heating said gallium nitride layer formed on said substrate.

摘要翻译： 公开了形成电阻率为1×10 6Ω·cm·cm以上的氮化镓层的方法，包括以下步骤：在基板上形成含有铁的氮化镓层; 以及加热形成在所述衬底上的所述氮化镓层。

公开(公告)号：US20090209091A1

公开(公告)日：2009-08-20

申请号：US12370606

申请日：2009-02-13

申请人： Fumitaka Sato ,  Seiji Nakahata

发明人： Fumitaka Sato ,  Seiji Nakahata

IPC分类号： H01L21/203

CPC分类号： C30B29/403 ,  C30B29/406 ,  C30B33/12

摘要： Made available is a Group III nitride crystal manufacturing method whereby incidence of cracking in the III-nitride crystal when the III-nitride substrate is removed is kept to a minimum. III nitride crystal manufacturing method provided with: a step of growing, onto one principal face (10m) of a III-nitride substrate (10), III-nitride crystal (20) at least either whose constituent-atom type and ratios, or whose dopant type and concentration, differ from those of the III-nitride substrate (10); and a step of removing the III-nitride substrate (10) by vapor-phase etching.

摘要翻译： 可获得的是III族氮化物晶体制造方法，其中，当除去III族氮化物衬底时，III族氮化物晶体中的裂纹的发生率保持最小。 III族氮化物晶体制造方法，其特征在于，在III族氮化物衬底（10）的一个主面（10μm）上生长III族氮化物晶体（20）的步骤，至少其组成原子类型和比例，或者其 掺杂剂类型和浓度不同于III族氮化物衬底（10）的掺杂剂类型和浓度; 以及通过气相蚀刻除去III族氮化物衬底（10）的步骤。

公开(公告)号：US20070062440A1

公开(公告)日：2007-03-22

申请号：US11602948

申请日：2006-11-22

申请人： Fumitaka Sato ,  Seiji Nakahata

发明人： Fumitaka Sato ,  Seiji Nakahata

IPC分类号： C30B25/00 ,  C30B23/00 ,  C30B28/12 ,  C30B28/14

CPC分类号： C30B25/04 ,  C30B25/18 ,  C30B29/40 ,  C30B29/406

摘要： A low-distortion gallium nitride crystal substrate including low dislocation single crystal regions (Z) having a definite c-axis and a definite a-axis, C-plane growth regions (Y) having a c-axis and a-axis parallel to the c-axis and a-axis of the low dislocation single crystal regions (Z), voluminous defect accumulating regions (H) having a c-axis inverse to the c-axis of the low dislocation single crystal regions (Z) and an a-axis parallel with the a-axis of the low dislocation single crystal regions (Z), and 0.1/cm2 to 10/cm2 c-axis gross core regions (F) containing at least one crystal having a c-axis parallel to the c-axis of the low dislocation single crystal regions (Z) and an a-axis different from the a-axis of the low dislocation single crystal regions (Z).

摘要翻译： 一种低失真氮化镓晶体基板，包括具有确定的c轴和一定a轴的低位错单晶区域（Z），C平面生长区域（Y）具有平行于 低位错单晶区域（Z）的c轴和a轴，具有与低位错单晶区域（Z）的c轴相反的c轴的大量缺陷积聚区域（H） 与低位错单晶区域（Z）的a轴平行的轴线和0.1 / cm 2至10 / cm 2的c轴总芯部区域（F ）含有至少一个具有与低位错单晶区域（Z）的c轴平行的c轴和不同于低位错单晶区域（Z）的a轴的a轴的晶体。

公开(公告)号：US20120126371A1

公开(公告)日：2012-05-24

申请号：US13295795

申请日：2011-11-14

申请人： Fumitaka Sato ,  Seiji Nakahata ,  Makoto Kiyama

发明人： Fumitaka Sato ,  Seiji Nakahata ,  Makoto Kiyama

IPC分类号： H01L29/32 ,  H01L29/20

CPC分类号： H01L21/02395 ,  C30B25/04 ,  C30B29/403 ,  H01L21/02433 ,  H01L21/0254 ,  H01L21/02573 ,  H01L21/02576 ,  H01L21/0262 ,  H01L21/02639 ,  H01L21/02664

摘要： A method for producing a conductive nitride semiconductor substrate circuit includes the steps of forming, on an underlying substrate, a mask including dot or stripe masking portions having a width or diameter of 10 to 100 μm and arranged at a spacing of 250 to 10,000 μm; growing a nitride semiconductor crystal on the underlying substrate by hydride vapor phase epitaxy (HVPE) at a growth temperature of 1,040° C. to 1,150° C. by supplying a group III source gas, a group V source gas, and a silicon-containing gas in a V/III ratio of 1 to 10; and removing the underlying substrate, thus forming a free-standing conductive nitride semiconductor crystal substrate having a resistivity r of 0.0015 Ωcm≦r≦0.01 Ωcm, a thickness of 100 μm or more, and a radius of bow curvature U of 3.5 m≦U≦8 m.

摘要翻译： 一种导电氮化物半导体衬底电路的制造方法，其特征在于，在下面的基板上形成具有宽度为10〜100μm，宽度为250〜10000μm的点状或条状掩模部的掩模的工序， 通过氢化物气相外延（HVPE）在1,040℃至1150℃的生长温度下在下面的衬底上生长氮化物半导体晶体，通过提供III族源气体，V族源气体和含硅 V / III比为1〜10的气体; 并且除去下面的衬底，从而形成电阻率r为0.0015Ω·cm·cm-1;独立电极;0.01Ω·cm·cm，厚度为100μm以上的独立的导电氮化物半导体晶体衬底，以及弓形曲率U的半径 3.5 m＆nlE; U＆nlE; 8 m。