CONDUCTIVE NITRIDE SEMICONDUCTOR SUBSTRATE AND METHOD FOR PRODUCING THE SAME
    1.
    发明申请
    CONDUCTIVE NITRIDE SEMICONDUCTOR SUBSTRATE AND METHOD FOR PRODUCING THE SAME 审中-公开
    导电氮化物半导体基板及其制造方法

    公开(公告)号:US20120126371A1

    公开(公告)日:2012-05-24

    申请号:US13295795

    申请日:2011-11-14

    IPC分类号: H01L29/32 H01L29/20

    摘要: A method for producing a conductive nitride semiconductor substrate circuit includes the steps of forming, on an underlying substrate, a mask including dot or stripe masking portions having a width or diameter of 10 to 100 μm and arranged at a spacing of 250 to 10,000 μm; growing a nitride semiconductor crystal on the underlying substrate by hydride vapor phase epitaxy (HVPE) at a growth temperature of 1,040° C. to 1,150° C. by supplying a group III source gas, a group V source gas, and a silicon-containing gas in a V/III ratio of 1 to 10; and removing the underlying substrate, thus forming a free-standing conductive nitride semiconductor crystal substrate having a resistivity r of 0.0015 Ωcm≦r≦0.01 Ωcm, a thickness of 100 μm or more, and a radius of bow curvature U of 3.5 m≦U≦8 m.

    摘要翻译: 一种导电氮化物半导体衬底电路的制造方法,其特征在于,在下面的基板上形成具有宽度为10〜100μm,宽度为250〜10000μm的点状或条状掩模部的掩模的工序, 通过氢化物气相外延(HVPE)在1,040℃至1150℃的生长温度下在下面的衬底上生长氮化物半导体晶体,通过提供III族源气体,V族源气体和含硅 V / III比为1〜10的气体; 并且除去下面的衬底,从而形成电阻率r为0.0015Ω·cm·cm-1;独立电极;0.01Ω·cm·cm,厚度为100μm以上的独立的导电氮化物半导体晶体衬底,以及弓形曲率U的半径 3.5 m≦̸ U≦̸ 8 m。

    Conductive nitride semiconductor substrate and method for producing the same
    2.
    发明授权
    Conductive nitride semiconductor substrate and method for producing the same 失效
    导电氮化物半导体基板及其制造方法

    公开(公告)号:US08110484B1

    公开(公告)日:2012-02-07

    申请号:US12950686

    申请日:2010-11-19

    IPC分类号: H01L21/20 H01L21/36

    摘要: A method for producing a conductive nitride semiconductor substrate circuit includes the steps of forming, on an underlying substrate, a mask including dot or stripe masking portions having a width or diameter of 10 to 100 μm and arranged at a spacing of 250 to 10,000 μm; growing a nitride semiconductor crystal on the underlying substrate by hydride vapor phase epitaxy (HVPE) at a growth temperature of 1,040° C. to 1,150° C. by supplying a group III source gas, a group V source gas, and a silicon-containing gas in a V/III ratio of 1 to 10; and removing the underlying substrate, thus forming a free-standing conductive nitride semiconductor crystal substrate having a resistivity r of 0.0015 Ωcm≦r≦0.01 Ωcm, a thickness of 100 μm or more, and a radius of bow curvature U of 3.5 m≦U≦8 m.

    摘要翻译: 一种导电氮化物半导体衬底电路的制造方法,其特征在于,在下面的基板上形成具有宽度为10〜100μm,宽度为250〜10000μm的点状或条状掩模部的掩模的工序, 通过氢化物气相外延(HVPE)在1,040℃至1150℃的生长温度下在下面的衬底上生长氮化物半导体晶体,通过提供III族源气体,V族源气体和含硅 V / III比为1〜10的气体; 并且除去下面的衬底,从而形成电阻率r为0.0015Ω·cm·cm-1;独立电极;0.01Ω·cm·cm,厚度为100μm以上的独立的导电氮化物半导体晶体衬底,以及弓形曲率U的半径 3.5 m≦̸ U≦̸ 8 m。

    Semiconductor device and method for producing the same
    9.
    发明授权
    Semiconductor device and method for producing the same 有权
    半导体装置及其制造方法

    公开(公告)号:US08890239B2

    公开(公告)日:2014-11-18

    申请号:US13884221

    申请日:2011-07-26

    摘要: In a vertical semiconductor device including a channel in an opening, a semiconductor device whose high-frequency characteristics can be improved and a method for producing the semiconductor device are provided. The semiconductor device includes n-type GaN-based drift layer 4/p-type GaN-based barrier layer 6/n-type GaN-based contact layer 7. An opening 28 extends from a top layer and reaches the n-type GaN-based drift layer. The semiconductor device includes a regrown layer 27 located so as to cover the opening, the regrown layer 27 including an electron drift layer 22 and an electron supply layer 26, a source electrode S, a drain electrode D, and a gate electrode G located on the regrown layer. Assuming that the source electrode serving as one electrode and the drain electrode serving as the other electrode constitute a capacitor, the semiconductor device includes a capacitance-decreasing structure that decreases the capacitance of the capacitor.

    摘要翻译: 在包括开口中的沟道的垂直半导体器件中,提供了可以提高其高频特性的半导体器件和制造半导体器件的方法。 半导体器件包括n型GaN基漂移层4 / p型GaN基阻挡层6 / n型GaN基接触层7.开口28从顶层延伸并到达n型GaN- 基漂移层。 半导体器件包括以覆盖开口的方式定位的再生长层27,包括电子漂移层22和电子供给层26的再生长层27,源电极S,漏电极D和位于 再生长层。 假设用作一个电极的源极和用作另一个电极的漏电极构成电容器,则半导体器件包括降低电容器的电容的电容减小结构。

    Semiconductor device and method for manufacturing same
    10.
    发明授权
    Semiconductor device and method for manufacturing same 有权
    半导体装置及其制造方法

    公开(公告)号:US08729562B2

    公开(公告)日:2014-05-20

    申请号:US13498767

    申请日:2010-06-24

    IPC分类号: H01L29/15

    摘要: There are provided a high current semiconductor device that has low on-resistance, high mobility, and good pinch-off characteristics and in which a kink phenomenon is not easily caused even if a drain voltage is increased, and a method for producing the semiconductor device. The semiconductor device of the present invention includes a GaN-based layered body 15 having an opening 28, a regrown layer 27 including a channel, a gate electrode G, a source electrode S, and a drain electrode D. The regrown layer 27 includes an electron transit layer 22 and an electron supply layer 26. The GaN-based layered body includes a p-type GaN layer 6 whose end surface is covered by the regrown layer in the opening, and a p-side electrode 11 that is in ohmic contact with the p-type GaN layer is disposed.

    摘要翻译: 提供了具有低导通电阻,高迁移率和良好的夹断特性的高电流半导体器件,并且即使漏极电压增加也不容易引起扭结现象,并且制造半导体器件的方法 。 本发明的半导体器件包括具有开口28的GaN基层叠体15,包括沟道的再生长层27,栅电极G,源电极S和漏电极D.再生层27包括: 电子转移层22和电子供给层26.该GaN基层叠体包括端面被开口部中的再生长层覆盖的p型GaN层6和与欧姆接触的p侧电极11 配置p型GaN层。