公开(公告)号：US08860114B2

公开(公告)日：2014-10-14

申请号：US13411052

申请日：2012-03-02

申请人： Hsiao-Tsung Yen ,  Yu-Ling Lin ,  Chin-Wei Kuo ,  Ho-Hsiang Chen ,  Min-Chie Jeng

发明人： Hsiao-Tsung Yen ,  Yu-Ling Lin ,  Chin-Wei Kuo ,  Ho-Hsiang Chen ,  Min-Chie Jeng

IPC分类号： H01L29/92

CPC分类号： H01L23/5223 ,  H01L28/60 ,  H01L28/88 ,  H01L2924/0002 ,  H01L2924/00

摘要： The present disclosure provides an integrated circuit. The integrated circuit includes a substrate having a surface that is defined by a first axis and a second axis perpendicular to the first axis; and a capacitor structure disposed on the substrate. The capacitor structure includes a first conductive component; a second conductive component and a third conductive component symmetrically configured on opposite sides of the first conductive component. The first, second and third conductive components are separated from each other by respective dielectric material.

摘要翻译： 本发明提供集成电路。 集成电路包括具有由第一轴线和垂直于第一轴线的第二轴线限定的表面的基板; 以及设置在基板上的电容器结构。 电容器结构包括第一导电元件; 对称地配置在第一导电部件的相对侧上的第二导电部件和第三导电部件。 第一，第二和第三导电部件通过相应的介电材料彼此分离。

公开(公告)号：US08754818B2

公开(公告)日：2014-06-17

申请号：US13541937

申请日：2012-07-05

申请人： Hsiao-Tsung Yen ,  Yu-Ling Lin ,  Chin-Wei Kuo ,  Ho-Hsiang Chen ,  Min-Chie Jeng

发明人： Hsiao-Tsung Yen ,  Yu-Ling Lin ,  Chin-Wei Kuo ,  Ho-Hsiang Chen ,  Min-Chie Jeng

IPC分类号： H01Q1/12 ,  H01Q1/38 ,  H01Q1/40

CPC分类号： H01Q1/38 ,  H01L23/66 ,  H01L25/0652 ,  H01L25/0657 ,  H01L25/16 ,  H01L25/18 ,  H01L2223/6677 ,  H01L2924/0002 ,  H01Q1/2283 ,  H01Q1/40 ,  H01Q7/00 ,  H01L2924/00

摘要： Some embodiments relate to a semiconductor module comprising an integrated antenna structure configured to wirelessly transmit signals. The integrated antenna structure has a lower metal layer and an upper metal layer. The lower metal layer is disposed on a lower die and is connected to a ground terminal. The upper metal layer is disposed on an upper die and is connected to a signal generator configured to generate a signal to be wirelessly transmitted. The upper die is stacked on the lower die and is connected to the lower die by way of an adhesion layer having one or more micro-bumps. By connecting the lower and upper die together by way of the adhesion layer, the lower and upper metal layers are separated from each other by a large spacing that provides for a good performance of the integrated antenna structure.

摘要翻译： 一些实施例涉及包括被配置为无线传输信号的集成天线结构的半导体模块。 集成天线结构具有下金属层和上金属层。 下金属层设置在下模上并连接到接地端子。 上金属层设置在上模上并连接到被配置为产生要无线传输的信号的信号发生器。 上模具堆叠在下模上，并通过具有一个或多个微凸块的粘合层连接到下模。 通过将粘合层连接在一起，下部和上部金属层彼此间隔开大间隔，从而提供了集成天线结构的良好性能。

公开(公告)号：US09103884B2

公开(公告)日：2015-08-11

申请号：US12963511

申请日：2010-12-08

申请人： Hsiao-Tsung Yen ,  Yu-Ling Lin ,  Chin-Wei Kuo ,  Ho-Hsiang Chen ,  Sa-Lly Liu

发明人： Hsiao-Tsung Yen ,  Yu-Ling Lin ,  Chin-Wei Kuo ,  Ho-Hsiang Chen ,  Sa-Lly Liu

IPC分类号： G01R31/26 ,  G01R31/3185 ,  G11C29/56 ,  H01L21/66

CPC分类号： G01R31/2601 ,  G01R1/0491 ,  G01R31/2644 ,  G01R31/318511 ,  G11C29/56 ,  G11C2029/5602 ,  H01L22/34

摘要： A transmission line is provided. In one embodiment, the transmission line comprises a substrate, a well within the substrate, a shielding layer over the well, and a plurality of intermediate metal layers over the shielding layer, the plurality of intermediate metal layers coupled by a plurality of vias. The transmission line further includes a top metal layer over the plurality of intermediate metal layers. A test structure for de-embedding an on-wafer device, and a wafer are also disclosed.

摘要翻译： 提供传输线。 在一个实施例中，传输线包括衬底，衬底内的阱，阱上的屏蔽层以及屏蔽层上的多个中间金属层，多个中间金属层通过多个通孔耦合。 传输线还包括多个中间金属层上的顶部金属层。 还公开了用于去嵌入晶片装置和晶片的测试结构。

公开(公告)号：US09087840B2

公开(公告)日：2015-07-21

申请号：US12917285

申请日：2010-11-01

申请人： Yu-Ling Lin ,  Hsiao-Tsung Yen ,  Ho-Hsiang Chen ,  Chin-Wei Kuo ,  Chewn-Pu Jou

发明人： Yu-Ling Lin ,  Hsiao-Tsung Yen ,  Ho-Hsiang Chen ,  Chin-Wei Kuo ,  Chewn-Pu Jou

IPC分类号： H01L23/14 ,  H01L23/522 ,  H01L23/66 ,  H01L27/06

CPC分类号： H01L23/5225 ,  H01L23/5226 ,  H01L23/528 ,  H01L23/64 ,  H01L23/66 ,  H01L27/0629 ,  H01L2223/6627 ,  H01L2924/0002 ,  H01L2924/00

摘要： A strip-line includes a ground plane extending through a plurality of dielectric layers over a substrate; a signal line over the substrate and on a side of the ground plane; a first plurality of metal strips under the signal line and in a first metal layer, wherein the first plurality of metal strips is parallel to each other, and is spaced apart from each other by spaces; and a second plurality of metal strips under the signal line and in a second metal layer over the first metal layer. The second plurality of metal strips vertically overlaps the spaces. The first plurality of metal strips is electrically coupled to the second plurality of metal strips through the ground plane, and no via physically contacts the first plurality of metal strips and the second plurality of metal strips.

摘要翻译： 带状线包括在衬底上延伸穿过多个电介质层的接地平面; 在基板上并在接地平面的一侧的信号线; 在信号线下方和第一金属层中的第一多个金属条，其中所述第一多个金属条彼此平行并且彼此间隔开; 以及信号线下方的第二多个金属条，并且在第一金属层上方的第二金属层中。 第二多个金属带垂直地与空间重叠。 第一多个金属条通过接地平面电耦合到第二多个金属条，并且不通过物理地接触第一多个金属条和第二多个金属条。

公开(公告)号：US20120146741A1

公开(公告)日：2012-06-14

申请号：US12963701

申请日：2010-12-09

申请人： Hsiao-Tsung YEN ,  Yu-Ling Lin ,  Ying-Ta Lu ,  Chin-Wei Kuo ,  Ho-Hsiang Chen

发明人： Hsiao-Tsung YEN ,  Yu-Ling Lin ,  Ying-Ta Lu ,  Chin-Wei Kuo ,  Ho-Hsiang Chen

IPC分类号： H03H7/42 ,  H01L21/00

CPC分类号： H01L23/5227 ,  H01F17/0006 ,  H01F2017/0086 ,  H01L23/5223 ,  H01L2924/0002 ,  Y10T29/41 ,  H01L2924/00

摘要： An electronic device comprises first, second and third inductors connected in series and formed in a metal layer over a semiconductor substrate. The first and second inductors have a mutual inductance with each other. The second and third inductors having a mutual inductance with each other. A first capacitor has a first electrode connected to a first node. The first node is conductively coupled between the first and second inductors. A second capacitor has a second electrode connected to a second node. The second node is conductively coupled between the second and third inductors.

摘要翻译： 电子器件包括串联连接并形成在半导体衬底上的金属层中的第一，第二和第三电感器。 第一和第二电感器具有彼此的互感。 第二和第三电感器具有彼此的互感。 第一电容器具有连接到第一节点的第一电极。 第一节点电导耦合在第一和第二电感器之间。 第二电容器具有连接到第二节点的第二电极。 第二节点电导耦合在第二和第三电感器之间。

公开(公告)号：US20120104575A1

公开(公告)日：2012-05-03

申请号：US12917285

申请日：2010-11-01

申请人： Yu-Ling Lin ,  Hsiao-Tsung Yen ,  Ho-Hsiang Chen ,  Chin-Wei Kuo ,  Chewn-Pu Jou

发明人： Yu-Ling Lin ,  Hsiao-Tsung Yen ,  Ho-Hsiang Chen ,  Chin-Wei Kuo ,  Chewn-Pu Jou

IPC分类号： H01L23/14

CPC分类号： H01L23/5225 ,  H01L23/5226 ,  H01L23/528 ,  H01L23/64 ,  H01L23/66 ,  H01L27/0629 ,  H01L2223/6627 ,  H01L2924/0002 ,  H01L2924/00

摘要： A strip-line includes a ground plane extending through a plurality of dielectric layers over a substrate; a signal line over the substrate and on a side of the ground plane; a first plurality of metal strips under the signal line and in a first metal layer, wherein the first plurality of metal strips is parallel to each other, and is spaced apart from each other by spaces; and a second plurality of metal strips under the signal line and in a second metal layer over the first metal layer. The second plurality of metal strips vertically overlaps the spaces. The first plurality of metal strips is electrically coupled to the second plurality of metal strips through the ground plane, and no via physically contacts the first plurality of metal strips and the second plurality of metal strips.

摘要翻译： 带状线包括在衬底上延伸穿过多个电介质层的接地平面; 在基板上并在接地平面的一侧的信号线; 在信号线下方和第一金属层中的第一多个金属条，其中所述第一多个金属条彼此平行并且彼此间隔开; 以及信号线下方的第二多个金属条，并且在第一金属层上方的第二金属层中。 第二多个金属带垂直地与空间重叠。 第一多个金属条通过接地平面电耦合到第二多个金属条，并且不通过物理地接触第一多个金属条和第二多个金属条。

公开(公告)号：US08552812B2

公开(公告)日：2013-10-08

申请号：US12963701

申请日：2010-12-09

申请人： Hsiao-Tsung Yen ,  Yu-Ling Lin ,  Ying-Ta Lu ,  Chin-Wei Kuo ,  Ho-Hsiang Chen

发明人： Hsiao-Tsung Yen ,  Yu-Ling Lin ,  Ying-Ta Lu ,  Chin-Wei Kuo ,  Ho-Hsiang Chen

IPC分类号： H03H5/00 ,  H01F5/00

CPC分类号： H01L23/5227 ,  H01F17/0006 ,  H01F2017/0086 ,  H01L23/5223 ,  H01L2924/0002 ,  Y10T29/41 ,  H01L2924/00

摘要： An electronic device comprises first, second and third inductors connected in series and formed in a metal layer over a semiconductor substrate. The first and second inductors have a mutual inductance with each other. The second and third inductors having a mutual inductance with each other. A first capacitor has a first electrode connected to a first node. The first node is conductively coupled between the first and second inductors. A second capacitor has a second electrode connected to a second node. The second node is conductively coupled between the second and third inductors.

公开(公告)号：US08912581B2

公开(公告)日：2014-12-16

申请号：US13415906

申请日：2012-03-09

申请人： Yu-Ling Lin ,  Hsiao-Tsung Yen ,  Feng Wei Kuo ,  Ho-Hsiang Chen ,  Chin-Wei Kuo

发明人： Yu-Ling Lin ,  Hsiao-Tsung Yen ,  Feng Wei Kuo ,  Ho-Hsiang Chen ,  Chin-Wei Kuo

IPC分类号： H01L29/80 ,  H01L39/00 ,  H01L29/40 ,  H01L23/60

CPC分类号： H01L23/60 ,  H01L23/5222 ,  H01L23/5225 ,  H01L23/66 ,  H01L25/0657 ,  H01L2223/6627 ,  H01L2225/06527 ,  H01L2225/06537 ,  H01L2924/0002 ,  H01L2924/00

摘要： A transmission line structure for semiconductor RF and wireless circuits, and method for forming the same. The transmission line structure includes embodiments having a first die including a first substrate, a first insulating layer, and a ground plane, and a second die including a second substrate, a second insulating layer, and a signal transmission line. The second die may be positioned above and spaced apart from the first die. An underfill is disposed between the ground plane of the first die and the signal transmission line of the second die. Collectively, the ground plane and transmission line of the first and second die and underfill forms a compact transmission line structure. In some embodiments, the transmission line structure may be used for microwave applications.

摘要翻译： 用于半导体RF和无线电路的传输线结构及其形成方法。 传输线结构包括具有包括第一衬底，第一绝缘层和接地平面的第一裸片的实施例，以及包括第二衬底，第二绝缘层和信号传输线的第二裸片。 第二管芯可以位于第一管芯的上方并与之隔开。 在第一管芯的接地面和第二管芯的信号传输线之间设置底部填充物。 总的来说，第一和第二模具和底部填充物的接地平面和传输线形成紧凑的传输线结构。 在一些实施例中，传输线结构可用于微波应用。

公开(公告)号：US20120146680A1

公开(公告)日：2012-06-14

申请号：US12963511

申请日：2010-12-08

申请人： Hsiao-Tsung Yen ,  Yu-Ling Lin ,  Chin-Wei Kuo ,  Ho-Hsiang Chen ,  Sa-Lly Liu

发明人： Hsiao-Tsung Yen ,  Yu-Ling Lin ,  Chin-Wei Kuo ,  Ho-Hsiang Chen ,  Sa-Lly Liu

IPC分类号： G01R31/00

CPC分类号： G01R31/2601 ,  G01R1/0491 ,  G01R31/2644 ,  G01R31/318511 ,  G11C29/56 ,  G11C2029/5602 ,  H01L22/34

摘要： A transmission line is provided. In one embodiment, the transmission line comprises a substrate, a well within the substrate, a shielding layer over the well, and a plurality of intermediate metal layers over the shielding layer, the plurality of intermediate metal layers coupled by a plurality of vias. The transmission line further includes a top metal layer over the plurality of intermediate metal layers. A test structure for de-embedding an on-wafer device, and a wafer are also disclosed.

摘要翻译： 提供传输线。 在一个实施例中，传输线包括衬底，衬底内的阱，阱上的屏蔽层以及屏蔽层上的多个中间金属层，多个中间金属层通过多个通孔耦合。 传输线还包括多个中间金属层上的顶部金属层。 还公开了用于去嵌入晶片装置和晶片的测试结构。

公开(公告)号：US08610247B2

公开(公告)日：2013-12-17

申请号：US13340856

申请日：2011-12-30

申请人： Hsiao-Tsung Yen ,  Yu-Ling Lin ,  Ying-Ta Lu ,  Huan-Neng Chen ,  Ho-Hsiang Chen

发明人： Hsiao-Tsung Yen ,  Yu-Ling Lin ,  Ying-Ta Lu ,  Huan-Neng Chen ,  Ho-Hsiang Chen

IPC分类号： H01L27/08

CPC分类号： H01F27/2804 ,  H01F5/003 ,  H01F2027/2809 ,  H01L23/5226 ,  H01L23/5227 ,  H01L23/528 ,  H01L28/10 ,  H01L2924/0002 ,  H01L2924/00

摘要： The present disclosure provides a semiconductor device. The semiconductor device includes a first inductor formed on a first substrate; a second inductor formed on a second substrate and conductively coupled with the first inductor as a transformer; and a plurality of micro-bump features configured between the first and second substrates. The plurality of micro-bump features include a magnetic material having a relative permeability substantially greater than one and are configured to enhance coupling between the first and second inductors.

摘要翻译： 本发明提供一种半导体器件。 半导体器件包括形成在第一衬底上的第一电感器; 第二电感器，其形成在第二基板上，并与所述第一电感器作为变压器导电耦合; 以及配置在第一和第二基板之间的多个微凸块特征。 多个微凸块特征包括具有相对磁导率基本上大于1的磁性材料，并且被配置为增强第一和第二电感器之间的耦合。