DE-EMBEDDING ON-WAFER DEVICES
    2.
    发明申请
    DE-EMBEDDING ON-WAFER DEVICES 有权
    嵌入式嵌入式设备

    公开(公告)号:US20120146680A1

    公开(公告)日:2012-06-14

    申请号:US12963511

    申请日:2010-12-08

    IPC分类号: G01R31/00

    摘要: A transmission line is provided. In one embodiment, the transmission line comprises a substrate, a well within the substrate, a shielding layer over the well, and a plurality of intermediate metal layers over the shielding layer, the plurality of intermediate metal layers coupled by a plurality of vias. The transmission line further includes a top metal layer over the plurality of intermediate metal layers. A test structure for de-embedding an on-wafer device, and a wafer are also disclosed.

    摘要翻译: 提供传输线。 在一个实施例中,传输线包括衬底,衬底内的阱,阱上的屏蔽层以及屏蔽层上的多个中间金属层,多个中间金属层通过多个通孔耦合。 传输线还包括多个中间金属层上的顶部金属层。 还公开了用于去嵌入晶片装置和晶片的测试结构。

    Integrated Antenna Structure
    4.
    发明申请
    Integrated Antenna Structure 有权
    集成天线结构

    公开(公告)号:US20140008773A1

    公开(公告)日:2014-01-09

    申请号:US13541937

    申请日:2012-07-05

    IPC分类号: H01L25/065 H01L21/50

    摘要: Some embodiments relate to a semiconductor module comprising an integrated antenna structure configured to wirelessly transmit signals. The integrated antenna structure has a lower metal layer and an upper metal layer. The lower metal layer is disposed on a lower die and is connected to a ground terminal. The upper metal layer is disposed on an upper die and is connected to a signal generator configured to generate a signal to be wirelessly transmitted. The upper die is stacked on the lower die and is connected to the lower die by way of an adhesion layer having one or more micro-bumps. By connecting the lower and upper die together by way of the adhesion layer, the lower and upper metal layers are separated from each other by a large spacing that provides for a good performance of the integrated antenna structure.

    摘要翻译: 一些实施例涉及包括被配置为无线传输信号的集成天线结构的半导体模块。 集成天线结构具有下金属层和上金属层。 下金属层设置在下模上并连接到接地端子。 上金属层设置在上模上并连接到被配置为产生要无线传输的信号的信号发生器。 上模具堆叠在下模上,并通过具有一个或多个微凸块的粘合层连接到下模。 通过将粘合层连接在一起,下部和上部金属层彼此间隔开大间隔,从而提供了集成天线结构的良好性能。

    Slot-Shielded Coplanar Strip-line Compatible with CMOS Processes
    10.
    发明申请
    Slot-Shielded Coplanar Strip-line Compatible with CMOS Processes 有权
    Slot-Shielded Coplanar Strip-line兼容CMOS工艺

    公开(公告)号:US20120104575A1

    公开(公告)日:2012-05-03

    申请号:US12917285

    申请日:2010-11-01

    IPC分类号: H01L23/14

    摘要: A strip-line includes a ground plane extending through a plurality of dielectric layers over a substrate; a signal line over the substrate and on a side of the ground plane; a first plurality of metal strips under the signal line and in a first metal layer, wherein the first plurality of metal strips is parallel to each other, and is spaced apart from each other by spaces; and a second plurality of metal strips under the signal line and in a second metal layer over the first metal layer. The second plurality of metal strips vertically overlaps the spaces. The first plurality of metal strips is electrically coupled to the second plurality of metal strips through the ground plane, and no via physically contacts the first plurality of metal strips and the second plurality of metal strips.

    摘要翻译: 带状线包括在衬底上延伸穿过多个电介质层的接地平面; 在基板上并在接地平面的一侧的信号线; 在信号线下方和第一金属层中的第一多个金属条,其中所述第一多个金属条彼此平行并且彼此间隔开; 以及信号线下方的第二多个金属条,并且在第一金属层上方的第二金属层中。 第二多个金属带垂直地与空间重叠。 第一多个金属条通过接地平面电耦合到第二多个金属条,并且不通过物理地接触第一多个金属条和第二多个金属条。