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    Chemical mechanical polishing equipment
    11.
    发明授权
    Chemical mechanical polishing equipment 失效
    化学机械抛光设备

    公开(公告)号：US06709544B2

    公开(公告)日：2004-03-23

    申请号：US10064526

    申请日：2002-07-24

    申请人： Shao-Chung Hu ,  Chia-Lin Hsu ,  Hsueh-Chung Chen ,  Shih-Hsun Hsu

    发明人： Shao-Chung Hu ,  Chia-Lin Hsu ,  Hsueh-Chung Chen ,  Shih-Hsun Hsu

    IPC分类号： B24B700

    CPC分类号： B24B37/20 ,  B24B37/042

    摘要： The present invention related to a CMP equipment, compatible with the existing manufacture processes. The CMP equipment of the present invention employs strip polishing platens that can be smaller than the wafer size, so that the layout is compact and the space is effectively utilized, leading to high throughput and efficient production management. The present invention provides a CMP equipment that offers greater flexibility in performing CMP for different fabrication processes through the choices of various polishing pads and/or polishing slurry.

    摘要翻译： 本发明涉及与现有制造工艺兼容的CMP设备。 本发明的CMP设备采用可以比晶片尺寸小的带状抛光压板，使得布局紧凑并且有效地利用空间，导致高产量和高效的生产管理。 本发明提供一种CMP设备，其通过选择各种抛光垫和/或抛光浆料，为不同的制造工艺执行CMP提供更大的灵活性。

    Wafer carrier assembly for a chemical mechanical polishing apparatus and a polishing method using the same
    12.
    发明授权
    Wafer carrier assembly for a chemical mechanical polishing apparatus and a polishing method using the same 有权
    用于化学机械抛光装置的晶片载体组件和使用其的抛光方法

    公开(公告)号：US06638391B1

    公开(公告)日：2003-10-28

    申请号：US10177306

    申请日：2002-06-19

    申请人： Chia-Lin Hsu ,  Art Yu ,  Shih-Hsun Hsu ,  Hsueh-Chung Chen

    发明人： Chia-Lin Hsu ,  Art Yu ,  Shih-Hsun Hsu ,  Hsueh-Chung Chen

    IPC分类号： H01L21302

    CPC分类号： B24B37/30

    摘要： A wafer carrier assembly for a chemical mechanical polishing apparatus and a polishing method using the same are provided. The present wafer carrier assembly comprises a first plate, a second plate and a flexible membrane. The first plate has a plurality of protrusions formed on a bottom surface thereof and the second plate has a plurality of apertures passing through. Each of the protrusions is matched with one of the apertures to enable the first plate and the second plate to detachably combine together. The flexible membrane is positioned under the second plate and contacts it. A surface of the flexible membrane opposite to the surface of the flexible membrane contacting the second plate provides a wafer-receiving surface.

    摘要翻译： 提供了一种用于化学机械抛光装置的晶片载体组件和使用其的抛光方法。 本晶片载体组件包括第一板，第二板和柔性膜。 第一板具有在其底表面上形成的多个突起，并且第二板具有穿过的多个孔。 每个突起与其中一个孔匹配，以使得第一板和第二板能够可拆卸地组合在一起。 柔性膜定位在第二板下方并与其接触。 与柔性膜的与第二板接触的表面相对的柔性膜的表面提供了晶片接收表面。

    Metal electrical fuse structure
    13.
    发明授权
    Metal electrical fuse structure 有权
    金属电熔丝结构

    公开(公告)号：US07651893B2

    公开(公告)日：2010-01-26

    申请号：US11320233

    申请日：2005-12-27

    申请人： Hsueh-Chung Chen ,  Hao-Yi Tsai ,  Hsien-Wei Chen ,  Shin-Puu Jeng ,  Shang-Yun Hou

    发明人： Hsueh-Chung Chen ,  Hao-Yi Tsai ,  Hsien-Wei Chen ,  Shin-Puu Jeng ,  Shang-Yun Hou

    IPC分类号： H01L21/82

    CPC分类号： H01L23/5256 ,  H01L2924/0002 ,  H01L2924/3011 ,  H01L2924/00

    摘要： An electrical fuse and a method for forming the same are provided. The electrical fuse includes a dielectric layer over a shallow trench isolation region and a contact plug extending from a top surface of the dielectric layer to the shallow trench isolation region, wherein the contact plug comprises a middle portion substantially narrower than the two end portions. The contact plug forms a fuse element. The electrical fuse further includes two metal lines in a metallization layer on the dielectric layer, wherein each of the two metal lines is connected to different ones of the end portions of the contact plug.

    摘要翻译： 提供电熔丝及其形成方法。 电熔丝包括在浅沟槽隔离区域上的电介质层和从电介质层的顶表面延伸到浅沟槽隔离区域的接触插塞，其中接触插塞包括基本上比两个端部部分窄的中间部分。 接触插头形成熔丝元件。 电熔丝还包括在电介质层上的金属化层中的两条金属线，其中两条金属线中的每一条连接到接触插塞的不同端部。

    Metal electrical fuse structure
    14.
    发明申请
    Metal electrical fuse structure 有权
    金属电熔丝结构

    公开(公告)号：US20070145515A1

    公开(公告)日：2007-06-28

    申请号：US11320233

    申请日：2005-12-27

    申请人： Hsueh-Chung Chen ,  Hao-Yi Tsai ,  Hsien-Wei Chen ,  Shin-Puu Jeng ,  Shang-Yun Hou

    发明人： Hsueh-Chung Chen ,  Hao-Yi Tsai ,  Hsien-Wei Chen ,  Shin-Puu Jeng ,  Shang-Yun Hou

    IPC分类号： H01L29/00

    CPC分类号： H01L23/5256 ,  H01L2924/0002 ,  H01L2924/3011 ,  H01L2924/00

    摘要： An electrical fuse and a method for forming the same are provided. The electrical fuse includes a dielectric layer over a shallow trench isolation region and a contact plug extending from a top surface of the dielectric layer to the shallow trench isolation region, wherein the contact plug comprises a middle portion substantially narrower than the two end portions. The contact plug forms a fuse element. The electrical fuse further includes two metal lines in a metallization layer on the dielectric layer, wherein each of the two metal lines is connected to different ones of the end portions of the contact plug.

    摘要翻译： 提供电熔丝及其形成方法。 电熔丝包括在浅沟槽隔离区域上的电介质层和从电介质层的顶表面延伸到浅沟槽隔离区域的接触插塞，其中接触插塞包括基本上比两个端部部分窄的中间部分。 接触插头形成熔丝元件。 电熔丝还包括在电介质层上的金属化层中的两条金属线，其中两条金属线中的每一条连接到接触插塞的不同端部。

    METHOD FOR FABRICATING AIR GAP FOR SEMICONDUCTOR DEVICE
    16.
    发明申请
    METHOD FOR FABRICATING AIR GAP FOR SEMICONDUCTOR DEVICE 有权
    用于制造半导体器件的空气隙的方法

    公开(公告)号：US20080076258A1

    公开(公告)日：2008-03-27

    申请号：US11533809

    申请日：2006-09-21

    申请人： Hsien-Wei Chen ,  Hsueh-Chung Chen ,  Shin-Puu Jeng

    发明人： Hsien-Wei Chen ,  Hsueh-Chung Chen ,  Shin-Puu Jeng

    IPC分类号： H01L21/302 ,  H01L21/461

    CPC分类号： H01L21/7682 ,  H01L21/0206

    摘要： A method for fabricating an interconnect structure in a semiconductor device. A masking layer is formed on a dielectric layer formed on a substrate, having at least one opening. The opening is transferred into the dielectric layer. A Plasma stripping process is performed to remove the masking layer, such that a damaged sidewall portion of the dielectric layer surrounding the opening therein is formed. The opening in the dielectric layer is filled with a conductive element. The damaged sidewall portion of the dielectric layer is removed to form a gap between the dielectric layer and the conductive element, wherein substances from removal of the damaged sidewall portion of the dielectric layer are formed on the conductive element. The substances are removed using a citric acid solution.

    摘要翻译： 一种在半导体器件中制造互连结构的方法。 在形成在基板上的电介质层上形成有至少一个开口的掩模层。 开口转移到电介质层中。 进行等离子体剥离处理以去除掩模层，从而形成围绕其中的开口的电介质层的受损侧壁部分。 电介质层中的开口填充有导电元件。 去除电介质层损坏的侧壁部分，以形成电介质层和导电元件之间的间隙，其中去除导电元件上介质层损坏的侧壁部分的物质。 使用柠檬酸溶液除去物质。

    Semiconductor device structure and methods of manufacturing the same
    17.
    发明申请
    Semiconductor device structure and methods of manufacturing the same 有权
    半导体器件结构及其制造方法

    公开(公告)号：US20070166887A1

    公开(公告)日：2007-07-19

    申请号：US11333618

    申请日：2006-01-17

    申请人： Hsien-Wei Chen ,  Hsueh-Chung Chen ,  Yi-Lung Cheng ,  Shin-Puu Jeng

    发明人： Hsien-Wei Chen ,  Hsueh-Chung Chen ,  Yi-Lung Cheng ,  Shin-Puu Jeng

    IPC分类号： H01L21/82

    CPC分类号： H01L27/0203 ,  G06F17/5068 ,  G06F2217/12 ,  Y02P90/265

    摘要： A method of generating a layout for a semiconductor device array is provided. A first layout is provided, comprising an active conductive feature, a boundary area surrounding the active conductive feature, and an open area other than the active conductive feature and the boundary area. A plurality of dummy templates of different pattern densities are provided, each of which comprises a plurality of dummy seeds. A second layout is generated by adding the dummy seeds on the open area according to at least one of the dummy templates.

    摘要翻译： 提供了一种生成半导体器件阵列布局的方法。 提供了第一布局，包括有源导电特征，围绕有源导电特征的边界区域以及除了有源导电特征和边界区域之外的开放区域。 提供了多个不同图案密度的虚拟模板，每个虚拟模板包括多个虚拟种子。 通过根据至少一个虚拟模板将假种子添加到开放区域来生成第二布局。

    Design structure for coupling noise prevention
    18.
    发明申请
    Design structure for coupling noise prevention 有权

    公开(公告)号：US20060244133A1

    公开(公告)日：2006-11-02

    申请号：US11119868

    申请日：2005-05-02

    申请人： Hsien-Wei Chen ,  Hsueh-Chung Chen

    发明人： Hsien-Wei Chen ,  Hsueh-Chung Chen

    IPC分类号： H01L23/34

    CPC分类号： H01L23/5225 ,  H01L23/5258 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A semiconductor structure for preventing coupling noise in integrated circuits and a method of forming the same are provided. The semiconductor structure includes a signal-grounded seal ring. The seal ring includes a plurality of metal lines, each in a respective metal layer and surrounding a circuit region of the semiconductor chip, a plurality of vias connecting respective metal lines, and a plurality of dielectric layers isolating each metal layer from any other metal layers. The seal ring may further include additional seal rings formed inside or outside the seal ring. The semiconductor structure may include laser fuses and protective rings. The protective rings are preferably signal grounded. Cross talk between sub circuits in a chip can be reduced by forming a seal ring extension between the sub circuits.