Semiconductor Device Having a Die Pad with a Dam-Like Configuration

    公开(公告)号:US20200294894A1

    公开(公告)日:2020-09-17

    申请号:US16354392

    申请日:2019-03-15

    Abstract: A semiconductor device includes a semiconductor substrate, a power transistor formed in the semiconductor substrate, the power transistor including an active area in which one or more power transistor cells are formed, a first metal pad formed above the semiconductor substrate and covering substantially all of the active area of the power transistor, the first metal pad being electrically connected to a source or emitter region in the active area of the power transistor, the first metal pad including an interior region laterally surrounded by a peripheral region, the peripheral region being thicker than the interior region, and a first interconnect plate or a semiconductor die attached to the interior region of the first metal pad by a die attach material. Corresponding methods of manufacture are also described.

    Semiconductor device with compressive interlayer

    公开(公告)号:US10658309B2

    公开(公告)日:2020-05-19

    申请号:US16418006

    申请日:2019-05-21

    Abstract: A semiconductor device includes a substrate, a structured interlayer on the substrate and having a defined edge, and a structured metallization on the structured interlayer and also having a defined edge. The defined edge of the structured interlayer faces the same direction as the defined edge of the structured metallization. The defined edge of the structured interlayer extends beyond the defined edge of the structured metallization by at least 0.5 microns so that the defined edge of the structured metallization terminates before reaching the defined edge of the structured interlayer. The structured interlayer has a compressive residual stress at room temperature and the structured metallization generates a tensile stress at room temperature that is at least partly counteracted by the compressive residual stress of the structured interlayer.

    Semiconductor Device with Compressive Interlayer

    公开(公告)号:US20190273050A1

    公开(公告)日:2019-09-05

    申请号:US16418006

    申请日:2019-05-21

    Abstract: A semiconductor device includes a substrate, a structured interlayer on the substrate and having a defined edge, and a structured metallization on the structured interlayer and also having a defined edge. The defined edge of the structured interlayer faces the same direction as the defined edge of the structured metallization. The defined edge of the structured interlayer extends beyond the defined edge of the structured metallization by at least 0.5 microns so that the defined edge of the structured metallization terminates before reaching the defined edge of the structured interlayer. The structured interlayer has a compressive residual stress at room temperature and the structured metallization generates a tensile stress at room temperature that is at least partly counteracted by the compressive residual stress of the structured interlayer.

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