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    TECHNOLOGIES FOR PROVIDING EFFICIENT DETECTION OF IDLE POLL LOOPS
    11.
    发明申请
    TECHNOLOGIES FOR PROVIDING EFFICIENT DETECTION OF IDLE POLL LOOPS 审中-公开

    公开(公告)号：US20190041957A1

    公开(公告)日：2019-02-07

    申请号：US15951391

    申请日：2018-04-12

    Applicant: Intel Corporation

    Inventor： David Hunt ,  Niall Power ,  Kevin Devey ,  Changzheng Wei ,  Bruce Richardson ,  Eliezer Tamir ,  Andrew Cunningham ,  Chris MacNamara ,  Nemanja Marjanovic ,  Rory Sexton ,  John Browne

    IPC: G06F1/32

    Abstract: Technologies for providing efficient detection of idle poll loops include a compute device. The compute device has a compute engine that includes a plurality of cores and a memory. The compute engine is to determine a ratio of unsuccessful operations to successful operations over a predefined time period of a core of the plurality cores that is assigned to continually poll, within the predefined time period, a memory address for a change in status and determine whether the determined ratio satisfies a reference ratio of unsuccessful operations to successful operations. The reference ratio is indicative of a change in the operation of the assigned core. The compute engine is further to selectively increase or decrease a power usage of the assigned core as a function of whether the determined ratio satisfies the reference ratio. Other embodiments are also described and claimed.

    Network function virtualization architecture with device isolation
    14.
    发明授权
    Network function virtualization architecture with device isolation 有权

    公开(公告)号：US10445272B2

    公开(公告)日：2019-10-15

    申请号：US16027776

    申请日：2018-07-05

    Applicant: Intel Corporation

    Inventor： Kevin Devey ,  John Browne ,  Chris Macnamara ,  Eoin Walsh ,  Bruce Richardson ,  Andrew Cunningham ,  Niall Power ,  David Hunt ,  Changzheng Wei ,  Eliezer Tamir

    IPC: G06F13/38 ,  G06F1/3203 ,  G06F9/455 ,  G06F9/4401

    Abstract: A network system includes a central processing unit and a peripheral device in electrical communication with the central processing unit. The peripheral device has at least one power input and a data input. The network system also includes an out of band controller in electrical communication with the central processing unit, the peripheral device, and an external management interface. Responsive to an identified threat, the out of band controller is configured to disable the at least one power input and the data input to the peripheral device, where the disablement indicates to the central processing unit that a hot plug event has occurred with respect to the peripheral device. The out of band controller is also configured to enable auxiliary power to the peripheral device such that the out of band controller remains in communication with the peripheral device during remediation of the identified threat.

    TECHNOLOGIES FOR PERFORMANCE MONITORING AND MANAGEMENT WITH EMPTY POLLING
    15.
    发明申请
    TECHNOLOGIES FOR PERFORMANCE MONITORING AND MANAGEMENT WITH EMPTY POLLING 审中-公开

    公开(公告)号：US20190238442A1

    公开(公告)日：2019-08-01

    申请号：US16381237

    申请日：2019-04-11

    Applicant: Intel Corporation

    Inventor： Peter McCarthy ,  Chris MacNamara ,  John Browne ,  Liang J. Ma ,  Liam Day

    IPC: H04L12/26 ,  H04L12/24

    CPC classification number: H04L43/10 ,  H04L41/0833 ,  H04L43/022

    Abstract: Technologies for performance monitoring include a computing device having multiple processor cores. The computing device performs a training workload with a processor core by continuously polling an empty input queue. The computing device determines empty polling thresholds based on the empty polling workload. The computing device performs a packet processing workload with one or more processor cores by continuously polling input queues associated with network traffic. The computing device compares a measured number of empty polls performed by the packet processing workload against the empty polling thresholds. The computing device configures power management of one or more processor cores in response to the comparison. The computing device may determine empty polling trends and compare the measured number of empty polls and the empty polling trends to the empty polling thresholds. Other embodiments are described and claimed.

    NETWORK FUNCTION VIRTUALIZATION ARCHITECTURE WITH DEVICE ISOLATION
    16.
    发明申请
    NETWORK FUNCTION VIRTUALIZATION ARCHITECTURE WITH DEVICE ISOLATION 审中-公开

    公开(公告)号：US20190042506A1

    公开(公告)日：2019-02-07

    申请号：US16027776

    申请日：2018-07-05

    Applicant: Intel Corporation

    Inventor： Kevin Devey ,  John Browne ,  Chris Macnamara ,  Eoin Walsh ,  Bruce Richardson ,  Andrew Cunningham ,  Niall Power ,  David Hunt ,  Changzheng Wei ,  Eliezer Tamir

    IPC: G06F13/38 ,  G06F1/32 ,  G06F9/455

    Abstract: A network system includes a central processing unit and a peripheral device in electrical communication with the central processing unit. The peripheral device has at least one power input and a data input. The network system also includes an out of band controller in electrical communication with the central processing unit, the peripheral device, and an external management interface. Responsive to an identified threat, the out of band controller is configured to disable the at least one power input and the data input to the peripheral device, where the disablement indicates to the central processing unit that a hot plug event has occurred with respect to the peripheral device. The out of band controller is also configured to enable auxiliary power to the peripheral device such that the out of band controller remains in communication with the peripheral device during remediation of the identified threat.

    Chaining Services in an Accelerator Device
    18.
    发明公开
    Chaining Services in an Accelerator Device 审中-公开

    公开(公告)号：US20230350720A1

    公开(公告)日：2023-11-02

    申请号：US18221057

    申请日：2023-07-12

    Applicant: Intel Corporation

    Inventor： Marian Horgan ,  Laurent Coquerel ,  John Browne

    IPC: G06F9/50 ,  G06F9/48

    CPC classification number: G06F9/5027 ,  G06F9/4881

    Abstract: An accelerator device may receive, from an application, an application programming interface (API) call to chain an encryption operation for data and a data transformation operation for the data. The accelerator device may cause two or more hardware accelerators of the accelerator device to execute the encryption operation for the data and the data transformation operation for the data based on the API call.

    Method for arbitration and access to hardware request ring structures in a concurrent environment
    19.
    发明授权
    Method for arbitration and access to hardware request ring structures in a concurrent environment 有权

    公开(公告)号：US11748174B2

    公开(公告)日：2023-09-05

    申请号：US16590490

    申请日：2019-10-02

    Applicant: Intel Corporation

    Inventor： Juraj Vanco ,  Conor McLoughlin ,  John Browne

    IPC: G06F9/52 ,  G06F9/50 ,  G06F13/16 ,  G06F13/28

    CPC classification number: G06F9/526 ,  G06F9/5005 ,  G06F13/1663 ,  G06F13/28

    Abstract: Methods and apparatus for arbitration and access to hardware request ring structures in a concurrent environment. A request ring mechanism is provided including an arbiter, ring overflow guard, request ring, and request ring metadata, each of which is implemented in shared virtual memory (SVM) on a computing platform including a multi-core processor coupled to an offload device having one or more SVM-capable accelerators. Worker threads request to access the request ring to provide job descriptors to be processed by the accelerator(s). A lockless arbiter returns either an index of a slot in which to write a descriptor or information indicating the ring is full to each worker thread. The scheme enables worker threads to write descriptors to slots in the request ring corresponding to the returned indexes without contention from other worker threads. The ring overflow guard prevents valid descriptors from being overwritten before they are taken off the ring by the accelerator(s). The request ring metadata is used indicate a valid/invalid status of the ring entries.

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