Abstract:
In one embodiment, the present invention includes a method for handling a request received in an agent designed in accordance with a peripheral component interconnect (PCI) specification using PCI Express™ semantics. More specifically, responsive to determining that the agent does not support the request, an unsupported request detection register of the agent can be updated, and a response sent from the agent to indicate that the agent does not support the request. Other embodiments are described and claimed.
Abstract:
In one embodiment, the present invention includes a method for receiving a request in a router from a first endpoint coupled to the router, where the request is for an aggregated completion. In turn, the router can forward the request to multiple target agents, receive a response from each of the target agents, and consolidate the responses into an aggregated completion. Then, the router can send the aggregated completion to the first endpoint. Other embodiments are described and claimed.
Abstract:
In one embodiment, the present invention includes a method for receiving a request in a router from a first endpoint coupled to the router, where the request is for an aggregated completion. In turn, the router can forward the request to multiple target agents, receive a response from each of the target agents, and consolidate the responses into an aggregated completion. Then, the router can send the aggregated completion to the first endpoint. Other embodiments are described and claimed.
Abstract:
In one embodiment, the present invention includes method for entering a credit initialization state of an agent state machine of an agent coupled to a fabric to initialize credits in a transaction credit tracker of the fabric. This tracker tracks credits for transaction queues of a first channel of the agent for a given transaction type. The agent may then assert a credit initialization signal to cause credits to be stored in the transaction credit tracker corresponding to the number of the transaction queues of the first channel of the agent for the first transaction type. Other embodiments are described and claimed.
Abstract:
In one embodiment, the present invention is directed to method for receiving a packet in a first agent, where the packet includes a first packet header with an expanded header indicator. Based on this indicator, the agent can determine if the packet includes one or more additional packet headers. If so, the agent can next determining if it supports information in the additional packet header based on a header identifier of the additional header. Other embodiments are described and claimed.
Abstract:
In one embodiment, a system on chip includes a first endpoint to issue a non-posted memory write transaction to a memory and a Peripheral Component Interconnect (PCI)-based fabric including control logic to direct the non-posted memory write transaction to the memory, receive a completion for the non-posted memory write transaction from the memory and route the completion to the first endpoint. Other embodiments are described and claimed.
Abstract:
An apparatus with an ultra low power architecture is described herein. The apparatus includes a first power supply rail, wherein a plurality of subsystems are to be powered by the first power supply rail. The apparatus also includes a second power supply rail, wherein a plurality of autonomous subsystems are to be powered by the power supply rail, wherein the second power supply rail is to be always on, always available, and low power.
Abstract:
In one embodiment, the present invention includes a method for receiving a request in a router from a first endpoint coupled to the router, where the request is for an aggregated completion. In turn, the router can forward the request to multiple target agents, receive a response from each of the target agents, and consolidate the responses into an aggregated completion. Then, the router can send the aggregated completion to the first endpoint. Other embodiments are described and claimed.
Abstract:
According to one embodiment, a system on a chip includes multiple agents each corresponding to an intellectual property (IP) logic and a fabric to couple the agents. The fabric can include a primary message interface and a sideband message interface. The fabric further includes one or more routers to provide out-of-band communications between the agents via this sideband message interface. To effect such communication, the router can perform a subset of ordering rules of a personal computer (PC)-based specification for sideband messages. Other embodiments are described and claimed.