公开(公告)号：US20240045490A1

公开(公告)日：2024-02-08

申请号：US18449890

申请日：2023-08-15

Applicant: INTEL CORPORATION

Inventor： Jianfang Zhu ,  Deepak Samuel Kirubakaran ,  Raoul Rivas Toledano ,  Chee Lim Nge ,  Rajshree Chabukswar ,  James Hermerding, II ,  Sudheer Nair ,  William Braun ,  Zhongsheng Wang ,  Russell Fenger ,  Udayan Kapaley

IPC: G06F1/329 ,  G06F1/3228 ,  G06F9/38 ,  G06F9/48

CPC classification number: G06F1/329 ,  G06F1/3228 ,  G06F9/3836 ,  G06F9/4812 ,  G06F9/4893

Abstract: In one embodiment, a processor includes: at least one core; and a power controller coupled to the at least one core. The power controller may include: a workload monitor circuit to calculate a background task ratio based on a first amount of time that the at least one core executed background tasks during an active duration; and a control circuit to dynamically apply a power management policy for a background mode when the background task ratio exceeds a background mode threshold, the power management policy for the background mode to reduce power consumption of the processor. Other embodiments are described and claimed.

公开(公告)号：US11422616B2

公开(公告)日：2022-08-23

申请号：US16830485

申请日：2020-03-26

Applicant: Intel Corporation

Inventor： Jianfang Zhu ,  Deepak Samuel Kirubakaran ,  Raoul Rivas Toledano ,  Chee Lim Nge ,  Rajshree Chabukswar ,  James Hermerding, II ,  Sudheer Nair ,  William Braun ,  Zhongsheng Wang ,  Russell Fenger ,  Udayan Kapaley

IPC: G06F1/32 ,  G06F1/329 ,  G06F1/3228 ,  G06F9/38 ,  G06F9/48

Abstract: In one embodiment, a processor includes: at least one core; and a power controller coupled to the at least one core. The power controller may include: a workload monitor circuit to calculate a background task ratio based on a first amount of time that the at least one core executed background tasks during an active duration; and a control circuit to dynamically apply a power management policy for a background mode when the background task ratio exceeds a background mode threshold, the power management policy for the background mode to reduce power consumption of the processor. Other embodiments are described and claimed.

公开(公告)号：US20220224135A1

公开(公告)日：2022-07-14

申请号：US17338488

申请日：2021-06-03

Applicant: Intel Corporation

Inventor： Naoki Matsumura ,  Tod Schiff ,  Zhongsheng Wang ,  Chee Lim Nge ,  Ming-Chia Lee ,  Ivy Li ,  Brice Onken ,  Qiyong Brian Bian ,  John Valavi ,  Ling-shun Wong

IPC: H02J7/00 ,  G06N3/04 ,  G06N3/08

Abstract: A software and/or hardware to monitor system usage including how long system ran on a battery or with an AC adapter. The software and/or hardware judges whether fast charging is needed and/or how much charge is needed, and optimizes battery charging settings.

公开(公告)号：US12181947B2

公开(公告)日：2024-12-31

申请号：US17030175

申请日：2020-09-23

Applicant: Intel Corporation

Inventor： Chee Lim Nge ,  Alexander Uan-Zo-li ,  Zhongsheng Wang ,  James Hermerding, II ,  Caren Magi

IPC: G06F1/3212 ,  G06F1/32 ,  G06F1/3234

Abstract: A driver (e.g., a firmware or software) that improves the performance of the system-on-chip (SoC) in battery mode. The driver is a Peak Power Manager (PPM) which allows drastically higher SoC peak power limit levels (and thus higher Turbo performance) in battery mode. The PPM sets the Vth threshold voltage (the voltage level at which the platform will throttle the SoC) in such a way as to prevent the system from unexpected shutdown (or black screening). The PPM calculates the Psoc,pk SoC Peak Power Limit (e.g., PL4), according to the threshold voltage (Vth). These are two dependent parameters, if one is set, the other can be calculated. The scheme by the PPM is used to optimally set one parameter (Vth) based on the system parameters, and the history of the operation.

公开(公告)号：US20240004450A1

公开(公告)日：2024-01-04

申请号：US18215034

申请日：2023-06-27

Applicant: Intel Corporation

Inventor： Zhongsheng Wang ,  James Hermerding, II

IPC: G06F1/3206 ,  G06F15/78 ,  G06F9/50 ,  G06F1/20 ,  G06F1/324 ,  G06F15/76

CPC classification number: G06F1/3206 ,  G06F15/7807 ,  G06F9/5083 ,  G06F1/206 ,  G06F1/324 ,  G06F15/76 ,  G06F2015/761

Abstract: Methods, apparatus, systems and articles of manufacture are disclosed to monitor and manage usage of resources on a computing platform. An example apparatus includes a processor and a subsystem. The example processor includes a modified operating system, the operating system modified to monitor application execution via the processor to determine a usage scenario for the apparatus. The example processor includes an index generator to generate a system usage scenario index quantifying a snapshot of the usage scenario for the processor and the subsystem of the apparatus. The example processor includes a rebalancer to reallocate resources of at least one of the processor or the subsystem based on the system usage scenario index.

公开(公告)号：US11775047B2

公开(公告)日：2023-10-03

申请号：US17879256

申请日：2022-08-02

Applicant: INTEL CORPORATION

Inventor： Jianfang Zhu ,  Deepak Samuel Kirubakaran ,  Raoul Rivas Toledano ,  Chee Lim Nge ,  Rajshree Chabukswar ,  James Hermerding, II ,  Sudheer Nair ,  William Braun ,  Zhongsheng Wang ,  Russell Fenger ,  Udayan Kapaley

IPC: G06F1/32 ,  G06F1/329 ,  G06F1/3228 ,  G06F9/38 ,  G06F9/48

CPC classification number: G06F1/329 ,  G06F1/3228 ,  G06F9/3836 ,  G06F9/4812 ,  G06F9/4893

Abstract: In one embodiment, a processor includes: at least one core; and a power controller coupled to the at least one core. The power controller may include: a workload monitor circuit to calculate a background task ratio based on a first amount of time that the at least one core executed background tasks during an active duration; and a control circuit to dynamically apply a power management policy for a background mode when the background task ratio exceeds a background mode threshold, the power management policy for the background mode to reduce power consumption of the processor. Other embodiments are described and claimed.

公开(公告)号：US20220407337A1

公开(公告)日：2022-12-22

申请号：US17354944

申请日：2021-06-22

Applicant: Intel Corporation

Inventor： Zhongsheng Wang ,  Chee Lim Nge ,  Sze Ling Yeap ,  Efraim Rotem ,  James Hermerding II ,  Ashraf Wadaa

IPC: H02J7/00

Abstract: A hardware and/or software (e.g., a controller and/or firmware or software) that monitors a remaining capacity of a battery and adjusts a continuum of system performance settings ranging from best performance to best energy efficiency. The controller starts with best performance setting (at the expense of energy efficiency), and then the controller gradually shifts toward energy efficiency setting (at the expense of performance) when a battery usage exceeds a pre-defined drain rate (e.g., there is a deficit in the battery remaining capacity until the next charge). The controller reverts from energy efficiency setting towards high performance setting when the battery drain rate or discharge rate slows down (e.g., there is a surplus in the battery remaining capacity until the next charge).

公开(公告)号：US20220374066A1

公开(公告)日：2022-11-24

申请号：US17879256

申请日：2022-08-02

Applicant: INTEL CORPORATION

Inventor： JIANFANG ZHU ,  Deepak Samuel Kirubakaran ,  Raoul Rivas Toledano ,  Chee Lim Nge ,  Rajshree Chabukswar ,  James Hermerding, II ,  Sudheer Nair ,  William Braun ,  Zhongsheng Wang ,  Russell Fenger ,  Udayan Kapaley

IPC: G06F1/329 ,  G06F1/3228 ,  G06F9/38 ,  G06F9/48

Abstract: In one embodiment, a processor includes: at least one core; and a power controller coupled to the at least one core. The power controller may include: a workload monitor circuit to calculate a background task ratio based on a first amount of time that the at least one core executed background tasks during an active duration; and a control circuit to dynamically apply a power management policy for a background mode when the background task ratio exceeds a background mode threshold, the power management policy for the background mode to reduce power consumption of the processor. Other embodiments are described and claimed.

公开(公告)号：US11449127B2

公开(公告)日：2022-09-20

申请号：US16642694

申请日：2017-09-28

Applicant: Intel Corporation

Inventor： Eugene Gorbatov ,  Alexander Uan-Zo-Li ,  Chee Lim Nge ,  James Hermerding, II ,  Zhongsheng Wang

IPC: G06F1/00 ,  G06F1/3296 ,  G06F1/28

Abstract: Peak power setting circuitry is provided to set a peak power value for an integrated circuit device. A power supply interface is to receive a value to estimate a peak power capacity of a power supply serving the integrated circuit device and processing circuitry is provided to calculate an approximate peak power for the integrated circuit device. A peak power for the integrated circuit device is determined by increasing the approximate peak power depending on an amount by which the integrated circuit device power is reduced in response to assertion of a throttling signal.

公开(公告)号：US20220091644A1

公开(公告)日：2022-03-24

申请号：US17540550

申请日：2021-12-02

Applicant: Intel Corporation

Inventor： Samantha Rao ,  Zhongsheng Wang ,  Somvir Singh Dahiya ,  Chee Lim Nge ,  Siang Yeong Tan ,  Chia-Hung S. Kuo

IPC: G06F1/20 ,  G06F1/3296 ,  G01R19/165 ,  G06F1/324

Abstract: A first circuit to receive from a sensor a thermal condition of a voltage regulator while circuitry comprising the voltage regulator is to regulate delivery of power to a power domain having first and second components. The circuitry is to control a first power consumption rate of the first component based on a first parameter and control a second power consumption rate of the second component based on a second parameter. The first circuit monitors the thermal condition and generates an evaluation result based on a test criterion. A second circuit receives from the first circuit a signal based on the evaluation result. Based on the signal, the second circuit is to signal the circuitry to change the first parameter. An amount of any change to the second parameter based on the evaluation result is different than an amount of change to the first parameter based on the evaluation result.