公开(公告)号：US10739844B2

公开(公告)日：2020-08-11

申请号：US15969198

申请日：2018-05-02

申请人： Intel Corporation

发明人： Chee Lim Nge ,  James G. Hermerding, II ,  Pronay Dutta ,  Joshua Resch

IPC分类号： G06F1/32 ,  G06F1/3296 ,  G06F9/48 ,  G06F1/3206 ,  G06F1/324 ,  G06F1/3234 ,  G06F1/26 ,  G06F9/50 ,  G06F1/30 ,  G06F1/329 ,  G06F1/3212

摘要： In one embodiment, a processor includes: a plurality of processing elements to perform operations; a power management agent (PMA) coupled to the plurality of processing elements to control power consumption of the plurality of processing elements; and a throttling circuit coupled to the PMA. The throttling circuit is to determine a throttling power level for the plurality of processing elements based at least in part on translation information communicated from the PMA. Other embodiments are described and claimed.

公开(公告)号：US10204068B2

公开(公告)日：2019-02-12

申请号：US15901351

申请日：2018-02-21

申请人： Intel Corporation

发明人： Chee Lim Nge ,  Tod Schiff ,  Vijayakumar Dibbad ,  Alan Hallberg

IPC分类号： G06F3/00 ,  G06F13/38 ,  G06F13/40 ,  G06F13/42

摘要： Some embodiments include apparatuses and methods having a node to couple to a serial bus, and a controller to provide a control signal to one of a first circuit path and a second circuit path in order to change electrical termination of a signal at the node between a first electrical termination through the first circuit path during a first mode of the controller and a second electrical termination through the second circuit path during a second mode of the controller. The controller can be arranged to provide the control signal to the first and second circuit paths during the first and second modes without providing another control signal from the controller to the first and second circuit paths during the first and second modes.

公开(公告)号：US20180181515A1

公开(公告)日：2018-06-28

申请号：US15901351

申请日：2018-02-21

申请人： Intel Corporation

发明人： Chee Lim Nge ,  Tod Schiff ,  Vijayakumar Dibbad ,  Alan Hallberg

IPC分类号： G06F13/38 ,  G06F13/42 ,  G06F13/40

CPC分类号： G06F13/385 ,  G06F13/382 ,  G06F13/4068 ,  G06F13/4282

摘要： Some embodiments include apparatuses and methods having a node to couple to a serial bus, and a controller to provide a control signal to one of a first circuit path and a second circuit path in order to change electrical termination of a signal at the node between a first electrical termination through the first circuit path during a first mode of the controller and a second electrical termination through the second circuit path during a second mode of the controller. The controller can be arranged to provide the control signal to the first and second circuit paths during the first and second modes without providing another control signal from the controller to the first and second circuit paths during the first and second modes.

公开(公告)号：US11940855B2

公开(公告)日：2024-03-26

申请号：US17068709

申请日：2020-10-12

申请人： Intel Corporation

发明人： Ashwin Umapathy ,  Chee Lim Nge ,  Timothy Smith ,  Dmitriy Berchanskiy ,  Vinay Raghav

IPC分类号： G06F1/26

CPC分类号： G06F1/26

摘要： Three components are used to adjust the CPU peak power based on the USB TYPE-C device states. These components include operating system (OS) Peak Power Manager, USB TYPE-C Connector Manager, and USB TYPE-C Protocol Device Driver. The USB TYPE-C Connector Manager sends a synchronous request to the OS Peak Power Manager when a USB TYPE-C power sink device is attached or detached, and the USB TYPE-C Protocol Device Driver sends a synchronous request to the Peak Power Manager when the power sink transitions device state. The Peak Power Manager takes power budget from the CPU when the USB TYPE-C connector is attached to a power sink and is active (e.g., high power device state), and gives back the power budget to the CPU for performance when the USB TYPE-C connector is either detached or the attached and power sink device is idle (lowest device state).

公开(公告)号：US20240045490A1

公开(公告)日：2024-02-08

申请号：US18449890

申请日：2023-08-15

申请人： INTEL CORPORATION

发明人： Jianfang Zhu ,  Deepak Samuel Kirubakaran ,  Raoul Rivas Toledano ,  Chee Lim Nge ,  Rajshree Chabukswar ,  James Hermerding, II ,  Sudheer Nair ,  William Braun ,  Zhongsheng Wang ,  Russell Fenger ,  Udayan Kapaley

IPC分类号： G06F1/329 ,  G06F1/3228 ,  G06F9/38 ,  G06F9/48

CPC分类号： G06F1/329 ,  G06F1/3228 ,  G06F9/3836 ,  G06F9/4812 ,  G06F9/4893

摘要： In one embodiment, a processor includes: at least one core; and a power controller coupled to the at least one core. The power controller may include: a workload monitor circuit to calculate a background task ratio based on a first amount of time that the at least one core executed background tasks during an active duration; and a control circuit to dynamically apply a power management policy for a background mode when the background task ratio exceeds a background mode threshold, the power management policy for the background mode to reduce power consumption of the processor. Other embodiments are described and claimed.

公开(公告)号：US11592884B2

公开(公告)日：2023-02-28

申请号：US16648206

申请日：2018-01-25

申请人： Intel Corporation

发明人： Chee Lim Nge ,  Chia-Hung Kuo ,  Nivedita Aggarwal ,  Venkataramani Gopalakrishnan ,  Robert Gough ,  Basavaraj Astekar ,  Vijaykumar Kadgi

IPC分类号： G06F1/26 ,  G06F1/3293 ,  G06F9/4401 ,  G06F13/42

摘要： Apparatus and methods for managing power consumption of a data-path in a computer system are provided, the data-path comprising a first port and a second port, the first port comprising a high-speed and the second port comprising a low-speed port. The disclosed method including connecting a device to the data-path, determining that the connected device is to communicate using the second port and turning off an active circuit associated with the first port of the data-path.

公开(公告)号：US11422616B2

公开(公告)日：2022-08-23

申请号：US16830485

申请日：2020-03-26

申请人： Intel Corporation

发明人： Jianfang Zhu ,  Deepak Samuel Kirubakaran ,  Raoul Rivas Toledano ,  Chee Lim Nge ,  Rajshree Chabukswar ,  James Hermerding, II ,  Sudheer Nair ,  William Braun ,  Zhongsheng Wang ,  Russell Fenger ,  Udayan Kapaley

IPC分类号： G06F1/32 ,  G06F1/329 ,  G06F1/3228 ,  G06F9/38 ,  G06F9/48

摘要： In one embodiment, a processor includes: at least one core; and a power controller coupled to the at least one core. The power controller may include: a workload monitor circuit to calculate a background task ratio based on a first amount of time that the at least one core executed background tasks during an active duration; and a control circuit to dynamically apply a power management policy for a background mode when the background task ratio exceeds a background mode threshold, the power management policy for the background mode to reduce power consumption of the processor. Other embodiments are described and claimed.

公开(公告)号：US20220224135A1

公开(公告)日：2022-07-14

申请号：US17338488

申请日：2021-06-03

申请人： Intel Corporation

发明人： Naoki Matsumura ,  Tod Schiff ,  Zhongsheng Wang ,  Chee Lim Nge ,  Ming-Chia Lee ,  Ivy Li ,  Brice Onken ,  Qiyong Brian Bian ,  John Valavi ,  Ling-shun Wong

IPC分类号： H02J7/00 ,  G06N3/04 ,  G06N3/08

摘要： A software and/or hardware to monitor system usage including how long system ran on a battery or with an AC adapter. The software and/or hardware judges whether fast charging is needed and/or how much charge is needed, and optimizes battery charging settings.

公开(公告)号：US20190220435A1

公开(公告)日：2019-07-18

申请号：US16363851

申请日：2019-03-25

申请人： INTEL CORPORATION

发明人： Chee Lim Nge ,  Basavaraj B. Astekar ,  Jenn Chuan Cheng

IPC分类号： G06F13/42 ,  G06F1/26 ,  G06F1/3287

CPC分类号： G06F13/4282 ,  G06F1/263 ,  G06F1/266 ,  G06F1/3287 ,  Y02D10/14 ,  Y02D10/151

摘要： In some examples, a power delivery system includes a primary power path to provide power to a computing system. The power delivery system also includes a bypass power path. A port manager is to disable the primary power path and to enable the bypass power path in response to a dead battery condition.

公开(公告)号：US20180284879A1

公开(公告)日：2018-10-04

申请号：US15477046

申请日：2017-04-01

申请人： Intel Corporation

发明人： Eugene Gorbatov ,  Alexander B. Uan-Zo-Li ,  Muhammad Abozaed ,  Efraim Rotem ,  Tod F. Schiff ,  James G. Hermerding, II ,  Chee Lim Nge

IPC分类号： G06F1/32 ,  G06F15/78

摘要： In some examples, a peak power system includes a plurality of system components, one or more of the system components to dynamically provide a peak power requirement of the component. The system also includes a peak power manager to receive the peak power requirement of the one or more of the system components. The peak power manager can also dynamically provide, based on a system peak power limit and based on at least one updated peak power requirement received from at least one of the one or more system components, an updated component peak power limit to one or more of the system components.