公开(公告)号：US20160164497A1

公开(公告)日：2016-06-09

申请号：US14560109

申请日：2014-12-04

Applicant: International Business Machines Corporation

Inventor： Navin Agarwal ,  Igor Arsovski ,  Venkatraghavan Bringivijayaraghavan ,  Krishnan S. Rengarajan

IPC: H03K3/011 ,  H01L27/02 ,  H03K17/687 ,  H01L27/092

CPC classification number: H03K3/011 ,  H01L27/0266 ,  H03K17/687 ,  H03K19/00369

Abstract: A circuit structure is provided. The circuit structure includes first pfet device. The circuit structure further includes a first nfet device connected to the pfet device. The circuit structure further includes a keeper nfet device that reduces stress associated with the first nfet device by keeping the first nfet device off during its functional state. The circuit structure further includes a keeper pfet device that reduces stress associated with the first pfet device by keeping the first pfet device off during its functional state.

Abstract translation: 提供电路结构。 电路结构包括第一pfet器件。 电路结构还包括连接到pfet器件的第一nfet器件。 电路结构还包括保持器nfet器件，其通过在其功能状态期间保持第一nfet器件而关闭与第一nfet器件相关联的应力。 电路结构还包括保持器pfet装置，其通过在其功能状态期间保持第一pfet装置关闭来减少与第一pfet装置相关联的应力。

公开(公告)号：US20160140243A1

公开(公告)日：2016-05-19

申请号：US14546318

申请日：2014-11-18

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Samuel S. Adams ,  Igor Arsovski ,  Suparna Bhattacharya ,  John M. Cohn ,  Gary P. Noble ,  Krishnan S. Rengarajan

IPC: G06F17/30

CPC classification number: G06F16/9024 ,  G06F16/2457 ,  G06F16/35 ,  G06F16/9535

Abstract: A scoped search engine is disclosed. The scoped search engine includes a memory unit storing reference data records. The scoped search engine also includes a data comparison unit that searches the reference data records using different searches. The scoped search engine further includes a match analysis unit that combines result data from the different searches and determines a scope for a subsequent search based on the combined result data.

Abstract translation: 公开了范围搜索引擎。 范围搜索引擎包括存储参考数据记录的存储单元。 范围搜索引擎还包括数据比较单元，其使用不同的搜索来搜索参考数据记录。 作用域搜索引擎还包括匹配分析单元，其合并来自不同搜索的结果数据，并且基于组合结果数据确定后续搜索的范围。

公开(公告)号：US20140328103A1

公开(公告)日：2014-11-06

申请号：US13888108

申请日：2013-05-06

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Igor Arsovski

IPC: G11C15/04

CPC classification number: G11C15/04 ,  G06F11/1064 ,  G06F12/1027 ,  G06F17/30982 ,  G11C11/5642 ,  G11C15/043

Abstract: A content-addressable memory (CAM) with computational capability is described. The CAM includes an array of CAM cells arranged in rows and columns with a pair of search lines associated with each column of the array and a match line associated with each row of the array. The array of CAM cells is configured to implement, for a given cycle, either a read operation of data contained in a single selected column, or one of a plurality of different bitwise logical operations on data contained in multiple selected columns. All of the pairs of search lines in the columns of the array are configured to a certain state to implement the read operation or one of the plurality of different bitwise logical operations. A result of the read operation or one of the plurality of different bitwise logical operations is outputted onto all of the match lines in the array.

Abstract translation: 描述了具有计算能力的内容寻址存储器（CAM）。 CAM包括以行和列布置的一系列CAM单元阵列，其中具有与阵列的每列相关联的一对搜索线以及与阵列的每一行相关联的匹配线。 CAM单元的阵列被配置为针对给定的周期对包含在单个选定列中的数据的读取操作或对包含在多个选定列中的数据的多个不同的按位逻辑运算中的一个执行。 阵列列中的所有搜索线对被配置为一定的状态以实现读取操作或多个不同的逐位逻辑运算中的一个。 将读取操作或多个不同的按位逻辑运算中的一个输出到阵列中的所有匹配线上。

公开(公告)号：US11293980B2

公开(公告)日：2022-04-05

申请号：US17132820

申请日：2020-12-23

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Igor Arsovski ,  John R. Goss ,  Eric D. Hunt-Schroeder ,  Andrew K. Killorin

IPC: G01R31/3177

Abstract: Systems and methods are provided for implementing customer-transparent logic redundancy in scan chains for improved yield of integrated circuits. More specifically, an integrated circuit structure is provided for that includes a plurality of combined latch structures. Each of the combined latch structures includes an original latch and a redundant latch. The integrated circuit structure further includes a plurality of combined logic structures. Each of the combined logic structures includes an original logic structure a redundant logic structure. Each redundant latch is a duplicate of each respective original latch within a combined latch structure and each redundant logic structure is a duplicate of each respective original logic structure within a combined logic structure such that a two-fold library of latches and logic is provided for one or more scan chains of the integrated circuit structure.

公开(公告)号：US09601200B2

公开(公告)日：2017-03-21

申请号：US14734504

申请日：2015-06-09

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Igor Arsovski ,  Michael T. Fragano ,  Thomas M. Maffitt

IPC: G11C15/04 ,  G11C15/00 ,  G11C11/413

CPC classification number: G11C15/04 ,  G11C11/413 ,  G11C15/00

Abstract: A ternary content addressable memory (TCAM) structure may activate individual groups of subarrays in the TCAM structure, during a non-search mode, at configurable intervals of time. The activating causes the TCAM structure to select locations and sequences in which subarrays of the TCAM structure are activated or deactivated. When activating, the TCAM structure is configured to perform a dummy search within the particular subarray. The activating reduces a change in current during transition between a search mode and the non-search mode.

公开(公告)号：US09542981B2

公开(公告)日：2017-01-10

申请号：US13972149

申请日：2013-08-21

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Igor Arsovski ,  Travis R. Hebig

IPC: G11C7/00 ,  G11C7/08 ,  G11C15/04 ,  G11C7/12 ,  G11C16/10 ,  G11C16/04 ,  G11C16/24 ,  G11C16/26 ,  G11C16/34 ,  G11C7/06 ,  G11C11/419

CPC classification number: G11C7/08 ,  G11C7/067 ,  G11C7/12 ,  G11C11/419 ,  G11C15/04 ,  G11C16/0483 ,  G11C16/10 ,  G11C16/24 ,  G11C16/26 ,  G11C16/3418 ,  Y10T29/49117

Abstract: An integrated circuit including a sense amplifier connected to a sense line is provided. The sense amplifier is configured to end a precharge phase of the sense line based on a state of the sense amplifier. A single-ended sense amplifier determines its own precharge level, ends the precharge phase, and starts evaluation as soon as precharge is ended, without waiting for a globally timed signal to end the precharge phase.

Abstract translation: 提供了包括连接到感测线的读出放大器的集成电路。 读出放大器被配置为基于感测放大器的状态结束感测线的预充电阶段。 单端读出放大器确定其自身的预充电电平，结束预充电阶段，并且一旦预充电结束就开始评估，而不等待全局定时信号结束预充电阶段。

公开(公告)号：US09472269B2

公开(公告)日：2016-10-18

申请号：US14178955

申请日：2014-02-12

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Igor Arsovski ,  Nathaniel R. Chadwick ,  John B. Deforge ,  Ezra D. B. Hall ,  Kirk D. Peterson

IPC: G11C11/419 ,  G11C29/06

CPC classification number: G11C11/419 ,  G11C29/06

Abstract: Methods, systems, and structures for stress balancing field effect transistors subject to bias temperature instability-caused threshold voltage shifts. A method includes characterizing fatigue of a location in a memory array by skewing a bit line voltage of the location. The method also includes determining that the location is unbalanced based on the characterizing. Further, the method includes inverting a logic state of the location. Additionally, the method includes changing a value of an inversion indicator corresponding to the location.

Abstract translation: 应力平衡场效应晶体管的方法，系统和结构受到偏置温度不稳定性引起的阈值电压偏移。 一种方法包括通过偏移位置的位线电压来表征存储器阵列中的位置的疲劳。 该方法还包括基于特征确定位置不平衡。 此外，该方法包括反转位置的逻辑状态。 此外，该方法包括改变对应于该位置的反转指示符的值。

公开(公告)号：US09082484B1

公开(公告)日：2015-07-14

申请号：US14138374

申请日：2013-12-23

Applicant: International Business Machines Corporation

Inventor： Igor Arsovski ,  Derick G. Behrends ,  Todd A. Christensen ,  Travis R. Hebig ,  Michael Launsbach

IPC: G11C15/00 ,  G11C15/04 ,  G06F17/50

CPC classification number: G11C15/046 ,  G06F17/5054 ,  G06F2217/64 ,  G06F2217/86 ,  G11C15/04

Abstract: A TCAM may have a plurality of rows of cells. Each row may have a match line. Each cell may have elements for storing first and second bits, and compare circuitry associated to determine matches between a bit of a search word and data stored in the cell. For at least one first row of the rows, the TCAM includes a valid row cell having at least one element to store a partial update indication. The valid row cell may cause the match line associated with the first row to signal that the first row does not match a search word when the partial update indication associated with the first row is enabled. When the partial update indication associated with the first row is disabled, the determination of matches with a search word is performed solely by the compare circuitry without influence of the valid row cell.

公开(公告)号：US20150179262A1

公开(公告)日：2015-06-25

申请号：US14138374

申请日：2013-12-23

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Igor Arsovski ,  Derick G. Behrends ,  Todd A. Christensen ,  Travis R. Hebig ,  Michael Launsbach

IPC: G11C15/04 ,  G06F17/50

CPC classification number: G11C15/046 ,  G06F17/5054 ,  G06F2217/64 ,  G06F2217/86 ,  G11C15/04

Abstract: A TCAM may have a plurality of rows of cells. Each row may have a match line. Each cell may have elements for storing first and second bits, and compare circuitry associated to determine matches between a bit of a search word and data stored in the cell. For at least one first row of the rows, the TCAM includes a valid row cell having at least one element to store a partial update indication. The valid row cell may cause the match line associated with the first row to signal that the first row does not match a search word when the partial update indication associated with the first row is enabled. When the partial update indication associated with the first row is disabled, the determination of matches with a search word is performed solely by the compare circuitry without influence of the valid row cell.

Abstract translation: TCAM可以具有多行单元。 每行可能有一个匹配行。 每个小区可以具有用于存储第一和第二比特的元素，并且比较相关联的电路以确定搜索词的比特和存储在小区中的数据之间的匹配。 对于行的至少一行第一行，TCAM包括具有至少一个元素以存储部分更新指示的有效行单元。 当与第一行相关联的部分更新指示被启用时，有效行单元可能导致与第一行相关联的匹配行表示第一行与搜索词不匹配。 当与第一行相关联的部分更新指示被禁用时，与搜索字匹配的确定仅由比较电路执行而不影响有效行单元。

公开(公告)号：US20150179261A1

公开(公告)日：2015-06-25

申请号：US14282298

申请日：2014-05-20

Applicant: International Business Machines Corporation

Inventor： Igor Arsovski ,  Derick G. Behrends ,  Todd A. Christensen ,  Travis R. Hebig ,  Michael Launsbach

IPC: G11C15/04

CPC classification number: G11C15/046 ,  G06F17/5054 ,  G06F2217/64 ,  G06F2217/86 ,  G11C15/04

Abstract: A TCAM may have a plurality of rows of cells. Each row may have a match line. Each cell may have elements for storing first and second bits, and compare circuitry associated to determine matches between a bit of a search word and data stored in the cell. For at least one first row of the rows, the TCAM includes a valid row cell having at least one element to store a partial update indication. The valid row cell may cause the match line associated with the first row to signal that the first row does not match a search word when the partial update indication associated with the first row is enabled. When the partial update indication associated with the first row is disabled, the determination of matches with a search word is performed solely by the compare circuitry wi thout influence of the valid row cell.

Abstract translation: TCAM可以具有多行单元。 每行可能有一个匹配行。 每个小区可以具有用于存储第一和第二比特的元素，并且比较相关联的电路以确定搜索词的比特和存储在小区中的数据之间的匹配。 对于行的至少一行第一行，TCAM包括具有至少一个元素以存储部分更新指示的有效行单元。 当与第一行相关联的部分更新指示被启用时，有效行单元可能导致与第一行相关联的匹配行表示第一行与搜索词不匹配。 当与第一行相关联的部分更新指示被禁用时，与搜索字的匹配的确定仅由比较电路执行有效行单元的影响。