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公开(公告)号：US10169968B1
公开(公告)日：2019-01-01
申请号：US16048634
申请日：2018-07-30
Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
Inventor： James A. Busby , Phillip Duane Isaacs , William Santiago-Fernandez
IPC: G08B13/12
Abstract: Tamper-respondent assemblies and methods of fabrication are provided which include a multi-layer stack having multiple discrete component layers stacked and electrically connected together via a plurality of electrical contacts in between the component layers. Further, the tamper-respondent assembly includes a tamper-respondent electronic circuit structure embedded within the multi-layer stack. The tamper-respondent electronic circuit structure includes at least one tamper-respondent sensor embedded, at least in part, within at least one component layer of the multiple discrete component layers of the multi-layer stack. The tamper-respondent electronic circuit structure defines a secure volume within the multi-layer stack. For instance, the tamper-respondent electronic circuit structure may be fully embedded within the multi-layer stack, with monitor circuitry of the tamper-respondent electronic circuit structure residing within the secure volume within the multi-layer stack.
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公开(公告)号：US10143090B2
公开(公告)日：2018-11-27
申请号：US14886179
申请日：2015-10-19
Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
Inventor： William L. Brodsky , James A. Busby , Edward N. Cohen , Phillip Duane Isaacs
Abstract: Tamper-respondent assemblies and methods of fabrication are provided which include a tamper-respondent electronic circuit structure. The tamper-respondent electronic circuit structure includes, for instance, a tamper-respondent sensor having at least one flexible layer and paired conductive lines disposed on the at least one flexible layer. The paired conductive lines form, at least in part, at least one tamper-detect network of the tamper-respondent sensor. The tamper-respondent electronic circuit structure further includes monitor circuitry electrically connected to the paired conductive lines to differentially monitor the paired conductive lines for a tamper event. In enhanced embodiments, multiple interconnect vias electrically connect to two or more layers of paired conductive lines and are disposed in an unfolded interconnect area of the tamper-respondent sensor when the sensor is operatively positioned about an electronic component or assembly to be protected.
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公开(公告)号：US09916744B2
公开(公告)日：2018-03-13
申请号：US15053336
申请日：2016-02-25
Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
Inventor： James A. Busby , Phillip Duane Isaacs , William Santiago-Fernandez
CPC classification number: G08B13/12 , G08B13/128
Abstract: Tamper-respondent assemblies and methods of fabrication are provided which include a multi-layer stack having multiple discrete component layers stacked and electrically connected together via a plurality of electrical contacts in between the component layers. Further, the tamper-respondent assembly includes a tamper-respondent electronic circuit structure embedded within the multi-layer stack. The tamper-respondent electronic circuit structure includes at least one tamper-respondent sensor embedded, at least in part, within at least one component layer of the multiple discrete component layers of the multi-layer stack. The tamper-respondent electronic circuit structure defines a secure volume within the multi-layer stack. For instance, the tamper-respondent electronic circuit structure may be fully embedded within the multi-layer stack, with monitor circuitry of the tamper-respondent electronic circuit structure residing within the secure volume within the multi-layer stack.
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公开(公告)号：US09913362B2
公开(公告)日：2018-03-06
申请号：US14941860
申请日：2015-11-16
Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
Inventor： William L. Brodsky , James A. Busby , Zachary T. Dreiss , Michael J. Fisher , David C. Long , William Santiago-Fernandez , Thomas Weiss
CPC classification number: H05K1/0213 , G06F21/87 , H05K1/0275 , H05K1/183 , H05K5/0208 , H05K2201/10151
Abstract: Methods of fabricating tamper-respondent assemblies with bond protection are provided which include at least one tamper-respondent sensor having unexposed circuit lines forming, at least in part, one or more tamper-detect network(s), and the tamper-respondent sensor having at least one external bond region. The tamper-respondent assembly further includes at least one conductive trace and an adhesive. The conductive trace(s) forms, at least in part, the one or more tamper-detect network(s), and is exposed, at least in part, on the tamper-respondent sensor(s) within the external bond region(s). The adhesive contacts the conductive trace(s) within the external bond region(s) of the tamper-respondent sensor(s), and the adhesive, in part, facilitates securing the at least one tamper-respondent sensor within the tamper-respondent assembly. In enhanced embodiments, the conductive trace(s) is a chemically compromisable conductor susceptible to damage during a chemical attack on the adhesive within the external bond region(s).
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公开(公告)号：US10535619B2
公开(公告)日：2020-01-14
申请号：US16045880
申请日：2018-07-26
Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
Inventor： James A. Busby , Silvio Dragone , Michael A. Gaynes , Kenneth P. Rodbell , William Santiago-Fernandez
Abstract: Tamper-proof electronic packages and fabrication methods are provided which include a glass substrate. The glass substrate is stressed glass with a compressively-stressed surface layer. Further, one or more electronic components are secured to the glass substrate within a secure volume of the tamper-proof electronic package. In operation, the glass substrate is configured to fragment with an attempted intrusion event into the electronic package, and the fragmenting of the glass substrate also fragments the electronic component(s) secured to the glass substrate, thereby destroying the electronic component(s). In certain implementations, the glass substrate has undergone ion-exchange processing to provide the stressed glass. Further, the electronic package may include an enclosure, and the glass substrate may be located within the secure volume separate from the enclosure, or alternatively, the enclosure may be a stressed glass enclosure, an inner surface of which is the glass substrate for the electronic component(s).
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Patent Agency Ranking
公开(公告)号：US10535618B2
公开(公告)日：2020-01-14
申请号：US16045868
申请日：2018-07-26
Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
Inventor： James A. Busby , Silvio Dragone , Michael A. Gaynes , Kenneth P. Rodbell , William Santiago-Fernandez
Abstract: Tamper-proof electronic packages and fabrication methods are provided which include a glass substrate. The glass substrate is stressed glass with a compressively-stressed surface layer. Further, one or more electronic components are secured to the glass substrate within a secure volume of the tamper-proof electronic package. In operation, the glass substrate is configured to fragment with an attempted intrusion event into the electronic package, and the fragmenting of the glass substrate also fragments the electronic component(s) secured to the glass substrate, thereby destroying the electronic component(s). In certain implementations, the glass substrate has undergone ion-exchange processing to provide the stressed glass. Further, the electronic package may include an enclosure, and the glass substrate may be located within the secure volume separate from the enclosure, or alternatively, the enclosure may be a stressed glass enclosure, an inner surface of which is the glass substrate for the electronic component(s).
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公开(公告)号：US10531561B2
公开(公告)日：2020-01-07
申请号：US16285437
申请日：2019-02-26
Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
Inventor： Kathleen Ann Fadden , James A. Busby , David C. Long , John R. Dangler , Alexandra Echegaray , Michael J. Fisher , William Santiago-Fernandez
Abstract: Tamper-respondent assemblies and fabrication methods are provided which incorporate enclosure-to-circuit board protection. The tamper-respondent assemblies include a circuit board, and an enclosure mounted to the circuit board along an enclosure-to-board interface. The enclosure facilitates enclosing at least one electronic component coupled to the circuit board within a secure volume. A tamper-respondent electronic circuit structure facilitates defining the secure volume, and includes one or more tamper-detect circuits including at least one conductive trace disposed, at least in part, within the enclosure-to-board interface. The conductive trace(s) includes stress rise regions to facilitate tamper-detection at the enclosure-to-board interface. An adhesive is provided to secure the enclosure to the circuit board. The adhesive contacts, at least in part, the conductive trace(s) of the tamper-detect circuit(s) at the enclosure-to-board interface, including at the stress rise regions of the conductive trace(s).
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公开(公告)号：US10334722B2
公开(公告)日：2019-06-25
申请号：US15800497
申请日：2017-11-01
Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
Inventor： William L. Brodsky , James A. Busby , Phillip Duane Isaacs , David C. Long
IPC: H05K1/02 , H05K1/03 , H05K1/18 , H05K1/09 , H05K7/02 , H05K3/30 , H05K3/12 , H05K3/46 , H05K5/02
Abstract: Tamper-respondent assemblies and methods of fabrication are provided which include a tamper-respondent electronic circuit structure. The tamper-respondent electronic circuit structure includes a tamper-respondent sensor. The tamper-respondent sensor includes, for instance, at least one flexible layer having opposite first and second sides, and circuit lines forming at least one resistive network. The circuit lines are disposed on at least one of the first or second side of the at least one flexible layer, and have a line width Wl≤200 μm, as well as a line-to-line spacing width Ws≤200 μm. In certain enhanced embodiments, the tamper-respondent sensor includes multiple flexible layers, with a first flexible layer having first circuit lines, and a second flexible layer having second circuit lines, where the first and second circuit lines may have different line widths, different line-to-line spacings, and/or be formed of different materials.
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公开(公告)号：US10327329B2
公开(公告)日：2019-06-18
申请号：US15430842
申请日：2017-02-13
Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
Inventor： William L. Brodsky , James A. Busby , John R. Dangler , Silvio Dragone , Michael J. Fisher , David C. Long
Abstract: Tamper-respondent assemblies and methods of fabrication are provided which include an enclosure, an in-situ-formed tamper-detect sensor, and one or more flexible tamper-detect sensors. The enclosure encloses, at least in part, one or more electronic components to be protected, and the in-situ-formed tamper-detect sensor is formed in place over an inner surface of the enclosure. The flexible tamper-detect sensor(s) is disposed over the in-situ-formed tamper-detect sensor, such that the in-situ-formed tamper-detect sensor is between the inner surface of the enclosure and the flexible tamper-detect sensor(s). Together the in-situ-formed tamper-detect sensor and flexible tamper-detect sensor(s) facilitate defining, at least in part, a secure volume about the one or more electronic components.
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公开(公告)号：US10306753B1
公开(公告)日：2019-05-28
申请号：US15901985
申请日：2018-02-22
Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
Inventor： Kathleen Ann Fadden , James A. Busby , David C. Long , John R. Dangler , Alexandra Echegaray , Michael J. Fisher , William Santiago-Fernandez
Abstract: Tamper-respondent assemblies and fabrication methods are provided which incorporate enclosure-to-circuit board protection. The tamper-respondent assemblies include a circuit board, and an enclosure mounted to the circuit board along an enclosure-to-board interface. The enclosure facilitates enclosing at least one electronic component coupled to the circuit board within a secure volume. A tamper-respondent electronic circuit structure facilitates defining the secure volume, and includes one or more tamper-detect circuits including at least one conductive trace disposed, at least in part, within the enclosure-to-board interface. The conductive trace(s) includes stress rise regions to facilitate tamper-detection at the enclosure-to-board interface. An adhesive is provided to secure the enclosure to the circuit board. The adhesive contacts, at least in part, the conductive trace(s) of the tamper-detect circuit(s) at the enclosure-to-board interface, including at the stress rise regions of the conductive trace(s).
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