Low Latency Memory Access Control for Non-Volatile Memories
    14.
    发明申请
    Low Latency Memory Access Control for Non-Volatile Memories 有权
    非易失性存储器的低延迟存储器访问控制

    公开(公告)号:US20150143020A1

    公开(公告)日:2015-05-21

    申请号:US14082624

    申请日:2013-11-18

    Abstract: A memory is provided that comprises a bank of non-volatile memory cells configured into a plurality of banklets. Each banklet in the plurality of banklets can be enabled separately and independently of the other banklets in the bank of non-volatile memory cells. The memory further comprises peripheral banklet circuitry, coupled to the bank of a non-volatile memory array, that is configured to enable selected subsets of bit lines within a selected banklet within the plurality of banklets. Moreover, the memory comprises banklet select circuitry, coupled to the peripheral banklet circuitry, that is configured to select data associated with a selected banklet for reading out from the banklet or writing to the banklet.

    Abstract translation: 提供了一种存储器,其包括被配置成多个小金库的一组非易失性存储器单元。 可以独立且独立于非易失性存储单元组中的其他小金库启用多个小组中的每个小钞。 存储器还包括耦合到非易失性存储器阵列的存储体组合的外围电路组电路,其被配置为使能在所述多个小组内的所选小组内的位线的选定子集。 此外,存储器包括耦合到外围小金属电路的小金库选择电路,其被配置为选择与所选择的小金库相关联的数据,以从该小钞中读出或写入该小钞。

    Monitoring Aging of Silicon in an Integrated Circuit Device
    16.
    发明申请
    Monitoring Aging of Silicon in an Integrated Circuit Device 有权
    监测集成电路器件中硅的老化

    公开(公告)号:US20140244212A1

    公开(公告)日:2014-08-28

    申请号:US13775502

    申请日:2013-02-25

    CPC classification number: G01R31/2851

    Abstract: A mechanism is provided for determining a modeled age of a mufti-core processor. For each core in a set of cores in the multi-core processor, a determination is made of a temperature, a voltage, and a frequency at regular intervals for a set of degradations and a set of voltage domains, thereby forming the modeled age of the multi-core processor. A determination is made as to whether the modeled age of the multi-core processor is greater than an end-of-life value. Responsive to the modeled age of the multi-core processor being greater than an end-of-life value, an indication is sent that the multi-core processor requires replacement.

    Abstract translation: 提供了一种用于确定多核处理器的建模年龄的机制。 对于多核处理器中的一组核心中的每个核心,确定一组降级和一组电压域的规则间隔的温度,电压和频率,从而形成建模年龄 多核处理器。 确定多核处理器的建模年龄是否大于寿命终止值。 响应于多核处理器的建模年龄大于寿命终止值,发出多核处理器需要更换的指示。

    MULTI-BRANCH CURRENT/VOLTAGE SENSOR ARRAY
    17.
    发明申请
    MULTI-BRANCH CURRENT/VOLTAGE SENSOR ARRAY 有权
    多分支电流/电压传感器阵列

    公开(公告)号:US20140210453A1

    公开(公告)日:2014-07-31

    申请号:US13752668

    申请日:2013-01-29

    CPC classification number: G01R15/142 G01R15/183

    Abstract: A sensor array including multiple current sensors provides input for power measurement and management systems. The sensor array includes split ferrite cylinder portions connected by a frame, so that when the array is installed around multiple branch circuits in a power distribution panel or raceway, the ferrite cylinders are completed to surround the conductor(s) of the associated branch circuit. Voltage sensing may also be incorporated within the sensors by providing an electrically conductive plate, wire or other element that capacitively couples to the corresponding wire(s).

    Abstract translation: 包括多个电流传感器的传感器阵列为功率测量和管理系统提供输入。 传感器阵列包括通过框架连接的分离的铁氧体圆筒部分,使得当阵列安装在配电盘或滚道中的多个分支电路周围时,完成铁氧体磁体以包围相关联的分支电路的导体。 通过提供电容耦合到相应的导线的导电板,导线或其它元件,电压感测也可以并入传感器内。

    DATA CENTER POWER CONVERSION EFFICIENCY MANAGEMENT
    18.
    发明申请
    DATA CENTER POWER CONVERSION EFFICIENCY MANAGEMENT 有权
    数据中心功率转换效率管理

    公开(公告)号:US20140157013A1

    公开(公告)日:2014-06-05

    申请号:US14175582

    申请日:2014-02-07

    CPC classification number: G05F1/66 G06F1/26 H04L67/12 H05K7/1492 H05K7/1498

    Abstract: A data center energy management (DCEM) server configures a power supply in the data center. The DCEM server sums input alternating current (AC) power of the power supply to a total AC power of the data center, wherein the total AC power of the data center is a sum of AC power of a plurality of power supplies. The DCEM server sums output direct current (DC) power of the power supply to a total DC power of the data center and reports a ratio of total AC power to total DC power as data center power conversion efficiency. The DCEM server sets a preset power supply efficiency threshold. The DCEM server determines that a real-time power efficiency level is below the power supply efficiency threshold. The DCEM server, responsive to a determination that real-time power efficiency level is below the power supply efficiency threshold, may remedy the power supply.

    Abstract translation: 数据中心能量管理(DCEM)服务器配置数据中心的电源。 DCEM服务器将电源的输入交流电(AC)功率与数据中心的总AC电力相加,其中数据中心的总AC功率是多个电源的AC功率之和。 DCEM服务器将电源的直流输出直流功率与数据中心的总直流功率相加,并将总的交流电与总的直流功率之比报告为数据中心的电源转换效率。 DCEM服务器设置预设的电源效率阈值。 DCEM服务器确定实时功率效率水平低于电源效率阈值。 响应于确定实时功率效率水平低于电源效率阈值的DCEM服务器可以补救电源。

    COMPUTING SYSTEM VOLTAGE CONTROL
    19.
    发明申请
    COMPUTING SYSTEM VOLTAGE CONTROL 有权
    计算系统电压控制

    公开(公告)号:US20140149763A1

    公开(公告)日:2014-05-29

    申请号:US13773841

    申请日:2013-02-22

    CPC classification number: G06F1/26 G06F1/3296 Y02D10/172

    Abstract: Computing system voltage control methods include receiving an indication of a first performance state. The first performance state is associated with a first voltage and applies to at least one computing system component. The indication of the first performance state is received by a first computing system component from a second computing system component. An indication of a second performance state is received, wherein the second performance state is associated with a second voltage that is not equal to the first voltage. It is determined whether the second performance state is within a range defined by a minimum performance state and a maximum performance state. Responsive to determining that the second performance state is within the range defined by the minimum performance state and the maximum performance state, the voltage of the at least one computing system component is set equal to the voltage associated with the second performance state.

    Abstract translation: 计算系统电压控制方法包括接收第一性能状态的指示。 第一性能状态与第一电压相关联并且应用于至少一个计算系统组件。 由第一计算系统组件从第二计算系统组件接收第一性能状态的指示。 接收第二性能状态的指示,其中第二性能状态与不等于第一电压的第二电压相关联。 确定第二性能状态是否在由最低性能状态和最大性能状态限定的范围内。 响应于确定第二性能状态在由最小性能状态和最大性能状态限定的范围内的情况下,将至少一个计算系统组件的电压设置为等于与第二执行状态相关联的电压。

    NON-CONTACT CURRENT AND VOLTAGE SENSING CLAMP
    20.
    发明申请
    NON-CONTACT CURRENT AND VOLTAGE SENSING CLAMP 有权
    非接触式电流和电压感测钳

    公开(公告)号:US20130076343A1

    公开(公告)日:2013-03-28

    申请号:US13682112

    申请日:2012-11-20

    Abstract: A clamping current and voltage sensor provides an isolated and convenient technique for measuring current passing through a conductor such as an AC branch circuit wire, as well as providing an indication of an electrostatic potential on the wire, which can be used to indicate the phase of the voltage on the wire, and optionally a magnitude of the voltage. The device includes a body formed from two handle portions that contain the current and voltage sensors within an aperture at the distal end, which may be a ferrite cylinder with a hall effect sensor disposed in a gap along the circumference to measure current, or alternatively a winding provided through the cylinder along its axis and a capacitive plate or wire disposed adjacent to, or within, the ferrite cylinder to provide the indication of the voltage. When the handles are compressed the aperture is opened to permit insertion of a wire for measurement.

    Abstract translation: 钳位电流和电压传感器提供隔离和方便的技术,用于测量通过诸如AC分支电路线的导体的电流,以及提供线上静电电位的指示,其可用于指示相位 导线上的电压,以及可选的电压幅度。 该装置包括由两个手柄部分形成的主体,该两个把手部分将远端的孔内的电流和电压传感器包含在内,该电极和电压传感器可以是沿着圆周设置在间隙中以测量电流的霍尔效应传感器的铁氧体磁体,或者替代地, 沿着其轴线提供通过圆柱体的绕组,以及邻近于铁氧体圆柱体或设置在铁氧体圆柱体内的电容板或线,以提供电压的指示。 当手柄被压缩时,孔被打开以允许插入用于测量的电线。

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