公开(公告)号：US20140321801A1

公开(公告)日：2014-10-30

申请号：US13872385

申请日：2013-04-29

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： John J. Ellis-Monaghan ,  Jeffrey P. Gambino ,  Mark D. Jaffe ,  Kirk D. Peterson ,  Jed H. Rankin

IPC: G02B6/12 ,  G02B6/13 ,  G02B6/26

CPC classification number: G02B6/4214 ,  G02B6/12002 ,  G02B6/125 ,  G02B6/136 ,  G02B6/3504 ,  G02B2006/12061 ,  G02B2006/12119 ,  G02B2006/12123 ,  G02B2006/12147

Abstract: An optical waveguide structure may include a dielectric layer having a top surface, an optical waveguide structure, and an optical coupler embedded within the dielectric layer. The optical coupler may have both a substantially vertical portion that couples to the top surface of the dielectric layer and a substantially horizontal portion that couples to the optical waveguide structure. The substantially vertical portion and the substantially horizontal portion are separated by a curved portion.

Abstract translation: 光波导结构可以包括具有顶表面的电介质层，光波导结构和嵌入电介质层内的光耦合器。 光耦合器可以具有耦合到电介质层的顶表面的大致垂直部分和耦合到光波导结构的基本上水平的部分。 大致垂直部分和大致水平部分被弯曲部分分开。

公开(公告)号：US20130161283A1

公开(公告)日：2013-06-27

申请号：US13775338

申请日：2013-02-25

Applicant: International Business Machines Corporation

Inventor： James W. Adkisson ,  Panglijen Candra ,  Thomas J. Dunbar ,  Jeffrey P. Gambino ,  Mark D. Jaffe ,  Anthony K. Stamper ,  Randy L. Wolf

IPC: H01L41/33 ,  H01L41/332

CPC classification number: H03H9/14538 ,  H03H3/08

Abstract: Disclosed herein is a surface acoustic wave (SAW) filter and method of making the same. The SAW filter includes a piezoelectric substrate; a planar barrier layer disposed above the piezoelectric substrate, and at least one conductor buried in the piezoelectric substrate and the planar barrier layer.

公开(公告)号：US10896992B2

公开(公告)日：2021-01-19

申请号：US16531649

申请日：2019-08-05

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： John J. Ellis-Monaghan ,  Jeffrey P. Gambino ,  Mark D. Jaffe ,  Kirk D. Peterson

IPC: H01L31/18 ,  H01L31/103 ,  H01L31/028 ,  H01L31/0232 ,  G02B6/12 ,  H01P1/17 ,  H01L31/02 ,  H01P3/16

Abstract: Photodiode structures and methods of manufacture are disclosed. The method includes forming a waveguide structure in a dielectric layer. The method further includes forming a Ge material in proximity to the waveguide structure in a back end of the line (BEOL) metal layer. The method further includes crystallizing the Ge material into a crystalline Ge structure by a low temperature annealing process with a metal layer in contact with the Ge material.

公开(公告)号：US10566235B2

公开(公告)日：2020-02-18

申请号：US15788536

申请日：2017-10-19

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Jeffrey P. Gambino ,  Mark D. Jaffe ,  Steven M. Shank ,  Anthony K. Stamper

IPC: H01L21/74 ,  H01L21/768 ,  H01L23/482 ,  H01L21/683 ,  H01L21/762 ,  H01L23/532 ,  H01L27/12 ,  H01L29/06 ,  H01L29/10

Abstract: A method for fabricating a backside contact using a silicon-on-insulator substrate that includes a device layer, a buried insulator layer, and a handle wafer. The method includes forming an electrically-conducting connection in a trench. The handle wafer is removed. After the handle wafer is removed, the buried insulator layer is partially removed to expose the electrically-conducting connection. After the buried insulator layer is partially removed, a final substrate is connected to the buried insulator layer such that the electrically-conducting connection contacts the final substrate.

公开(公告)号：US10224280B2

公开(公告)日：2019-03-05

申请号：US15824906

申请日：2017-11-28

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Jeffrey P. Gambino ,  Mark D. Jaffe ,  Steven M. Shank ,  Anthony K. Stamper

IPC: H01L29/40 ,  H01L23/528 ,  H01L21/768 ,  H01L21/762 ,  H01L21/683 ,  H01L23/522 ,  H01L27/12 ,  H01L29/06 ,  H01L23/485

Abstract: A back-side device structure with a silicon-on-insulator substrate that includes: a first dielectric layer that includes a first via that communicates with a trench, a contact plug that fills the trench, and a first contact formed in a second dielectric layer. The first contact fills the first via and connects with the contact plug and a wire formed in a third dielectric layer. A final substrate is connected to a buried insulator layer of the silicon-on-insulator substrate such that the contact plug contacts metallization of the final substrate.

公开(公告)号：US10164597B2

公开(公告)日：2018-12-25

申请号：US15691272

申请日：2017-08-30

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： James W. Adkisson ,  Panglijen Candra ,  Thomas J. Dunbar ,  Mark D. Jaffe ,  Anthony K. Stamper ,  Randy L. Wolf

IPC: H03H7/00 ,  H03H9/00 ,  H03H3/007 ,  H03H9/56 ,  H03H9/10 ,  H03H9/24 ,  G06F17/50 ,  H03H3/08 ,  H03H9/02 ,  H03H9/54 ,  H03H9/64 ,  H03H9/15 ,  H03H3/02

Abstract: Switchable and/or tunable filters, methods of manufacture and design structures are disclosed herein. The method of forming the filters includes forming at least one piezoelectric filter structure comprising a plurality of electrodes formed to be in contact with at least one piezoelectric substrate. The method further includes forming a micro-electro-mechanical structure (MEMS) comprising a MEMS beam in which, upon actuation, the MEMS beam will turn on the at least one piezoelectric filter structure by interleaving electrodes in contact with the piezoelectric substrate or sandwiching the at least one piezoelectric substrate between the electrodes.

公开(公告)号：US10074561B2

公开(公告)日：2018-09-11

申请号：US15274423

申请日：2016-09-23

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Jeffrey P. Gambino ,  Mark D. Jaffe ,  Steven M. Shank ,  Anthony K. Stamper

IPC: H01L21/768 ,  H01L23/482 ,  H01L21/762 ,  H01L23/532 ,  H01L27/12 ,  H01L29/06 ,  H01L29/10 ,  H01L21/683 ,  H01L21/74

CPC classification number: H01L21/76895 ,  H01L21/6835 ,  H01L21/743 ,  H01L21/76251 ,  H01L21/76898 ,  H01L23/4825 ,  H01L23/4827 ,  H01L23/53271 ,  H01L27/1203 ,  H01L29/0649 ,  H01L29/1087 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2221/68368

Abstract: A device structure is formed using a silicon-on-insulator substrate. The device structure includes a first switch and a second switch that are formed using a device layer of the silicon-on-insulator substrate. A trap-rich layer is between a substrate and a buried insulator layer of the silicon on-insulator substrate. An electrically-conducting connection is located in a trench extending from the device layer through the buried insulator layer to the trap-rich layer such that the electrically-conducting connection is coupled with the substrate. The electrically-conducting connection at least partially comprised of trap-rich material.

公开(公告)号：US09917005B2

公开(公告)日：2018-03-13

申请号：US15437736

申请日：2017-02-21

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Mark D. Jaffe ,  Alvin J. Joseph ,  Qizhi Liu ,  Anthony K. Stamper

IPC: H01L21/762 ,  H01L21/306 ,  H01L29/06

CPC classification number: H01L21/76289 ,  H01L21/02233 ,  H01L21/02238 ,  H01L21/02255 ,  H01L21/0273 ,  H01L21/26533 ,  H01L21/266 ,  H01L21/30604 ,  H01L21/76224 ,  H01L21/76283 ,  H01L21/76286 ,  H01L21/764 ,  H01L29/0649 ,  H01L29/0653 ,  H01L29/66651 ,  H01L29/66772 ,  H01L29/78

Abstract: A field effect transistor (FET) with an underlying airgap and methods of manufacture are disclosed. The method includes forming an amorphous layer at a predetermined depth of a substrate. The method further includes forming an airgap in the substrate under the amorphous layer. The method further includes forming a completely isolated transistor in an active region of the substrate, above the amorphous layer and the airgap.

公开(公告)号：US09666475B2

公开(公告)日：2017-05-30

申请号：US15083793

申请日：2016-03-29

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Mark D. Jaffe ,  Alvin J. Joseph ,  Qizhi Liu ,  Anthony K. Stamper

IPC: H01L21/266 ,  H01L21/764 ,  H01L29/06 ,  H01L29/78 ,  H01L29/66 ,  H01L21/265 ,  H01L21/762 ,  H01L21/306 ,  H01L21/02 ,  H01L21/027

CPC classification number: H01L21/76289 ,  H01L21/02233 ,  H01L21/02238 ,  H01L21/02255 ,  H01L21/0273 ,  H01L21/26533 ,  H01L21/266 ,  H01L21/30604 ,  H01L21/76224 ,  H01L21/76283 ,  H01L21/76286 ,  H01L21/764 ,  H01L29/0649 ,  H01L29/0653 ,  H01L29/66651 ,  H01L29/66772 ,  H01L29/78

Abstract: A field effect transistor (FET) with an underlying airgap and methods of manufacture are disclosed. The method includes forming an amorphous layer at a predetermined depth of a substrate. The method further includes forming an airgap in the substrate under the amorphous layer. The method further includes forming a completely isolated transistor in an active region of the substrate, above the amorphous layer and the airgap.

公开(公告)号：US20170123290A1

公开(公告)日：2017-05-04

申请号：US14927621

申请日：2015-10-30

Applicant: International Business Machines Corporation

Inventor： John J. Ellis-Monaghan ,  Jeffrey P. Gambino ,  Mark D. Jaffe ,  Kirk D. Peterson ,  Jed H. Rankin

IPC: G02F1/313 ,  G02F1/025 ,  G02F1/01

CPC classification number: G02F1/3137 ,  G02F1/0147 ,  G02F1/025 ,  G02F2201/58 ,  G02F2203/15

Abstract: Various particular embodiments include an optical structure, including: a photonic microring including an integral signal detector for detecting a level of an optical signal in the photonic microring; and a controller, coupled to the signal detector, for selectively adjusting a resonant frequency of the photonic microring based on the detected level of the optical signal in the photonic microring.