公开(公告)号：US10854739B2

公开(公告)日：2020-12-01

申请号：US16837337

申请日：2020-04-01

Applicant: Infineon Technologies AG

Inventor： Antonio Vellei ,  Markus Beninger-Bina ,  Matteo Dainese ,  Christian Jaeger ,  Johannes Georg Laven ,  Alexander Philippou ,  Francisco Javier Santos Rodriguez

IPC: H01L29/739 ,  H01L29/06 ,  H01L29/40 ,  H01L29/66 ,  H01L29/423 ,  H01L29/417 ,  H01L29/10 ,  H01L21/324 ,  H01L21/265 ,  H01L21/225 ,  H01L21/033

Abstract: A power semiconductor device includes: a drift region; a plurality of IGBT cells each having a plurality of trenches extending into the drift region along a vertical direction and laterally confining at least one active mesa which includes an upper section of the drift region; and an electrically floating barrier region of an opposite conductivity type as the drift region and spatially confined, in and against the vertical direction, by the drift region. A total volume of all active mesas is divided into first and second shares, the first share not laterally overlapping with the barrier region and the second share laterally overlapping with the barrier region. The first share carries the load current at least within a range of 0% to 100% of a nominal load current. The second share carries the load current if the load current exceeds at least 0.5% of the nominal load current.

公开(公告)号：US20200235232A1

公开(公告)日：2020-07-23

申请号：US16837337

申请日：2020-04-01

Applicant: Infineon Technologies AG

Inventor： Antonio Vellei ,  Markus Beninger-Bina ,  Matteo Dainese ,  Christian Jaeger ,  Johannes Georg Laven ,  Alexander Philippou ,  Francisco Javier Santos Rodriguez

IPC: H01L29/739 ,  H01L29/06 ,  H01L29/40 ,  H01L29/66 ,  H01L29/423 ,  H01L29/417 ,  H01L29/10 ,  H01L21/324 ,  H01L21/265 ,  H01L21/225 ,  H01L21/033

Abstract: A power semiconductor device includes: a drift region; a plurality of IGBT cells each having a plurality of trenches extending into the drift region along a vertical direction and laterally confining at least one active mesa which includes an upper section of the drift region; and an electrically floating barrier region of an opposite conductivity type as the drift region and spatially confined, in and against the vertical direction, by the drift region. A total volume of all active mesas is divided into first and second shares, the first share not laterally overlapping with the barrier region and the second share laterally overlapping with the barrier region. The first share carries the load current at least within a range of 0% to 100% of a nominal load current. The second share carries the load current if the load current exceeds at least 0.5% of the nominal load current.

公开(公告)号：US10608104B2

公开(公告)日：2020-03-31

申请号：US14228881

申请日：2014-03-28

Applicant: Infineon Technologies AG

Inventor： Alexander Philippou ,  Johannes Georg Laven ,  Christian Jaeger ,  Frank Wolter ,  Frank Pfirsch ,  Antonio Vellei

IPC: H01L29/78 ,  H01L29/40 ,  H01L29/06 ,  H01L29/08 ,  H01L29/10 ,  H01L29/417 ,  H01L29/423 ,  H01L29/739

Abstract: A transistor device includes a semiconductor mesa region between first and second trenches in a semiconductor body, a body region of a first conductivity type and a source region of a second conductivity type in the semiconductor mesa region, a drift region of the second conductivity type in the semiconductor body, and a gate electrode adjacent the body region in the first trench, and dielectrically insulated from the body region by a gate dielectric. The body region separates the source region from the drift region and extends to the surface of the semiconductor mesa region adjacent the source region. The body region comprises a surface region which adjoins the surface of the semiconductor mesa region and the first trench. The surface region has a higher doping concentration than a section of the body region that separates the source region from the drift region.

公开(公告)号：US20190123186A1

公开(公告)日：2019-04-25

申请号：US16168136

申请日：2018-10-23

Applicant: Infineon Technologies AG

Inventor： Alexander Philippou ,  Markus Bina ,  Matteo Dainese ,  Christian Jaeger ,  Johannes Georg Laven ,  Francisco Javier Santos Rodriguez ,  Antonio Vellei ,  Caspar Leendertz ,  Christian Philipp Sandow

IPC: H01L29/739 ,  H01L29/06 ,  H01L29/417 ,  H01L29/10 ,  H01L29/08

Abstract: A power semiconductor device includes an active cell region with a drift region, and IGBT cells at least partially arranged within the active cell region. Each IGBT cell includes at least one trench extending into the drift region along a vertical direction, an edge termination region surrounding the active cell region, and a transition region arranged between the active cell region and the edge termination region. The transition region has a width along a lateral direction from the active cell region towards the edge termination region. At least some of the IGBT cells are arranged within, or, respectively, extend into the transition region. An electrically floating barrier region of each IGBT cell is arranged within the active cell region and in contact with at least some of the trenches of the IGBT cells. The electrically floating barrier region does not extend into the transition region.

公开(公告)号：US10256299B2

公开(公告)日：2019-04-09

申请号：US15675913

申请日：2017-08-14

Applicant: Infineon Technologies AG

Inventor： Alexander Philippou ,  Anton Mauder

IPC: H01L29/84 ,  H01L29/06 ,  H01L21/02 ,  H01L21/311 ,  H01L27/06 ,  H01L29/10 ,  H01L29/417 ,  H01L29/423 ,  H01L29/66 ,  H01L29/739 ,  H01L29/78

Abstract: A power semiconductor device includes a semiconductor-on-insulator island having a semiconductor region and an insulation structure, the insulation structure being formed by an oxide and separating the semiconductor region from a portion of a semiconductor body of the power semiconductor device. The insulation structure includes a sidewall that laterally confines the semiconductor region; a bottom that vertically confines the semiconductor region; and a local deepening that forms at least a part of a transition between the sidewall and the bottom, wherein the local deepening extends further along the extension direction as compared to the bottom.

公开(公告)号：US20180342605A1

公开(公告)日：2018-11-29

申请号：US15989778

申请日：2018-05-25

Applicant: Infineon Technologies AG ,  Infineon Technologies Dresden GmbH

Inventor： Matteo Dainese ,  Alexander Philippou ,  Markus Bina ,  Ingo Dirnstorfer ,  Erich Griebl ,  Christian Jaeger ,  Johannes Georg Laven ,  Caspar Leendertz ,  Frank Dieter Pfirsch

IPC: H01L29/739 ,  H01L29/06 ,  H01L29/10 ,  H01L29/423 ,  H01L29/66 ,  H01L29/40

CPC classification number: H01L29/7397 ,  H01L29/0619 ,  H01L29/0649 ,  H01L29/0657 ,  H01L29/0696 ,  H01L29/1095 ,  H01L29/404 ,  H01L29/407 ,  H01L29/4236 ,  H01L29/66348

Abstract: A power semiconductor device includes an active region surrounded by an inactive termination region each formed by part of a semiconductor body. The active region conducts load current between first and second load terminals. At least one power cell has trenches extending into the semiconductor body adjacent to each other along a first lateral direction and having a stripe configuration that extends along a second lateral direction into the active region. The trenches spatially confine a plurality of mesas each having at least one first type mesa electrically connected to the first load terminal and configured to conduct at least a part of the load current, and at least one second type mesa configured to not conduct the load current. A decoupling structure separates at least one of the second type mesas into a first section in the active region and a second section in the termination region.

公开(公告)号：US09691887B2

公开(公告)日：2017-06-27

申请号：US14856764

申请日：2015-09-17

Applicant: Infineon Technologies AG

Inventor： Alexander Philippou ,  Christian Jaeger ,  Johannes Georg Laven ,  Frank Dieter Pfirsch

IPC: H01L29/739 ,  H01L27/06 ,  H01L29/66 ,  H01L27/07 ,  H01L27/24 ,  H01L29/06 ,  H01L29/08 ,  H01L29/10 ,  H01L45/00 ,  H01L29/36 ,  H01L29/868 ,  H01L29/40

CPC classification number: H01L29/7397 ,  H01L27/0652 ,  H01L27/0658 ,  H01L27/0772 ,  H01L27/24 ,  H01L27/2436 ,  H01L27/2445 ,  H01L29/0619 ,  H01L29/0649 ,  H01L29/0821 ,  H01L29/0834 ,  H01L29/1095 ,  H01L29/36 ,  H01L29/402 ,  H01L29/407 ,  H01L29/66325 ,  H01L29/66333 ,  H01L29/7393 ,  H01L29/7395 ,  H01L29/868 ,  H01L45/122 ,  H01L45/145

Abstract: A semiconductor device includes a semiconductor body including a drift zone that forms a pn junction with an emitter region. A first load electrode is at a front side of the semiconductor body. A second load electrode is at a rear side of the semiconductor body opposite to the front side. One or more variable resistive elements are electrically connected in a controlled path between the drift zone and one of the first and second load electrodes. The variable resistive elements activate and deactivate electronic elements of the semiconductor device in response to a change of the operational state of the semiconductor device.

公开(公告)号：US09653568B2

公开(公告)日：2017-05-16

申请号：US14734723

申请日：2015-06-09

Applicant: Infineon Technologies AG

Inventor： Johannes Georg Laven ,  Alexander Philippou ,  Hans-Joachim Schulze ,  Christian Jaeger ,  Roman Baburske ,  Antonio Vellei

IPC: H01L29/06 ,  H01L29/66 ,  H01L29/739 ,  H01L21/223 ,  H01L21/265 ,  H01L21/266

CPC classification number: H01L29/66348 ,  H01L21/2236 ,  H01L21/26513 ,  H01L21/26586 ,  H01L21/266 ,  H01L29/0696 ,  H01L29/6634 ,  H01L29/7395 ,  H01L29/7396 ,  H01L29/7397

Abstract: A method of manufacturing an insulated gate bipolar transistor includes providing trenches extending from a first surface to a layer section in a semiconductor portion, introducing impurities into mesa sections between the trenches, and forming, from the introduced impurities, second portions of doped regions separated from source regions by body regions. The source regions are electrically connected to an emitter electrode. The second portions have a second mean net impurity concentration exceeding at least ten times a first mean net impurity concentration in first portions of the doped layer. The first portions extend from the body regions to the layer section, respectively.

公开(公告)号：US20250081563A1

公开(公告)日：2025-03-06

申请号：US18948865

申请日：2024-11-15

Applicant: Infineon Technologies AG

Inventor： Alexander Philippou ,  Roman Baburske ,  Christian Jaeger ,  Johannes Georg Laven ,  Helmut Maeckel

IPC: H01L29/10 ,  H01L29/06 ,  H01L29/08 ,  H01L29/423 ,  H01L29/66 ,  H01L29/739 ,  H01L29/78

Abstract: A power semiconductor device having a barrier region is provided. A power unit cell of the power semiconductor device has at least two trenches that may both extend into the barrier region. The at least two trenches may both have a respective trench electrode coupled to a control terminal of the power semiconductor device. For example, the trench electrodes are structured to reduce the total gate charge of the power semiconductor device. The barrier region may be p-doped and vertically confined, i.e., in and against the extension direction, by the drift region. The barrier region can be electrically floating.

公开(公告)号：US20240030323A1

公开(公告)日：2024-01-25

申请号：US18352667

申请日：2023-07-14

Applicant: Infineon Technologies AG

Inventor： Alexander Philippou ,  Hans-Jürgen Thees ,  Thorsten Arnold

IPC: H01L29/739 ,  H01L29/66 ,  H01L29/423

CPC classification number: H01L29/7397 ,  H01L29/66333 ,  H01L29/4236

Abstract: A power semiconductor device and a method of producing a power semiconductor device are presented. The power semiconductor device is, for example, embodied as an IGBT and includes a deep cross trench which extends below trenches that include, e.g., control and source trench electrodes.