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公开(公告)号：US20230121912A1
公开(公告)日：2023-04-20
申请号：US17451562
申请日：2021-10-20
摘要： A microphone includes an amplifier coupled to an input node of the microphone; a shock detector coupled to the input node of the microphone; and a recovery circuit having an input coupled to an output of the shock detector, and an output coupled to the input of the microphone.
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公开(公告)号：US09722563B2
公开(公告)日：2017-08-01
申请号：US15230946
申请日：2016-08-08
IPC分类号： H03G7/08 , H03G7/06 , H03F1/32 , H03F3/187 , H03F3/45 , H03G7/00 , H03G3/00 , H04R3/00 , H04R23/00 , H03G3/30 , H03K5/1532 , H03K5/1536 , H04R19/04
CPC分类号： H03G7/08 , H03F1/3211 , H03F3/187 , H03F3/45475 , H03F2200/555 , H03F2203/45166 , H03F2203/45526 , H03G3/002 , H03G3/3005 , H03G3/3089 , H03G7/002 , H03G7/06 , H03K5/1532 , H03K5/1536 , H04R3/00 , H04R19/04 , H04R23/00 , H04R2201/003
摘要： In accordance with an embodiment, a method includes determining an amplitude of an input signal provided by a capacitive signal source, compressing the input signal in an analog domain to form a compressed analog signal based on the determined amplitude, converting the compressed analog signal to a compressed digital signal, and decompressing the digital signal in a digital domain to form a decompressed digital signal. In an embodiment, compressing the analog signal includes adjusting a first gain of an amplifier coupled to the capacitive signal source, and decompressing the digital signal comprises adjusting a second gain of a digital processing block.
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公开(公告)号：US09136862B2
公开(公告)日：2015-09-15
申请号：US14138261
申请日：2013-12-23
摘要： In one embodiment the quantizer includes a signal-to-phase converter configured to generate a phase signal according to an input signal and a phase difference digitization block configured to generate a quantization output according to differentiated samples of the phase signal, where the phase signal generated by the signal-to-phase converter has a sinusoidal shape.
摘要翻译： 在一个实施例中，量化器包括信号相变转换器，其被配置为根据输入信号产生相位信号，并且相位差数字化块被配置为根据相位信号的微分采样产生量化输出，其中相位信号产生 通过信号到相位转换器具有正弦形状。
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公开(公告)号：US20230179212A1
公开(公告)日：2023-06-08
申请号：US17457577
申请日：2021-12-03
CPC分类号： H03M1/0626 , H03M1/14 , H03M1/68 , H03M1/1009
摘要： An analog-to-digital converter (ADC) includes a loop filter having an input for receiving an analog input signal; a quantizer having an input coupled to an output of the loop filter, and an output for providing a digital output signal; and a digital-to-analog converter (DAC) having an input coupled to an output of the quantizer, and an output coupled to the loop filter, wherein the DAC includes at least one always-on DAC element, and a plurality of on-demand DAC elements.
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公开(公告)号：US10015609B2
公开(公告)日：2018-07-03
申请号：US15614399
申请日：2017-06-05
CPC分类号： H04R29/004 , H04R3/00 , H04R3/007 , H04R19/005 , H04R19/016 , H04R19/04 , H04R2201/003
摘要： System and method for detecting a glitch is disclosed. An embodiment comprises increasing a bias voltage of a first capacitor, sampling an input signal of a first plate of the first capacitor with a time period, mixing the input signal with the sampled input signal, and comparing the mixed signal with a reference signal.
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公开(公告)号：US20170272879A1
公开(公告)日：2017-09-21
申请号：US15614399
申请日：2017-06-05
CPC分类号： H04R29/004 , H04R3/00 , H04R3/007 , H04R19/005 , H04R19/016 , H04R19/04 , H04R2201/003
摘要： System and method for detecting a glitch is disclosed. An embodiment comprises increasing a bias voltage of a first capacitor, sampling an input signal of a first plate of the first capacitor with a time period, mixing the input signal with the sampled input signal, and comparing the mixed signal with a reference signal.
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公开(公告)号：US09729988B2
公开(公告)日：2017-08-08
申请号：US14811536
申请日：2015-07-28
CPC分类号： H04R29/004 , H04R3/00 , H04R3/007 , H04R19/005 , H04R19/016 , H04R19/04 , H04R2201/003
摘要： System and method for detecting a glitch is disclosed. An embodiment comprises increasing a bias voltage of a first capacitor, sampling an input signal of a first plate of the first capacitor with a time period, mixing the input signal with the sampled input signal, and comparing the mixed signal with a reference signal.
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公开(公告)号：US20160344360A1
公开(公告)日：2016-11-24
申请号：US15230946
申请日：2016-08-08
IPC分类号： H03G7/08 , H03K5/1532 , H03F1/32 , H04R3/00 , H03F3/45 , H03G3/30 , H04R19/04 , H03K5/1536 , H03F3/187
CPC分类号： H03G7/08 , H03F1/3211 , H03F3/187 , H03F3/45475 , H03F2200/555 , H03F2203/45166 , H03F2203/45526 , H03G3/002 , H03G3/3005 , H03G3/3089 , H03G7/002 , H03G7/06 , H03K5/1532 , H03K5/1536 , H04R3/00 , H04R19/04 , H04R23/00 , H04R2201/003
摘要： In accordance with an embodiment, a method includes determining an amplitude of an input signal provided by a capacitive signal source, compressing the input signal in an analog domain to form a compressed analog signal based on the determined amplitude, converting the compressed analog signal to a compressed digital signal, and decompressing the digital signal in a digital domain to form a decompressed digital signal. In an embodiment, compressing the analog signal includes adjusting a first gain of an amplifier coupled to the capacitive signal source, and decompressing the digital signal comprises adjusting a second gain of a digital processing block.
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公开(公告)号：US09413317B2
公开(公告)日：2016-08-09
申请号：US14163733
申请日：2014-01-24
IPC分类号： H03M1/00 , H03G3/00 , H03G7/06 , H03F1/32 , H03F3/187 , H03F3/45 , H03G7/00 , H04R3/00 , H04R23/00
CPC分类号： H03G7/08 , H03F1/3211 , H03F3/187 , H03F3/45475 , H03F2200/555 , H03F2203/45166 , H03F2203/45526 , H03G3/002 , H03G3/3005 , H03G3/3089 , H03G7/002 , H03G7/06 , H03K5/1532 , H03K5/1536 , H04R3/00 , H04R19/04 , H04R23/00 , H04R2201/003
摘要： In accordance with an embodiment, a method includes determining an amplitude of an input signal provided by a capacitive signal source, compressing the input signal in an analog domain to form a compressed analog signal based on the determined amplitude, converting the compressed analog signal to a compressed digital signal, and decompressing the digital signal in a digital domain to form a decompressed digital signal. In an embodiment, compressing the analog signal includes adjusting a first gain of an amplifier coupled to the capacitive signal source, and decompressing the digital signal comprises adjusting a second gain of a digital processing block.
摘要翻译： 根据实施例，一种方法包括确定由电容信号源提供的输入信号的幅度，基于所确定的幅度压缩模拟域中的输入信号以形成压缩的模拟信号，将压缩的模拟信号转换为 压缩数字信号，并在数字域解压缩数字信号以形成解压缩的数字信号。 在一个实施例中，压缩模拟信号包括调整耦合到电容性信号源的放大器的第一增益，并且解压缩数字信号包括调整数字处理块的第二增益。
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公开(公告)号：US20150311870A1
公开(公告)日：2015-10-29
申请号：US14738353
申请日：2015-06-12
CPC分类号： H03F1/083 , H03F1/086 , H03F3/183 , H03F3/187 , H03F3/45475 , H03F2200/03 , H03F2200/129 , H04R3/00 , H04R19/04
摘要： In accordance with an embodiment, a system for amplifying a signal provided by a capacitive signal source includes a first voltage follower device, a second voltage follower device, and a first capacitor. The first voltage follower device includes an input terminal configured to be coupled to a first terminal of the capacitive signal source, and the second voltage follower device includes an input terminal coupled to the first output terminal of the first voltage follower device, and an output terminal coupled to a second output terminal of the first voltage follower device. Furthermore, first capacitor has a first end coupled to a first output terminal of the first voltage follower device, and a second end configured to be coupled to a second terminal of the capacitive signal source.
摘要翻译： 根据实施例，用于放大由电容信号源提供的信号的系统包括第一电压跟随器件，第二电压跟随器件和第一电容器。 第一电压跟随器件包括被配置为耦合到电容性信号源的第一端子的输入端子，并且第二电压跟随器件包括耦合到第一电压跟随器件的第一输出端子的输入端子和输出端子 耦合到第一电压跟随器件的第二输出端子。 此外，第一电容器具有耦合到第一电压跟随器件的第一输出端的第一端，以及被配置为耦合到电容信号源的第二端的第二端。
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