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11.发明申请公开(公告)号：US20180189221A1
公开(公告)日：2018-07-05
申请号：US15395821
申请日：2016-12-30
Applicant: Intel Corporation
Inventor： Andrew Morning-Smith , Jawad B. Khan , Fred W. Nance, JR. , Wing-Gong Lew
CPC classification number: G06F13/4282 , G06F13/4022 , G06F2213/0026
Abstract: Apparatuses, systems, and methods having positionally aware communication between a controller and a plurality of solid state drives (SSD) over a multi-wire serial bus is described. An example electronic device includes a multi-wire serial bus, multiple SSD connectors coupled to the multi-wire serial bus, and a serial bus position address (BPos) line to uniquely identify the physical position of each SSD connector with a unique BPos identifier (ID). The device also includes a serial bus controller coupled to the multi-wire serial bus and further comprising circuitry configured to communicate with a specific SSD connector at a known physical position by associating the BPos ID of the specific SSD connector with the communication.
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公开(公告)号：US09646657B2
公开(公告)日：2017-05-09
申请号：US14845373
申请日：2015-09-04
Applicant: Intel Corporation
Inventor： Kai-Uwe Schmidt , Andrew Morning-Smith , Adrian Mocanu , Mike M. Ngo
CPC classification number: G11C5/148 , G01R21/006 , G01R27/2688 , G01R31/3004 , G01R31/44 , G11C5/141 , G11C29/02 , G11C29/021 , G11C29/50 , G11C2029/5002 , H02J7/0068 , H02J7/345
Abstract: These present disclosure provides techniques to determine the capacitance of a power loss capacitor based on voltage ripple. The power loss capacitor may be a power loss capacitor for a power loss shutdown system of a solid state drive. The capacitance may be determined as a function of the voltage ripple and a period of the voltage ripple during a natural discharge and a controlled discharge of the power loss capacitor.
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公开(公告)号：US12207409B2
公开(公告)日：2025-01-21
申请号：US17081502
申请日：2020-10-27
Applicant: Intel Corporation
Inventor： John Hung , Andrew Morning-Smith , Kai-Uwe Schmidt , Nan Allison Yao
Abstract: An embodiment of an electronic system comprises a main board, and a modular capacitor subassembly mechanically and electrically coupled to the main board, wherein the modular capacitor subassembly provides backup power for the main board, and wherein the main board is adapted for use in at least two housing form factors. Other embodiments are disclosed and claimed.
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公开(公告)号：US12119638B2
公开(公告)日：2024-10-15
申请号：US17313603
申请日：2021-05-06
Applicant: Intel Corporation
Inventor： Chin Fatt Chay , Andrew Morning-Smith , Boon Seong Khoo , Timothy Rothman , Yi Heng Khor
IPC: H02H5/04 , G08B5/38 , G08B21/18 , H02H1/00 , H05B45/3725 , H05B45/395
CPC classification number: H02H5/04 , G08B5/38 , G08B21/182 , H02H1/0007 , H05B45/3725 , H05B45/395
Abstract: Systems, apparatuses and methods may provide for technology that includes a solid state drive (SSD) having an enclosure, a non-volatile memory (NVM) device, a device controller coupled the NVM device, a capacitor, a backup voltage line coupled to the capacitor, and a safety assembly. The safety assembly may include a timer circuit including an input node coupled to the backup voltage line, a reset node, and an output node, an indicator circuit coupled to the output node of the timer circuit, and a temperature comparator circuit coupled to the reset node of the timer circuit, wherein if a temperature of the enclosure exceeds a threshold while a backup voltage is present on the backup voltage line, the temperature comparator circuit causes the timer circuit to trigger light pulses from the indicator circuit.
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公开(公告)号：US20210257828A1
公开(公告)日：2021-08-19
申请号：US17313603
申请日：2021-05-06
Applicant: Intel Corporation
Inventor： Chin Fatt Chay , Andrew Morning-Smith , Boon Seong Khoo , Timothy Rothman , Yi Heng Khor
Abstract: Systems, apparatuses and methods may provide for technology that includes a solid state drive (SSD) having an enclosure, a non-volatile memory (NVM) device, a device controller coupled the NVM device, a capacitor, a backup voltage line coupled to the capacitor, and a safety assembly. The safety assembly may include a timer circuit including an input node coupled to the backup voltage line, a reset node, and an output node, an indicator circuit coupled to the output node of the timer circuit, and a temperature comparator circuit coupled to the reset node of the timer circuit, wherein if a temperature of the enclosure exceeds a threshold while a backup voltage is present on the backup voltage line, the temperature comparator circuit causes the timer circuit to trigger light pulses from the indicator circuit.
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Patent Agency Ranking
公开(公告)号：US11023326B2
公开(公告)日：2021-06-01
申请号：US16294198
申请日：2019-03-06
Applicant: Intel Corporation
Inventor： Andrew Morning-Smith , Brian Mcfarlane , Emily P. Chung , William Glennan
IPC: G06F11/14
Abstract: An embodiment of a semiconductor apparatus for use with a persistent storage media may include technology to detect a power interruption event, and track an amount of off-time for a persistent storage media after the detected power interruption event. Other embodiments are disclosed and claimed.
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公开(公告)号：US10990151B2
公开(公告)日：2021-04-27
申请号：US16292825
申请日：2019-03-05
Applicant: Intel Corporation
Inventor： Knut Grimsrud , Adrian Mocanu , Andrew Morning-Smith , Zeljko Zupanc
Abstract: In embodiments, an apparatus includes a burst current monitor, to detect a burst of input current drawn by a SSD from a host above a pre-defined burst threshold, and control logic coupled to the burst current monitor. The control logic, in response to the detection by the burst current monitor of the input current above the burst threshold, causes a capacitor of the SSD to supply an assistance current to the SSD, to reduce the input current drawn by the SSD. In embodiments, the capacitor is a hold-up capacitor disposed in a PLI circuit of the SSD, and the apparatus is integrated within a hold-up control logic sub-circuit of the PLI circuit.
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公开(公告)号：US20210120672A1
公开(公告)日：2021-04-22
申请号：US17133836
申请日：2020-12-24
Applicant: Intel Corporation
Inventor： John Hung , Andrew Morning-Smith , Kai-Uwe Schmidt , Paul Gwin , Nan Allison Yao
Abstract: An embodiment of an electronic apparatus comprises a main board, a wing board electrically coupled to the main board by a flexible connector along an edge of the main board, wherein the wing board is arranged at an angle that is non-parallel with respect to the main board. Other embodiments are disclosed and claimed.
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公开(公告)号：US20210045247A1
公开(公告)日：2021-02-11
申请号：US17081502
申请日：2020-10-27
Applicant: Intel Corporation
Inventor： John Hung , Andrew Morning-Smith , Kai-Uwe Schmidt , Nan Allison Yao
Abstract: An embodiment of an electronic system comprises a main board, and a modular capacitor subassembly mechanically and electrically coupled to the main board, wherein the modular capacitor subassembly provides backup power for the main board, and wherein the main board is adapted for use in at least two housing form factors. Other embodiments are disclosed and claimed.
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公开(公告)号：US20190196562A1
公开(公告)日：2019-06-27
申请号：US16292825
申请日：2019-03-05
Applicant: Intel Corporation
Inventor： Knut Grimsrud , Adrian Mocanu , Andrew Morning-Smith , Zeljko Zupanc
Abstract: In embodiments, an apparatus includes a burst current monitor, to detect a burst of input current drawn by a SSD from a host above a pre-defined burst threshold, and control logic coupled to the burst current monitor. The control logic, in response to the detection by the burst current monitor of the input current above the burst threshold, causes a capacitor of the SSD to supply an assistance current to the SSD, to reduce the input current drawn by the SSD. In embodiments, the capacitor is a hold-up capacitor disposed in a PLI circuit of the SSD, and the apparatus is integrated within a hold-up control logic sub-circuit of the PLI circuit.
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