公开(公告)号：US20230197697A1

公开(公告)日：2023-06-22

申请号：US17552581

申请日：2021-12-16

Applicant: Intel Corporation

Inventor： Srinivas V. Pietambaram ,  Tarek A. Ibrahim ,  Rahul N. Manepalli ,  John S. Guzek ,  Hamid Azimi

IPC: H01L25/16 ,  H01L23/15 ,  H01L23/498 ,  H01L49/02 ,  H01L23/00

CPC classification number: H01L25/16 ,  H01L23/15 ,  H01L23/49827 ,  H01L28/60 ,  H01L23/49811 ,  H01L24/16 ,  H01L2224/16227

Abstract: Microelectronic assemblies, related devices and methods, are disclosed herein. In some embodiments, a microelectronic assembly may include a glass substrate, having a surface, including a through-glass-substrate via (TGV) and a cavity on the surface; a first die nested in the cavity; an insulating material on the surface of the glass substrate; a first conductive pillar and a second conductive pillar through the insulating material; a capacitor, in the insulating material, including a first conductive layer, on the surface of the glass substrate, electrically coupled to the TGV and the first conductive pillar forming a first plate of the capacitor, a dielectric layer on the first conductive layer; and a second conductive layer, on the dielectric layer, electrically coupled to the second conductive pillar forming a second plate of the capacitor; and a second die, on the insulating material, electrically coupled to the first die.

公开(公告)号：US20230185033A1

公开(公告)日：2023-06-15

申请号：US17552169

申请日：2021-12-15

Applicant: Intel Corporation

Inventor： Kristof Kuwawi Darmawikarta ,  Benjamin T. Duong ,  Srinivas V. Pietambaram ,  Tarek A. Ibrahim ,  Ala Omer ,  Bai Nie ,  Hari Mahalingam

IPC: G02B6/42 ,  G02B6/43

CPC classification number: G02B6/4212 ,  G02B6/43 ,  G02B6/4239

Abstract: Microelectronic assemblies including photonic integrated circuits (PICs), related devices and methods, are disclosed herein. For example, in some embodiments, a photonic assembly may include an integrated circuit (IC) in a first layer, wherein the first layer includes a substrate having a first surface, an opposing second surface, and a lateral surface substantially perpendicular to the first and second surfaces, wherein the substrate includes a waveguide between the first and second surfaces, and wherein and the IC is nested in a cavity in the substrate; a PIC in a second layer, wherein the second layer is on the first layer and an active surface of the PIC faces the first layer, and wherein the IC is electrically coupled to the active side of the PIC; and an optical component optically coupled to the active surface of the PIC and the waveguide in the substrate at the second surface.

公开(公告)号：US20230092060A1

公开(公告)日：2023-03-23

申请号：US17479334

申请日：2021-09-20

Applicant: Intel Corporation

Inventor： Eric J.M. Moret ,  Srinivas Venkata Ramanuja Pietambaram ,  Tarek A. Ibrahim

IPC: G02B6/42

Abstract: In an optical circuit, a substrate can define a cavity that extends into a substrate front surface. A sidewall of the cavity can include a substrate optical port. An optical path can extend through the substrate from a connector optical port to the substrate optical port. A photonic integrated circuit (PIC) can attach to the substrate. A PIC front surface can include a plurality of electrical connections. A PIC edge surface can extend around at least a portion of a perimeter of the PIC between the PIC front surface and a PIC back surface. A PIC optical port can be disposed on the PIC edge surface and can accept or emit an optical beam along a PIC optical axis. The PIC optical axis can be aligned with the substrate optical port when the PIC is attached to the substrate.

公开(公告)号：US20220342150A1

公开(公告)日：2022-10-27

申请号：US17237375

申请日：2021-04-22

Applicant: Intel Corporation

Inventor： Omkar G. Karhade ,  Xiaoqian Li ,  Tarek A. Ibrahim ,  Ravindranath Vithal Mahajan ,  Nitin A. Deshpande

IPC: G02B6/122 ,  G02B6/12

Abstract: Photonic packages and device assemblies that include photonic integrated circuits (PICs) coupled to optical lenses on lateral sides of the PICs. An example photonic package comprises a package support, an integrated circuit (IC), an insulating material, a PIC having an active side and a lateral side substantially perpendicular to the active side. At least one optical structure is on the active side. A substantial portion of the active side is in contact with the insulating material, and the PIC is electrically coupled to the package support and to the IC. The photonic package further includes an optical lens coupled to the PIC on the lateral side. In some embodiments, the photonic package further includes an interposer between the PIC or the IC and the package support.

公开(公告)号：US20220181262A1

公开(公告)日：2022-06-09

申请号：US17677130

申请日：2022-02-22

Applicant: Intel Corporation

Inventor： Sanka Ganesan ,  Ram Viswanath ,  Xavier Francois Brun ,  Tarek A. Ibrahim ,  Jason M. Gamba ,  Manish Dubey ,  Robert Alan May

IPC: H01L23/538 ,  H01L23/367 ,  H01L23/31 ,  H01L23/00

Abstract: Microelectronic assemblies, related devices and methods, are disclosed herein. In some embodiments, a microelectronic component may include a substrate having a first face and an opposing second face, wherein the substrate includes a through-substrate via (TSV); a first mold material region at the first face, wherein the first mold material region includes a first through-mold via (TMV) conductively coupled to the TSV; and a second mold material region at the second face, wherein the second mold material region includes a second TMV conductively coupled to the TSV.

公开(公告)号：US20250060531A1

公开(公告)日：2025-02-20

申请号：US18938732

申请日：2024-11-06

Applicant: Intel Corporation

Inventor： Omkar G. Karhade ,  Xiaoqian Li ,  Tarek A. Ibrahim ,  Ravindranath Vithal Mahajan ,  Nitin A. Deshpande

IPC: G02B6/122 ,  G02B6/12

Abstract: Photonic packages and device assemblies that include photonic integrated circuits (PICs) coupled to optical lenses on lateral sides of the PICS. An example photonic package comprises a package support, an integrated circuit (IC), an insulating material, a PIC having an active side and a lateral side substantially perpendicular to the active side. At least one optical structure is on the active side. A substantial portion of the active side is in contact with the insulating material, and the PIC is electrically coupled to the package support and to the IC. The photonic package further includes an optical lens coupled to the PIC on the lateral side. In some embodiments, the photonic package further includes an interposer between the PIC or the IC and the package support.

公开(公告)号：US20240219660A1

公开(公告)日：2024-07-04

申请号：US18089934

申请日：2022-12-28

Applicant: Intel Corporation

Inventor： Bohan Shan ,  Hongxia Feng ,  Haobo Chen ,  Yiqun Bai ,  Dingying Xu ,  Eric J.M. Moret ,  Robert Alan May ,  Srinivas Venkata Ramanuja Pietambaram ,  Tarek A. Ibrahim ,  Gang Duan ,  Xiaoying Guo ,  Ziyin Lin ,  Bai Nie ,  Kyle Jordan Arrington ,  Bin Mu

IPC: G02B6/42 ,  G02B5/10

CPC classification number: G02B6/4246 ,  G02B5/10 ,  G02B6/4274

Abstract: A semiconductor device and associated methods are disclosed. In one example, the electronic device includes a photonic die and a glass substrate. In selected examples, the semiconductor device includes one or more turning mirrors to direct an optical signal between the photonic die and the glass substrate. Configurations of turning mirrors are provided to improve signal integrity and manufacturability.

公开(公告)号：US20240114622A1

公开(公告)日：2024-04-04

申请号：US17956338

申请日：2022-09-29

Applicant: Intel Corporation

Inventor： Kristof Darmawikarta ,  Srinivas Venkata Ramanuja Pietambaram ,  Tarek A. Ibrahim ,  Cary Kuliasha ,  Siddharth K. Alur ,  Jung Kyu Han ,  Beomseok Choi ,  Russell K. Mortensen ,  Andrew Collins ,  Haobo Chen ,  Brandon C. Marin

IPC: H05K1/18 ,  H01L23/498 ,  H01L23/538 ,  H01L23/64 ,  H01L25/065 ,  H05K3/00 ,  H05K3/46

CPC classification number: H05K1/185 ,  H01L23/49822 ,  H01L23/5389 ,  H01L23/645 ,  H01L25/0655 ,  H05K3/0047 ,  H05K3/4644 ,  H05K2201/1003 ,  H05K2201/10674

Abstract: An electronic device includes a substrate including a core layer; a cavity formed in the core layer, wherein the cavity includes sidewalls plated with a conductive material; a prefabricated passive electronic component disposed in the cavity; and a cavity sidewall connection providing electrical continuity from the plated cavity sidewalls to a first surface of the substrate and to a second surface of the substrate.

公开(公告)号：US11923307B2

公开(公告)日：2024-03-05

申请号：US16902958

申请日：2020-06-16

Applicant: Intel Corporation

Inventor： Bai Nie ,  Gang Duan ,  Omkar G. Karhade ,  Nitin A. Deshpande ,  Yikang Deng ,  Wei-Lun Jen ,  Tarek A. Ibrahim ,  Sri Ranga Sai Boyapati ,  Robert Alan May ,  Yosuke Kanaoka ,  Robin Shea McRee ,  Rahul N. Manepalli

IPC: H01L23/538 ,  H01L21/48

CPC classification number: H01L23/5381 ,  H01L21/4857 ,  H01L23/5383 ,  H01L23/5386

Abstract: Disclosed herein are microelectronic structures including bridges, as well as related assemblies and methods. In some embodiments, a microelectronic structure may include a substrate and a bridge.

公开(公告)号：US20240030142A1

公开(公告)日：2024-01-25

申请号：US18375867

申请日：2023-10-02

Applicant: Intel Corporation

Inventor： Sanka Ganesan ,  Ram Viswanath ,  Xavier Francois Brun ,  Tarek A. Ibrahim ,  Jason M. Gamba ,  Manish Dubey ,  Robert Alan May

IPC: H01L23/538 ,  H01L23/367 ,  H01L23/31 ,  H01L23/00

CPC classification number: H01L23/5381 ,  H01L23/367 ,  H01L23/3185 ,  H01L23/5386 ,  H01L24/16 ,  H01L23/5384 ,  H01L2224/16227

Abstract: Microelectronic assemblies, related devices and methods, are disclosed herein. In some embodiments, a microelectronic component may include a substrate having a first face and an opposing second face, wherein the substrate includes a through-substrate via (TSV); a first mold material region at the first face, wherein the first mold material region includes a first through-mold via (TMV) conductively coupled to the TSV; and a second mold material region at the second face, wherein the second mold material region includes a second TMV conductively coupled to the TSV.