公开(公告)号：US20100079629A1

公开(公告)日：2010-04-01

申请号：US12570839

申请日：2009-09-30

申请人： Min-Kyu PARK ,  Jin-Min Bang ,  Hee-Chan Park ,  Jin-Ho Kim ,  Ji-Hye Kim ,  Yun-Je Oh ,  Sung-Dae Cho

发明人： Min-Kyu PARK ,  Jin-Min Bang ,  Hee-Chan Park ,  Jin-Ho Kim ,  Ji-Hye Kim ,  Yun-Je Oh ,  Sung-Dae Cho

IPC分类号： H04N5/222

CPC分类号： H04N5/3675 ,  H04N9/045

摘要： Disclosed is an apparatus for correcting a value of a defective pixel based on values of neighboring pixels of the defective pixel, the apparatus includes a plurality of first-stage median filters for receiving a value of a target pixel and values of neighboring pixels of the target pixel, and outputting median values of the received values; and at least one second-stage median filter for receiving the value of the target pixel and the median values from the first-stage median filters, and outputting a median value of the values received by the second-stage median filter.

摘要翻译： 公开了一种基于缺陷像素的相邻像素的值来校正缺陷像素的值的装置，该装置包括用于接收目标像素的值和目标像素的相邻像素的值的多个第一级中值滤波器 像素，并输出接收值的中值; 以及至少一个第二级中值滤波器，用于从第一级中值滤波器接收目标像素的值和中值，并输出由第二级中值滤波器接收的值的中值。

公开(公告)号：US07667797B2

公开(公告)日：2010-02-23

申请号：US11643499

申请日：2006-12-20

申请人： Sung-Soo Chang ,  Woo-Hyun Kim ,  Jin-Ho Kim

发明人： Sung-Soo Chang ,  Woo-Hyun Kim ,  Jin-Ho Kim

IPC分类号： G02F1/1335

CPC分类号： G02F1/133555 ,  G02F1/133504 ,  G02F1/133514

摘要： A liquid crystal display device includes an array substrate having reflective and transmissive regions in a pixel region, wherein the array substrate includes a reflective electrode corresponding to the reflective region and a pixel electrode on a first substrate. A color filter substrate defines the reflective region and the transmissive region in the pixel region. The color filter substrate includes a color filter with first and second portions that correspond to the respective transmissive and reflective regions on a second substrate. The thickness of the second portion is less than a thickness of the first portion. The combined thickness of the scatter and the thickness of the second portion is greater than the thickness of the first portion; and a liquid crystal layer between the array and color filter substrates.

摘要翻译： 一种液晶显示装置，具备在像素区域具有反射和透射区域的阵列基板，其中阵列基板包括对应于反射区域的反射电极和在第一基板上的像素电极。 滤色器基板限定像素区域中的反射区域和透射区域。 滤色器基板包括滤色器，滤色器具有对应于第二基板上的相应透射和反射区域的第一和第二部分。 第二部分的厚度小于第一部分的厚度。 第二部分的散射和厚度的组合厚度大于第一部分的厚度; 以及阵列和滤色器基板之间的液晶层。

公开(公告)号：US20090226776A1

公开(公告)日：2009-09-10

申请号：US12144957

申请日：2008-06-24

申请人： Jin-Ho Kim ,  Kyoung-hwan Choi ,  Jae-yong Lee

发明人： Jin-Ho Kim ,  Kyoung-hwan Choi ,  Jae-yong Lee

IPC分类号： H01M8/04 ,  H01M8/18

CPC分类号： C01B3/0057 ,  C01B3/065 ,  C01B3/08 ,  C01B2203/066 ,  C25B1/003 ,  C25B1/04 ,  F17C11/005 ,  H01M8/04201 ,  Y02E60/321 ,  Y02E60/327 ,  Y02E60/362 ,  Y02E60/366

摘要： A hydrogen charging apparatus having a cooling unit in which the hydrogen charging apparatus includes a hydrogen generation unit that generates hydrogen, a hydrogen charging unit that charges hydrogen to a hydrogen storage medium, and a cooling unit that reduces the pressure of hydrogen to a suitable level for charging by cooling the hydrogen storage medium during charging the hydrogen.

摘要翻译： 一种具有冷却单元的氢气充电装置，其中氢气充电装置包括产生氢气的氢产生单元，将氢气充入氢存储介质的氢气充电单元，以及将氢气压力降低至适当水平的冷却单元 用于在对氢充电期间冷却储氢介质进行充电。

公开(公告)号：US07364784B2

公开(公告)日：2008-04-29

申请号：US10834187

申请日：2004-04-29

申请人： Jin-Ho Kim ,  Sung-Hwan Yoon

发明人： Jin-Ho Kim ,  Sung-Hwan Yoon

IPC分类号： H01L23/495 ,  H01L21/784

CPC分类号： H01L23/4951 ,  H01L23/3107 ,  H01L23/49551 ,  H01L24/48 ,  H01L25/105 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/4826 ,  H01L2224/73215 ,  H01L2225/1029 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/07802 ,  Y10T428/24207 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： Provided is a thin semiconductor package comprising a semiconductor chip and a lead frame, the lead frame including a paddle portion configured for mounting the semiconductor chip in a manner that exposes bonding pads within an aperture formed in a center portion of the lead frame and a peripheral terminal pad portion for establishing external contacts. A plurality of bonding wires are used to establish electrical connection between a lower surface of the paddle part and corresponding bonding pads with intermediate leads providing connection to the terminal pad portions. The semiconductor chip, lead frame and bonding wires may then be encapsulated to form a thin semiconductor package having a thickness substantially equal to that of the terminal pad portions. The thin semiconductor packages may, in turn, be used to form multi-chip stack packages using known good semiconductor chips to form a high-density compound semiconductor packages.

公开(公告)号：US07364659B2

公开(公告)日：2008-04-29

申请号：US11211889

申请日：2005-08-24

申请人： Moon-Seog Jang ,  Sung-Soo Kim ,  Myung-Nam Han ,  Jin-Ho Kim ,  Min-Soo Park

发明人： Moon-Seog Jang ,  Sung-Soo Kim ,  Myung-Nam Han ,  Jin-Ho Kim ,  Min-Soo Park

IPC分类号： B01D39/00 ,  B01D39/26 ,  B29C47/00 ,  B29C47/12 ,  B29C71/00 ,  D01D5/14 ,  B01D63/00

CPC分类号： B01D71/26 ,  B01D67/0088 ,  B01D69/08 ,  B01D69/087 ,  B01D2323/08 ,  B01D2323/14 ,  B01D2323/26 ,  B01D2323/42 ,  B01D2325/02

摘要： A porous polyethylene hollow fiber membrane having a pore-size gradient across the inner and outer surfaces thereof is prepared by introducing, during the cooling step of a melt-spun polyethylene hollow fiber, a nitrogen flow and a solvent having a boiling point in the range of 30 to 80° C. to the inner and outer surfaces of the melt-spun hollow fiber, respectively.

摘要翻译： 在熔融纺丝的聚乙烯中空纤维的冷却步骤中，通过将沸点在该范围内的氮气流和溶剂引入，制备其内表面和外表面上具有孔径梯度的多孔聚乙烯中空纤维膜 分别为熔融中空纤维的内表面和外表面30至80℃。

公开(公告)号：US20060174027A1

公开(公告)日：2006-08-03

申请号：US11341265

申请日：2006-01-26

申请人： Jin-Ho Kim ,  Kab-Joo Lee

发明人： Jin-Ho Kim ,  Kab-Joo Lee

IPC分类号： G06F15/16

CPC分类号： H04W72/1242 ,  H04L47/10 ,  H04L47/14 ,  H04L47/2408 ,  H04L47/2441 ,  H04L49/90 ,  H04L69/12

摘要： Disclosed is a wireless LAN system comprising: a memory; a central processing unit segmenting data, which is to be transferred, into frames, generating descriptors containing frame addresses and lengths in the memory, and storing the segmented frames and the descriptors into the memory in accordance with transmission priorities; a media accessing controller calling the frames of data, which is to be transferred, from the memory with reference to the transmission priorities and the descriptors, and temporarily storing the frames; and a transmitter transferring the frames stored in the media accessing controller. It is possible to improve data transmission speed and control facility, satisfying the quality of service for a standard of communication protocol.

摘要翻译： 公开了一种无线LAN系统，包括：存储器; 中央处理单元将要传送的数据分成帧，生成包含存储器中的帧地址和长度的描述符，并根据传输优先级将分段帧和描述符存储到存储器中; 媒体访问控制器，参照发送优先级和描述符从存储器调用要传送的数据帧，并临时存储帧; 以及传送存储在媒体访问控制器中的帧的发射机。 可以提高数据传输速度和控制设施，满足通信协议标准的服务质量。

公开(公告)号：US07061087B2

公开(公告)日：2006-06-13

申请号：US10678412

申请日：2003-10-02

申请人： Jin-Ho Kim

发明人： Jin-Ho Kim

IPC分类号： H01L23/538

CPC分类号： H01L25/105 ,  H01L24/73 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/15311 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： A multi-package module comprises a plurality of stacked packages including an upper package and a lower package. Each package comprises a board having located on a first side thereof a chip installation area and a bump pad area; at least one chip disposed in the chip installation area; a plurality of redistribution patterns formed on the board and electrically connected to the chip; and a plurality of first bump pads formed in the bump pad area which are electrically connected to the redistribution patterns. The respective packages are electrically connected by connecting bump pads of the upper package to bump pads of the lower package. Further, the chip installation area of the upper and lower packages not being in vertical alignment with each other.

摘要翻译： 多封装模块包括多个堆叠封装，包括上封装和下封装。 每个包装包括在其第一侧上具有芯片安装区域和凸块焊盘区域的板; 设置在芯片安装区域中的至少一个芯片; 形成在所述板上并电连接到所述芯片的多个再分布图案; 以及形成在所述凸块焊盘区域中的电连接到所述再分布图案的多个第一凸点焊盘。 相应的封装通过将上封装的凸块焊盘连接到下封装的凸块焊盘而电连接。 此外，上下包装件的芯片安装区域彼此不垂直对准。

公开(公告)号：US20060027901A1

公开(公告)日：2006-02-09

申请号：US10913319

申请日：2004-08-09

申请人： Ming-Sung Tsai ,  Jin-Ho Kim ,  Eul-Chul Jang

发明人： Ming-Sung Tsai ,  Jin-Ho Kim ,  Eul-Chul Jang

IPC分类号： H01L23/48

CPC分类号： H01L24/33 ,  H01L23/49551 ,  H01L23/49575 ,  H01L24/48 ,  H01L2224/32014 ,  H01L2224/32145 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01027 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A stacked chip package with exposed lead-frame bottom surface is disclosed. The stacked chip package includes a first die encapsulated in an encapsulated molding compound, which is mounted on an active surface of a second die. A bottom surface of the second die is mounted to a top surface of a die supporting section of the lead-frame. The bottom surface of the die supporting section is exposed outside the encapsulated molding compound. A plurality of bonding wires electrically interconnect the die pads of the first die and the second die to the corresponding lead fingers. Moreover, each lead finger of the lead-frame is preferably formed with a deflected structure with a bent section, which enables the dimension size of the stacked chip package to get more compact.

摘要翻译： 公开了具有暴露的引线框底面的堆叠式芯片封装。 堆叠的芯片封装包括封装在封装的模塑料中的第一模具，其被安装在第二模具的有效表面上。 第二模具的底面安装在引线框架的模具支撑部分的顶表面上。 模具支撑部分的底表面暴露在封装的模塑料的外部。 多个接合线将第一管芯和第二管芯的管芯焊盘电连接到相应的引线指。 此外，引线框架的每个引线指状件优选地形成有具有弯曲部分的偏转结构，这使得堆叠的芯片封装的尺寸尺寸变得更加紧凑。

公开(公告)号：US06732326B2

公开(公告)日：2004-05-04

申请号：US09846477

申请日：2001-04-30

申请人： Eun-A Choi ,  Jin-Ho Kim ,  Nae-Soo Kim ,  Deock-Gil Oh

发明人： Eun-A Choi ,  Jin-Ho Kim ,  Nae-Soo Kim ,  Deock-Gil Oh

IPC分类号： H03M1341

CPC分类号： H03M13/6362 ,  H03M13/395 ,  H03M13/3961 ,  H03M13/41 ,  H03M13/4107

摘要： A structure and a method for depuncturing an input bit stream being input to a Viterbi decoder when the Viterbi decoder is designed by using a Radix-4 branch metric calculator in a method for designing the Viterbi decoder that decodes a punctured code at a high-speed, are disclosed. A depuncture structure for Radix-4 branch metric calculation in a high-speed Viterbi decoder includes four FIFOs, four multiplexers, and one Radix-4 branch metric calculator. Two input bit streams of I and Q are connected to two upper FIFOs and two lower FIFOs. An output terminal of FIFO is connected to upper and lower multiplexers of the next stage. One output terminal of each multiplexer is connected to Radix-4 branch metric calculator. As a result, Radix-4 branch metric calculation can be achieved by using the same clock as a clock speed of the input I and Q bit streams. This structure and this method can be applied to a depuncturing process for Radix-4 branch metric calculation of all punctured codes derived from ½ code.

摘要翻译： 在维特比解码器被设计成通过在设计维特比解码器的方法中设计的维特比解码器的结构和方法被输入到维特比解码器，该维特比解码器以高速解码穿孔码 ，被披露。 在高速维特比解码器中用于基数4分支度量计算的解穿孔结构包括四个FIFO，四个多路复用器和一个基数-4分支度量计算器。 I和Q的两个输入比特流连接到两个较高的FIFO和两个较低的FIFO。 FIFO的输出端子连接到下一级的上下复用器。 每个多路复用器的一个输出端连接到基数-4分支度量计算器。 因此，可以通过使用与输入I和Q位流的时钟速度相同的时钟来实现基数-4分支度量计算。 该结构和该方法可以应用于从½码导出的所有穿孔码的基数-4分支度量计算的解穿孔过程。

公开(公告)号：US5981327A

公开(公告)日：1999-11-09

申请号：US42726

申请日：1998-03-17

申请人： Jin-Ho Kim

发明人： Jin-Ho Kim

IPC分类号： H01L21/8238 ,  H01L21/265 ,  H01L21/266 ,  H01L21/74 ,  H01L21/761 ,  H01L27/092

CPC分类号： H01L21/74 ,  H01L21/266

摘要： A method for forming wells of a semiconductor device, comprising the steps of forming a plurality of field insulating layers on a field region of a semiconductor substrate; forming first impurity regions of a first conductive type at a first depth beneath a surface of the semiconductor substrate; forming first impurity regions of a second conductive type beneath the surface of the semiconductor substrate at a second depth between the field insulating layers; selectively forming second impurity regions of the second conductive type in the first impurity regions of the first conductive type between adjacent field insulating layers; forming second impurity regions of the first conductive type in the first impurity regions of the second conductive type at both sides of the second impurity regions of the second conductive type; and diffusing the first and second impurity regions of the first conductive type and the first and second impurity regions of the second conductive type by a drive-in process to form a first conductive type shield region, a first conductive type well, and first and second wells of a second conductive type.

摘要翻译： 一种用于形成半导体器件的阱的方法，包括以下步骤：在半导体衬底的场区域上形成多个场绝缘层; 在所述半导体衬底的表面下方的第一深度处形成第一导电类型的第一杂质区; 在所述场绝缘层之间的第二深度处，在所述半导体衬底的表面下方形成第二导电类型的第一杂质区; 在相邻的场绝缘层之间的第一导电类型的第一杂质区中选择性地形成第二导电类型的第二杂质区; 在第二导电类型的第二杂质区的两侧在第二导电类型的第一杂质区中形成第一导电类型的第二杂质区; 并且通过驱动工艺扩散第一导电类型的第一和第二杂质区域和第二导电类型的第一和第二杂质区域，以形成第一导电类型屏蔽区域，第一导电类型阱以及第一和第二 第二导电类型的阱。