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公开(公告)号：US20050257024A1
公开(公告)日：2005-11-17
申请号：US11130613
申请日：2005-05-16
IPC分类号： G06F15/78 , H03K19/173 , H03K19/177 , G06F15/00
CPC分类号： G06F9/3001 , G06F9/30181 , G06F9/3879 , G06F9/3897 , G06F15/7867 , H03K17/002 , H03K19/1737 , H03K19/17728 , H03K19/17736
摘要： A heterogeneous array includes clusters of processing elements. The clusters include a combination of ALUs and multiplexers linked by direct connections and various general-purpose routing networks. The multiplexers are controlled by the ALUs in the same cluster, or alternatively by ALUs in other clusters, via a special purpose routing network. Components of applications configured onto the array are selectively implemented in either multiplexers or ALUs, as determined by the relative efficiency of implementing the component in one or the other type of processing element, and by the relative availability of the processing element types. Multiplexer control signals are generated from combinations of ALU status signals, and optionally routed to control multiplexers in different clusters.
摘要翻译： 异构阵列包括处理元件群。 集群包括通过直接连接和各种通用路由网络链接的ALU和多路复用器的组合。 多路复用器由同一集群中的ALU或其他集群中的ALU通过专用路由网络控制。 通过在一个或另一种类型的处理元件中实现组件的相对效率以及处理元件类型的相对可用性来确定，配置到阵列上的应用的组件被选择性地实现在多路复用器或ALU中。 多路复用器控制信号从ALU状态信号的组合产生，并且可选地路由到不同簇中的控制多路复用器。
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12.发明申请High resolution fourier transform ion cyclotron resonance (FT-ICR) mass spectrometry methods and apparatus 失效高分辨率傅立叶变换离子回旋共振（FT-ICR）质谱法和仪器公开(公告)号：US20050178961A1
公开(公告)日：2005-08-18
申请号：US11051092
申请日：2005-02-04
申请人： Steven Beu , Greg Blakney , John Quinn , Christopher Hendrickson , Alan Marshall
发明人： Steven Beu , Greg Blakney , John Quinn , Christopher Hendrickson , Alan Marshall
CPC分类号： H01J49/38
摘要： A high resolution Fourier Transform Ion Cyclotron Resonance (FT-ICR) mass spectrometry system includes excitation circuitry including an excitation amplifier for generating an electrical excitation signal and excitation electrodes for applying an oscillating electric field to excite ions in the system. Detection circuitry including detection electrodes measures a detection signal which includes a plurality of signal values including signal values induced by the ions. Structure is provided for reducing or canceling coupling of the excitation signal into the detection signal, wherein simultaneous excitation and detection is used. A computing structure generates a Fourier transformed frequency domain representation of the detection signal and deconvolves the frequency domain representation using complex division to separate a dispersion spectrum portion and an absorption spectrum portion.
摘要翻译： 高分辨率傅里叶变换离子回旋共振（FT-ICR）质谱系统包括激励电路，其包括用于产生电激励信号的激发放大器和用于施加振荡电场以激发系统中离子的激励电极。 包括检测电极的检测电路测量包括多个信号值的检测信号，包括由离子诱发的信号值。 提供了用于减少或消除激励信号耦合到检测信号中的结构，其中使用同时激励和检测。 计算结构生成检测信号的傅立叶变换频域表示，并使用复数除法解卷积频域表示以分离色散谱部分和吸收光谱部分。
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13.发明申请公开(公告)号：US20070241811A1
公开(公告)日：2007-10-18
申请号：US11765273
申请日：2007-06-19
IPC分类号： H01L25/00
CPC分类号： G06F17/505 , H03K19/0016
摘要： Leakage currents across circuit components such as transistors are avoided by placing circuits into a low-leakage standby mode. The circuits are configured such that voltage differentials across leakage-prone circuit components are avoided when in standby mode. Various means are used to configure the circuits, such as configuration ports, data input lines, scan chains, etc. In embodiments containing reconfigurable devices, low-threshold transistors are used to implement the routing network.
摘要翻译： 通过将电路放置在低泄漏待机模式下，避免电路元件（如晶体管）的漏电流。 这些电路被配置成使得在待机模式下避免跨漏电的电路部件的电压差。 使用各种手段来配置电路，例如配置端口，数据输入线，扫描链等。在包含可重新配置的设备的实施例中，使用低阈值晶体管来实现路由网络。
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14.发明授权公开(公告)号：US07233197B2
公开(公告)日：2007-06-19
申请号：US11006974
申请日：2004-12-07
IPC分类号： H01L25/00
CPC分类号： G06F17/505 , H03K19/0016
摘要： Leakage currents across circuit components such as transistors are avoided by placing circuits into a low-leakage standby mode. The circuits are configured such that voltage differentials across leakage-prone circuit components are avoided when in standby mode. Various means are used to configure the circuits, such as configuration ports, data input lines, scan chains, etc. In embodiments containing reconfigurable devices, low-threshold transistors are used to implement the routing network.
摘要翻译： 通过将电路放置在低泄漏待机模式下，避免电路元件（如晶体管）的漏电流。 这些电路被配置成使得在待机模式下避免跨漏电的电路部件的电压差。 使用各种手段来配置电路，例如配置端口，数据输入线，扫描链等。在包含可重新配置的设备的实施例中，使用低阈值晶体管来实现路由网络。
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公开(公告)号：US06946903B2
公开(公告)日：2005-09-20
申请号：US10628906
申请日：2003-07-28
IPC分类号： H01L21/822 , H01L21/82 , H01L27/04 , H03K19/00 , H01L25/00
CPC分类号： G06F17/505 , H03K19/0016
摘要： Leakage currents across circuit components such as transistors are avoided by placing circuits into a low-leakage standby mode. The circuits are configured such that voltage differentials across leakage-prone circuit components are avoided when in standby mode. Various means are used to configure the circuits, such as configuration ports, data input lines, scan chains, etc. In embodiments containing reconfigurable devices, low-threshold transistors are used to implement the routing network.
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公开(公告)号：US06262908B1
公开(公告)日：2001-07-17
申请号：US09341565
申请日：1999-07-13
IPC分类号： G11C506
CPC分类号： H03K19/1776 , H03K19/17704 , H03K19/17736 , H03K19/17796
摘要： A field programmable device comprising an array of processing devices, a connection matrix interconnecting the processing devices and including switches, and memory cells for storing data for controlling the switches to define the configuration of the interconnections of the connection matrix. In order to provide flexible use of memory and to enable higher memory densities, gates are provided which can be used to isolate the effect of the data stored in groups of the memory cells and switches on the configuration of the interconnections so that the memory cells in that group are available for storing other data.
摘要翻译： 一种现场可编程设备，包括处理设备阵列，连接处理设备并包括交换机的连接矩阵，以及用于存储用于控制交换机以定义连接矩阵的互连的配置的数据的存储器单元。 为了提供对存储器的灵活使用并且能够实现更高的存储器密度，提供了门，其可以用于隔离存储在存储器单元组中的数据的影响并且切换到互连的配置，使得存储器单元 该组可用于存储其他数据。
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公开(公告)号：US5023267A
公开(公告)日：1991-06-11
申请号：US353133
申请日：1989-05-17
IPC分类号： A01N43/80 , A01N47/48 , C02F1/50 , C08K5/45 , C09D5/14 , C09D5/16 , C09D7/12 , C09J11/06 , D21H19/00
CPC分类号： C02F1/50 , A01N43/80 , A01N47/48 , Y10S514/937 , Y10S514/975
摘要： A method of treating an aqueous or non-aqueous system, including paints and adhesives, is described which comprises adding to the system a thiolan of the formula: ##STR1## wherein each of X and Y, which may be the same or different, represents fluorine, chlorine or bromine, in combination with an alkylene bisthiocyanate and a 2-N-alkyl-4-isothiazolin-3-one.
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公开(公告)号：US4239648A
公开(公告)日：1980-12-16
申请号：US57155
申请日：1979-07-12
申请人： Alan Marshall , Norman Richardson
发明人： Alan Marshall , Norman Richardson
IPC分类号： C23F11/167 , C02F5/14 , C23F11/08 , C23F11/173 , C23F11/18 , C23F11/16
摘要： Compositions useful for inhibiting the corrosion of ferrous metals in contact with aqueous systems comprise (a) a telomeric compound of formula: ##STR1## or salts thereof, wherein R.sup.11 is hydrogen or a methyl or ethyl residue; R is hydrogen, a straight- or branched alkyl residue having from 1-18 carbon atoms, a cycloalkyl residue having from 5-12 carbon atoms, an aryl residue, an aralkyl residue, a residue of formula: ##STR2## wherein R.sup.11 has its previous significance; and the sum of n+m is an integer of at most 100; or a residue --OX wherein X is hydrogen or a straight- or branched alkyl residue having 1-4 carbon atoms and R.sup.1 is a residue --OX, wherein X has its previous significance.
摘要翻译： 用于抑制与含水体系接触的黑色金属的腐蚀的组合物包含（a）下式的端粒化合物或其盐，其中R 11是氢或甲基或乙基残基; R是氢，具有1-18个碳原子的直链或支链烷基，具有5-12个碳原子的环烷基残基，芳基残基，芳烷基残基，下式的残基：其中R11具有 以前的意义; n + m的和为100以下的整数。 或残基-OX，其中X是氢或具有1-4个碳原子的直链或支链烷基，R1是残基-OX，其中X具有其先前的含义。
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公开(公告)号：US20080309417A1
公开(公告)日：2008-12-18
申请号：US12043368
申请日：2008-03-06
申请人： Paul Bonwick , Alan Marshall , Howard Sims
发明人： Paul Bonwick , Alan Marshall , Howard Sims
CPC分类号： G01R31/3016 , G01R31/31725 , G01R31/31727 , G01R31/31937
摘要： A ring oscillator comprises a first logic block having a first input connected to a specific point along a delay path, a first output and a second output and a second logic block having a first input connected to the first output of the first logic block, a second input connected to the second output of the first logic block, a third input connected to the end of the delay path and a first output connected to the beginning of the delay path. The first logic block is arranged to, in use, alternately switch its first output and second output from logical HIGH to logical LOW, and vice versa, every time a rising edge is input into its first input. The second logic block is arranged to, in use, alternately select its first input and its second input every time a rising edge is input into its third input. The pulse width of the signal output from the first output of the second logic block is indicative of the time necessary for one of a rising edge or a falling edge to propagate from the beginning of the delay path to the specific point along the delay path and the inverse pulse width of the signal output from the first output of the second logic block is indicative of the time necessary for the one of the rising edge or the falling edge respectively to propagate from specific point along the delay path to the end of the delay path.
摘要翻译： 环形振荡器包括具有连接到沿着延迟路径的特定点的第一输入的第一逻辑块，第一输出和第二输出以及具有连接到第一逻辑块的第一输出的第一输入的第二逻辑块， 连接到第一逻辑块的第二输出的第二输入，连接到延迟路径的末端的第三输入和连接到延迟路径的开始的第一输出。 第一逻辑块被布置成在使用中，每当将上升沿输入到其第一输入时，交替地将其第一输出和第二输出从逻辑高电平切换到逻辑低电平，反之亦然。 第二逻辑块被布置成在使用中，每当将上升沿输入到其第三输入时，交替地选择其第一输入及其第二输入。 从第二逻辑块的第一输出输出的信号的脉冲宽度指示上升沿或下降沿中的一个从延迟路径的开始传播到沿延迟路径的特定点所需的时间， 从第二逻辑块的第一输出输出的信号的反向脉冲宽度指示上升沿或下降沿中的一个分别从沿着延迟路径的特定点传播到延迟结束所需的时间 路径。
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20.发明授权公开(公告)号：US07315201B2
公开(公告)日：2008-01-01
申请号：US11765273
申请日：2007-06-19
IPC分类号： H01L25/00
CPC分类号： G06F17/505 , H03K19/0016
摘要： Leakage currents across circuit components such as transistors are avoided by placing circuits into a low-leakage standby mode. The circuits are configured such that voltage differentials across leakage-prone circuit components are avoided when in standby mode. Various means are used to configure the circuits, such as configuration ports, data input lines, scan chains, etc. In embodiments containing reconfigurable devices, low-threshold transistors are used to implement the routing network.
摘要翻译： 通过将电路放置在低泄漏待机模式下，避免电路元件（如晶体管）的漏电流。 这些电路被配置成使得在待机模式下避免跨漏电的电路部件的电压差。 使用各种手段来配置电路，例如配置端口，数据输入线，扫描链等。在包含可重新配置的设备的实施例中，使用低阈值晶体管来实现路由网络。
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