公开(公告)号：US5429730A

公开(公告)日：1995-07-04

申请号：US144414

申请日：1993-11-02

申请人： Hiroko Nakamura ,  Haruki Komano ,  Kazuyoshi Sugihara ,  Keiji Horioka ,  Mitsuyo Kariya ,  Soichi Inoue ,  Ichiro Mori ,  Katsuya Okumura ,  Tadahiro Takigawa ,  Toru Watanabe ,  Motosuke Miyoshi ,  Yuichiro Yamazaki ,  Haruo Okano

发明人： Hiroko Nakamura ,  Haruki Komano ,  Kazuyoshi Sugihara ,  Keiji Horioka ,  Mitsuyo Kariya ,  Soichi Inoue ,  Ichiro Mori ,  Katsuya Okumura ,  Tadahiro Takigawa ,  Toru Watanabe ,  Motosuke Miyoshi ,  Yuichiro Yamazaki ,  Haruo Okano

IPC分类号： B05D5/00 ,  C23C16/04 ,  G03F1/00 ,  G03F1/26 ,  G03F1/74 ,  C23C14/34 ,  B05D3/06 ,  B44C1/22

CPC分类号： G03F1/74 ,  B05D5/005 ,  C23C16/047 ,  G03F1/26

摘要： According to this invention, there is provided a method of repairing a bump defect of a structure obtained by forming a predetermined pattern on a substrate, having the steps of forming a first thin film consisting of a material different from that of the substrate on the substrate around the bump defect or close to the bump defect, forming a second thin film on the bump defect and the first thin film to flatten an upper surface of the second thin film, performing simultaneous removal of the bump defect and the thin films on an upper portion of the projecting defect and around the bump defect using a charged particle beam, and performing removal of the thin films left in the step of performing simultaneous removal.

摘要翻译： 根据本发明，提供了一种修复通过在基板上形成预定图案而获得的结构的凸点缺陷的方法，该方法具有以下步骤：在基板上形成由不同于基板的材料构成的第一薄膜 在凸起缺陷附近或接近凸块缺陷的情况下，在凸起缺陷上形成第二薄膜和使第一薄膜平坦化第二薄膜的上表面，同时去除凸起缺陷和上部的薄膜 使用带电粒子束的突出缺陷的一部分和凸起缺陷周围，并且执行在执行同时移除的步骤中留下的薄膜的去除。

公开(公告)号：US5356515A

公开(公告)日：1994-10-18

申请号：US988809

申请日：1992-12-10

申请人： Yoshifumi Tahara ,  Yoshihisa Hirano ,  Masahiro Ogasawara ,  Isahiro Hasegawa ,  Keiji Horioka ,  Takaya Matsushita

发明人： Yoshifumi Tahara ,  Yoshihisa Hirano ,  Masahiro Ogasawara ,  Isahiro Hasegawa ,  Keiji Horioka ,  Takaya Matsushita

IPC分类号： H01L21/311 ,  H01L21/00

CPC分类号： H01L21/31116

摘要： A dry etching method which includes supplying a workpiece having an oxide portion or a nitride portion into a processing vessel, keeping said workpiece at temperatures not higher than 0.degree. C. within said processing vessel, supplying an etching gas including a first gas containing a halogen element and a second gas containing carbon having an oxidation number of less than 4 and oxygen to a region in the vicinity of the workpiece while keeping the temperature the workpiece at a level not higher than 0.degree. C., and forming a plasma of said etching gas for etching the oxide portion or the nitride portion of the workpiece with said plasma.

摘要翻译： 一种干蚀刻方法，其包括将具有氧化物部分或氮化物部分的工件供应到处理容器中，将所述工件保持在所述处理容器内不高于0℃的温度，提供包括含有卤素的第一气体的蚀刻气体 元素和含有氧化数小于4的碳的第二气体和氧气到工件附近的区域，同时将工件的温度保持在不高于0℃的水平，并形成所述蚀刻的等离子体 用于利用所述等离子体蚀刻工件的氧化物部分或氮化物部分的气体。

公开(公告)号：US5271788A

公开(公告)日：1993-12-21

申请号：US917361

申请日：1992-07-23

申请人： Makoto Hasegawa ,  Takaya Matsushita ,  Keiji Horioka ,  Isahiro Hasegawa ,  Toshihisa Nozawa ,  Yoshio Ishikawa ,  Masahito Hiratsuka ,  Satoshi Kaneko

发明人： Makoto Hasegawa ,  Takaya Matsushita ,  Keiji Horioka ,  Isahiro Hasegawa ,  Toshihisa Nozawa ,  Yoshio Ishikawa ,  Masahito Hiratsuka ,  Satoshi Kaneko

IPC分类号： H01J37/32 ,  C23F1/02

CPC分类号： H01J37/32082 ,  H01J37/3255 ,  H01J37/32623 ,  H01J37/32642 ,  H01J37/3266

摘要： A magnetron plasma etching apparatus comprises a suscepter serving as an electrode on which a silicon wafer is mounted. A carbon ring having an outer diameter larger than the diameter of the wafer and an electrical resistance lower than that of the wafer, is arranged around the suscepter. The carbon ring is electrically connected to the suscepter. The carbon ring improves uniformity of etching of the wafer.

公开(公告)号：US5270266A

公开(公告)日：1993-12-14

申请号：US988669

申请日：1992-12-10

申请人： Yoshihisa Hirano ,  Yoshifumi Tahara ,  Isahiro Hasegawa ,  Keiji Horioka

发明人： Yoshihisa Hirano ,  Yoshifumi Tahara ,  Isahiro Hasegawa ,  Keiji Horioka

IPC分类号： B23Q3/15 ,  H01L21/00 ,  H01L21/302 ,  H01L21/3065 ,  H01L21/683 ,  H01L21/465

CPC分类号： H01L21/67109 ,  H01J37/3244 ,  H01J2237/2001 ,  Y10S148/05

摘要： A method of adjusting the temperature of a semiconductor wafer comprising mounting and attracting the wafer on a susceptor in a process chamber, exhausting and decompressing the process chamber, controlling the temperature of the wafer to become equal to a process temperature while cooling or heating the susceptor, supplying process gas into the chamber to process the wafer with this process gas, and introducing CF.sub.4 gas into interstices between the wafer and the susceptor through the susceptor to allow heat exchange to be achieved between them. CF.sub.4 gas includes same components as at least some of those of the process gas and it is more excellent in heat transmitting characteristic than helium gas. Even when CF.sub.4 gas is leaked into a process area, therefore, any influence is not added to the process.

摘要翻译： 一种调节半导体晶片的温度的方法，包括在处理室中的基座上安装和吸引晶片，对处理室进行排气和减压，在冷却或加热基座的同时将晶片的温度控制为等于处理温度 将处理气体供应到室中以用该处理气体处理晶片，并且通过基座将CF 4气体引入到晶片和基座之间的间隙中以允许在它们之间实现热交换。 CF4气体包括与工艺气体中的至少一些相同的组分，并且其传热特性比氦气更优异。 因此，即使CF4气体泄漏到处理区域中，也不会对过程产生任何影响。

公开(公告)号：US5234527A

公开(公告)日：1993-08-10

申请号：US731473

申请日：1991-07-17

申请人： Toshihisa Nozawa ,  Junichi Arami ,  Yukimasa Yoshida ,  Keiji Horioka

发明人： Toshihisa Nozawa ,  Junichi Arami ,  Yukimasa Yoshida ,  Keiji Horioka

IPC分类号： C23C14/54 ,  B01J3/00 ,  C23C16/46 ,  C23F4/00 ,  G01F23/22 ,  G01F23/24 ,  H01L21/302 ,  H01L21/3065

CPC分类号： B01J3/002 ,  G01F23/22 ,  H01J2237/2001

摘要： A liquid level detecting device used in a vacuum processing apparatus, the device comprising a liquid container section, an inlet pipe for liquid supply connected to the liquid container section, and outlet pipe for discharging the liquid when the liquid in the liquid container section overflows a predetermined liquid level, a temperature measurement terminal provided in the liquid container section, for detecting the temperature of the liquid in the container section, means for heating or cooling the temperature measurement terminal, and a liquid level detecting section for detecting the surface level of the liquid on the basis of the difference between two temperatures of the liquid measured when the heating or cooling means is in contact with the liquid and when not in contact.

摘要翻译： 一种用于真空处理装置的液位检测装置，该装置包括液体容器部分，与液体容器部分连接的液体供给入口管，以及当液体容器部分中的液体溢出时排出液体的出口管 预定液位，设置在液体容器部分中的用于检测容器部分中的液体的温度的温度测量端子，用于加热或冷却温度测量端子的装置，以及液位检测部分，用于检测 基于当加热或冷却装置与液体接触时和当不接触时测量的液体的两个温度之间的差异的液体。

公开(公告)号：US06261428B1

公开(公告)日：2001-07-17

申请号：US08183787

申请日：1994-01-21

申请人： Toshihisa Nozawa ,  Keiji Horioka ,  Isahiro Hasegawa

发明人： Toshihisa Nozawa ,  Keiji Horioka ,  Isahiro Hasegawa

IPC分类号： C23C1434

CPC分类号： H01J37/3408 ,  H01J37/3455

摘要： A magnetron plasma process apparatus comprises a process chamber, an upper electrode and a lower electrode, both located within the process chamber and extending parallel to each other, a gas-supplying system for supplying a process gas into the space between the electrodes, a high-frequency power supply for generating an electric field, to thereby to form plasma from the process gas, and magnetic field generating section for generating a magnetic field which extends through the space between the electrodes. The magnetic field generating section has a pair of permanent magnets located outside the process chamber, sandwiching the space between the electrodes. The magnetic field generated by this section extends through said space, from one of the magnets to the other thereof and substantially parallel to the electrodes, and serves to achieve magnetron plasma process on an object placed on the lower electrode.

摘要翻译： 磁控管等离子体处理装置包括处理室，上电极和下电极，两者都位于处理室内并且彼此平行延伸;气体供应系统，用于将处理气体供应到电极之间的空间中，高 用于产生电场，从而从处理气体形成等离子体的频率电源以及用于产生延伸穿过电极之间的空间的磁场的磁场产生部。 磁场产生部分具有位于处理室外的一对永磁体，夹在电极之间的空间。 由该部分产生的磁场延伸穿过所述空间，从一个磁体到另一个磁体并且基本上平行于电极，并且用于在放置在下电极上的物体上实现磁控管等离子体处理。

公开(公告)号：US5698070A

公开(公告)日：1997-12-16

申请号：US175513

申请日：1993-12-30

申请人： Yoshihisa Hirano ,  Yoshifumi Tahara ,  Hiroshi Nishikawa ,  Isahiro Hasegawa ,  Keiji Horioka

发明人： Yoshihisa Hirano ,  Yoshifumi Tahara ,  Hiroshi Nishikawa ,  Isahiro Hasegawa ,  Keiji Horioka

IPC分类号： H01L21/00 ,  H05H1/00

CPC分类号： H01L21/67109 ,  H01J37/3244 ,  H01J2237/2001

摘要： A method of etching oxide film on a semiconductor wafer comprising pushing the wafer against the top of lower electrode while facing it to an upper electrode, decompressing to exhaust a chamber, forming electric field between the wafer and the upper electrode under decompressed state and generating the gas plasma of process gas while supplying the process gas to an oxide-film-formed surface of the wafer through the upper electrode, introducing auxiliary gas to the peripheral portion of the wafer when the gas plasma of process gas is acting on the wafer, and controlling the etching reaction of the gas plasma relative to the peripheral portion of the wafer by auxiliary gas.

摘要翻译： 一种在半导体晶片上蚀刻氧化膜的方法，包括将晶片压靠在下电极的顶部同时面向上电极，减压以排出室，在解压缩状态下在晶片和上电极之间形成电场，并产生 在处理气体的气体等离子体中，同时通过上部电极将工艺气体供给到晶片的氧化物膜形成表面，当处理气体的气体等离子体作用在晶片上时，将辅助气体引入晶片的周边部分，以及 通过辅助气体控制气体等离子体相对于晶片的周边部分的蚀刻反应。

公开(公告)号：US5302236A

公开(公告)日：1994-04-12

申请号：US779376

申请日：1991-10-18

申请人： Yoshifumi Tahara ,  Yoshihisa Hirano ,  Isahiro Hasegawa ,  Keiji Horioka

发明人： Yoshifumi Tahara ,  Yoshihisa Hirano ,  Isahiro Hasegawa ,  Keiji Horioka

IPC分类号： H01L21/311 ,  H01L21/00

CPC分类号： H01L21/31144 ,  H01L21/31116

摘要： According to this invention, a semiconductor wafer on which an oxide or nitride film is formed is loaded in a processing vessel, and when the oxide or nitride film of the semiconductor wafer is to be etched by a plasma of CHF.sub.3 gas in the processing vessel, CO gas is present in the plasma atmosphere.

摘要翻译： 根据本发明，其中形成有氧化物或氮化物膜的半导体晶片被装载到处理容器中，并且当半导体晶片的氧化物或氮化物膜被处理容器中的CHF 3气体的等离子体蚀刻时， CO气体存在于等离子体气氛中。

公开(公告)号：US5445710A

公开(公告)日：1995-08-29

申请号：US202372

申请日：1994-02-25

申请人： Masaru Hori ,  Hiroyuki Yano ,  Keiji Horioka ,  Hisataka Hayashi ,  Sadayuki Jimbo ,  Haruo Okano ,  Kazuhiro Tomioka ,  Yasuhiro Ito ,  Haruki Mori

发明人： Masaru Hori ,  Hiroyuki Yano ,  Keiji Horioka ,  Hisataka Hayashi ,  Sadayuki Jimbo ,  Haruo Okano ,  Kazuhiro Tomioka ,  Yasuhiro Ito ,  Haruki Mori

IPC分类号： H01L21/033 ,  H01L21/308 ,  H01L21/311 ,  H01L21/314 ,  H01L21/3213 ,  H01L21/306 ,  B44C1/22 ,  C03C15/00 ,  C23F1/00

CPC分类号： H01L21/31122 ,  H01L21/0332 ,  H01L21/3081 ,  H01L21/31116 ,  H01L21/31138 ,  H01L21/31144 ,  H01L21/3146 ,  H01L21/32136 ,  H01L21/32137 ,  H01L21/32139

摘要： A dry-etching method comprising the steps of forming carbon film on a substrate to be etched, forming a resist pattern on said carbon thin film, selectively etching said carbon film using said resist pattern as a mask by a plasma of a gas mixture of a gas containing fluorine atoms and a gas containing oxygen atoms which are mixed at an atomic ratio of fluorine to oxygen of 198:1 to 1:2 so as to form a carbon film pattern, and selectively etching said substrate to be etched using said carbon film pattern as a mask or said resist pattern and said carbon film pattern as masks.

摘要翻译： 一种干蚀刻方法，包括以下步骤：在要蚀刻的基底上形成碳膜，在所述碳薄膜上形成抗蚀剂图案，使用所述抗蚀剂图案作为掩模，用等离子体选择性地蚀刻所述碳膜， 含有氟原子的气体和以氟与氧的原子比混合为198:1〜1:2的含有氧原子的气体，以形成碳膜图案，并使用所述碳膜选择性地蚀刻所述蚀刻用基板 图案作为掩模或所述抗蚀剂图案和所述碳膜图案作为掩模。

公开(公告)号：US6132551A

公开(公告)日：2000-10-17

申请号：US937348

申请日：1997-09-20

申请人： Keiji Horioka ,  Haruo Okano

发明人： Keiji Horioka ,  Haruo Okano

IPC分类号： H01J37/32 ,  C23C16/48 ,  C23F1/02 ,  C23F1/08

CPC分类号： H01J37/321

摘要： The invention is embodied in an inductively coupled plasma reactor having a conductive enclosure defining a reactor chamber interior, the enclosure including a conductive layer, and an inductive antenna external of the reactor chamber interior and facing the interior through the conductive layer and being connectable to an RF power source, the conductive layer being sufficiently thin to permit an inductive field of the inductive antenna to coupled through the conductive layer into the reactor chamber interior. A wafer pedestal for supporting a semiconductive workpiece within the reactor chamber interior is connected to an RF bias power supply whereby a workpiece on the wafer support is a bias power electrode and the conductive layer is a bias power counter electrode, so that the entire reactor enclosure is a bias power counter electrode. Preferably, the bias power electrode is biased with respect to RF ground, and the conductive reactor enclosure including the conductive layer is grounded.

摘要翻译： 本发明体现在电感耦合等离子体反应器中，其具有限定反应室内部的导电外壳，外壳包括导电层，以及反应室内部外部的电感天线，并通过导电层面向内部，并且可连接到 RF电源，导电层足够薄以允许感应天线的感应场通过导电层耦合到反应室内部。 用于在反应器室内部支撑半导体工件的晶片基座连接到RF偏置电源，由此晶片支撑件上的工件是偏置功率电极，并且导电层是偏置功率对电极，使得整个反应器外壳 是偏置电源对电极。 优选地，偏置功率电极相对于RF地被偏置，并且包括导电层的导电电抗器外壳接地。