公开(公告)号：US20110147942A1

公开(公告)日：2011-06-23

申请号：US12838960

申请日：2010-07-19

申请人： Katsunori YAHASHI ,  Takuji Kuniya ,  Takaya Matsushita ,  Murato Kawai ,  Shuichi Taniguchi

发明人： Katsunori YAHASHI ,  Takuji Kuniya ,  Takaya Matsushita ,  Murato Kawai ,  Shuichi Taniguchi

IPC分类号： H01L23/52 ,  H01L21/768

CPC分类号： H01L27/0688 ,  H01L27/2409 ,  H01L27/2418 ,  H01L27/2481 ,  H01L45/085 ,  H01L45/1233 ,  H01L45/147 ,  H01L45/1675

摘要： A method of manufacturing a semiconductor memory device of an embodiment includes: after forming a first interconnection layer and a memory cell layer above a semiconductor substrate, forming first lines by forming first grooves extending in first direction; forming a thin film on the side walls of the first grooves; forming a stack structure by filling an interlayer insulating film in the first grooves; forming a second interconnection layer above the stack structure; forming second lines by forming second grooves extending in second direction; removing the thin film exposed at bottom of the second grooves; and forming columnar memory cells by removing the memory cell layer exposed at bottom of the second grooves. The thin film has higher etching rate than the interlayer insulating film, and is removed prior to portions of the memory cell layer adjoining the thin film.

摘要翻译： 制造实施例的半导体存储器件的方法包括：在半导体衬底之上形成第一互连层和存储单元层之后，通过形成沿第一方向延伸的第一沟槽来形成第一线; 在第一槽的侧壁上形成薄膜; 通过在第一槽中填充层间绝缘膜形成堆叠结构; 在所述堆叠结构之上形成第二互连层; 通过形成沿第二方向延伸的第二凹槽形成第二线; 去除在第二凹槽的底部暴露的薄膜; 以及通过去除在第二凹槽的底部暴露的存储单元层来形成柱状存储单元。 薄膜具有比层间绝缘膜更高的蚀刻速率，并且在与薄膜邻接的存储单元层的部分之前被去除。

公开(公告)号：US20080054395A1

公开(公告)日：2008-03-06

申请号：US11892635

申请日：2007-08-24

申请人： Kazutaka Akiyama ,  Takaya Matsushita

发明人： Kazutaka Akiyama ,  Takaya Matsushita

IPC分类号： H01L23/62 ,  H01L21/4763

CPC分类号： H01L23/5258 ,  H01L21/76816 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device is provided with a conductor wire and a fuse wire formed in an insulating film over a semiconductor substrate, a first under-pad-wire insulating film formed above the insulating film, a second under-pad-wire insulating film formed on the first under-pad-wire insulating film, a pad wire formed in an area above the conductive wire, in the first and second under-pad-wire insulating films and an opening formed by leaving a part of the first under-pad-wire insulating film in an area above the fuse wire, in the first and second under-pad-wire insulating films, wherein the second under-pad-wire insulating film comprises an element different from that of the first under-pad-wire insulating film.

摘要翻译： 半导体器件设置有形成在半导体衬底上的绝缘膜中的导体线和熔丝，在绝缘膜上方形成的第一焊盘下绝缘膜，形成在绝缘膜上的第二焊盘下绝缘膜 第一下焊丝线绝缘膜，形成在导电线上方的区域中的焊盘，位于第一和第二焊盘下绝缘膜中的开口，以及通过留下第一下焊丝线绝缘的一部分而形成的开口 在第一和第二下焊丝线绝缘膜中的熔丝线上方的区域中的第二底焊丝线绝缘膜，其中第二焊盘下绝缘膜包括与第一焊盘下绝缘膜不同的元件。

公开(公告)号：US20050106866A1

公开(公告)日：2005-05-19

申请号：US10959501

申请日：2004-10-07

申请人： Mitsuhiro Omura ,  Makiko Katano ,  Shoko Ito ,  Takaya Matsushita ,  Hisashi Kaneko

发明人： Mitsuhiro Omura ,  Makiko Katano ,  Shoko Ito ,  Takaya Matsushita ,  Hisashi Kaneko

IPC分类号： H01L21/00 ,  H01L21/26 ,  H01L21/302 ,  H01L21/306 ,  H01L21/3065 ,  H01L21/311 ,  H01L21/324 ,  H01L21/44 ,  H01L21/461 ,  H01L21/4763 ,  H01L21/768

CPC分类号： H01L21/76838 ,  H01L21/02046 ,  H01L21/31116

摘要： A method of manufacturing a semiconductor device includes subjecting a semiconductor wafer, which includes a copper layer formed above a semiconductor substrate and covered with an insulating film, to a dry etching using a fluorocarbon gas to partially remove the insulating film, thereby at least partially exposing a surface of the copper layer. The copper layer, the surface of which is at least partially exposed is subjected to a nitrogen plasma treatment. The semiconductor wafer having the nitrogen plasma-treated copper layer is exposed to atmosphere, and then the semiconductor wafer is subjected to a surface treatment.

摘要翻译： 一种制造半导体器件的方法包括使用碳氟化合物气体对包含形成在半导体衬底之上并被绝缘膜形成的铜层的半导体晶片进行干蚀刻，以部分地去除绝缘膜，从而至少部分曝光 铜层的表面。 将其表面至少部分暴露的铜层进行氮等离子体处理。 将具有氮等离子体处理的铜层的半导体晶片暴露于大气中，然后对半导体晶片进行表面处理。

公开(公告)号：US5851641A

公开(公告)日：1998-12-22

申请号：US848625

申请日：1997-04-29

申请人： Tadao Matsunaga ,  Takaya Matsushita ,  Kei Hattori

发明人： Tadao Matsunaga ,  Takaya Matsushita ,  Kei Hattori

IPC分类号： B23Q3/15 ,  H01L21/683 ,  B32B9/00

CPC分类号： H01L21/6833 ,  Y10T279/23 ,  Y10T428/24917 ,  Y10T428/31504

摘要： The present invention is to provide an electrostatic chucking device having improved heat conductivity and at the same time increased adsorption area and improved adsorptity as well as having no uneveness on the wafer-provided face. The electrostatic chucking device of the present invention comprises a metal base, an adhesive layer, an electrode layer comprising a metal-deposited or metal-plated layer, and an electrically insulating layer possessing a face for providing a substance to be adhered by suction, laminated thereon in this order. The electrostatic chucking device is produced by a process comprising a stage for forming a metal-deposited or metal-plated layer on one face of a heat resistant film, a stage for providing a photoresist layer on the surface of the electrode layer, carrying out pattern exposure, development, and an etching processing, a stage for forming a semi-cured adhesive layer on the surface of the etched electrode layer, a stage for punching the formed laminated sheet according to the shape of a metal base, and stage for laminating the metal base and the laminate sheet via the above-mentioned adhesive and curing the laminated product.

摘要翻译： 本发明提供一种静电吸附装置，其具有改善的导热性，并且同时增加了吸附面积和改进的吸附性，并且在晶片提供面上没有不均匀性。 本发明的静电吸附装置包括金属基底，粘合剂层，包含金属沉积或金属镀层的电极层和具有用于通过抽吸提供待粘附物质的面的电绝缘层，层压 按此顺序。 静电吸附装置通过包括在耐热膜的一个面上形成金属沉积或金属镀层的工序的工序，在电极层的表面上设置光致抗蚀剂层的工序， 曝光，显影和蚀刻处理，在蚀刻电极层的表面上形成半固化粘合剂层的阶段，根据金属基底的形状冲压所形成的层叠片的阶段和用于层压 金属基底和层压片通过上述粘合剂固化并固化层压产品。

公开(公告)号：US5645921A

公开(公告)日：1997-07-08

申请号：US561731

申请日：1995-11-22

申请人： Tadao Matsunaga ,  Takaya Matsushita ,  Kei Hattori

发明人： Tadao Matsunaga ,  Takaya Matsushita ,  Kei Hattori

IPC分类号： B23Q3/15 ,  H01L21/683 ,  B32B9/00

CPC分类号： H01L21/6833 ,  Y10T279/23 ,  Y10T428/24917 ,  Y10T428/31504

摘要： The present invention is to provide an electrostatic chucking device having improved heat conductivity and at the same time increased adsorption area and improved adsorptity as well as having no uneveness on the wafer-provided face. The electrostatic chucking device of the present invention comprises a metal base, an adhesive layer, an electrode layer comprising a metal-deposited or metal-plated layer, and an electrically insulating layer possessing a face for providing a substance to be adhered by suction, laminated thereon in this order. The electrostatic chucking device is produced by a process comprising a stage for forming a metal-deposited or metal-plated layer on one face of a heat resistant film, a stage for providing a photoresist layer on the surface of the electrode layer, carrying out pattern exposure, development, and an etching processing, a stage for forming a semi-cured adhesive layer on the surface of the etched electrode layer, a stage for punching the formed laminated sheet according to the shape of a metal base, and stage for laminating the metal base and the laminate sheet via the above-mentioned adhesive and curing the laminated product.

摘要翻译： 本发明提供一种静电吸附装置，其具有改善的导热性，并且同时增加了吸附面积和改进的吸附性，并且在晶片提供面上没有不均匀性。 本发明的静电吸附装置包括金属基底，粘合剂层，包含金属沉积或金属镀层的电极层和具有用于通过抽吸提供要粘附的物质的面的电绝缘层，层压 按此顺序。 静电吸附装置通过包括在耐热膜的一个面上形成金属沉积或金属镀层的工序的工序，在电极层的表面上设置光致抗蚀剂层的工序， 曝光，显影和蚀刻处理，在蚀刻电极层的表面上形成半固化粘合剂层的阶段，根据金属基底的形状冲压所形成的层叠片的阶段和用于层压 金属基底和层压片通过上述粘合剂固化并固化层压产品。

公开(公告)号：US5356515A

公开(公告)日：1994-10-18

申请号：US988809

申请日：1992-12-10

申请人： Yoshifumi Tahara ,  Yoshihisa Hirano ,  Masahiro Ogasawara ,  Isahiro Hasegawa ,  Keiji Horioka ,  Takaya Matsushita

发明人： Yoshifumi Tahara ,  Yoshihisa Hirano ,  Masahiro Ogasawara ,  Isahiro Hasegawa ,  Keiji Horioka ,  Takaya Matsushita

IPC分类号： H01L21/311 ,  H01L21/00

CPC分类号： H01L21/31116

摘要： A dry etching method which includes supplying a workpiece having an oxide portion or a nitride portion into a processing vessel, keeping said workpiece at temperatures not higher than 0.degree. C. within said processing vessel, supplying an etching gas including a first gas containing a halogen element and a second gas containing carbon having an oxidation number of less than 4 and oxygen to a region in the vicinity of the workpiece while keeping the temperature the workpiece at a level not higher than 0.degree. C., and forming a plasma of said etching gas for etching the oxide portion or the nitride portion of the workpiece with said plasma.

摘要翻译： 一种干蚀刻方法，其包括将具有氧化物部分或氮化物部分的工件供应到处理容器中，将所述工件保持在所述处理容器内不高于0℃的温度，提供包括含有卤素的第一气体的蚀刻气体 元素和含有氧化数小于4的碳的第二气体和氧气到工件附近的区域，同时将工件的温度保持在不高于0℃的水平，并形成所述蚀刻的等离子体 用于利用所述等离子体蚀刻工件的氧化物部分或氮化物部分的气体。

公开(公告)号：US07943459B2

公开(公告)日：2011-05-17

申请号：US11892635

申请日：2007-08-24

申请人： Kazutaka Akiyama ,  Takaya Matsushita

发明人： Kazutaka Akiyama ,  Takaya Matsushita

IPC分类号： H01L21/8238 ,  H01L21/336 ,  H01L21/425

CPC分类号： H01L23/5258 ,  H01L21/76816 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device is provided with a conductor wire and a fuse wire formed in an insulating film over a semiconductor substrate, a first under-pad-wire insulating film formed above the insulating film, a second under-pad-wire insulating film formed on the first under-pad-wire insulating film, a pad wire formed in an area above the conductive wire, in the first and second under-pad-wire insulating films and an opening formed by leaving a part of the first under-pad-wire insulating film in an area above the fuse wire, in the first and second under-pad-wire insulating films, wherein the second under-pad-wire insulating film comprises an element different from that of the first under-pad-wire insulating film.

摘要翻译： 半导体器件设置有形成在半导体衬底上的绝缘膜中的导体线和熔丝，在绝缘膜上方形成的第一焊盘下绝缘膜，形成在绝缘膜上的第二焊盘下绝缘膜 第一下焊丝线绝缘膜，形成在导电线上方的区域中的焊盘，位于第一和第二焊盘下绝缘膜中的开口，以及通过留下第一下焊丝线绝缘的一部分而形成的开口 在第一和第二下焊丝线绝缘膜中的熔丝线上方的区域中的第二底焊丝线绝缘膜，其中第二焊盘下绝缘膜包括与第一焊盘下绝缘膜不同的元件。

公开(公告)号：US07232763B2

公开(公告)日：2007-06-19

申请号：US10959501

申请日：2004-10-07

申请人： Mitsuhiro Omura ,  Makiko Katano ,  Shoko Ito ,  Takaya Matsushita ,  Hisashi Kaneko

发明人： Mitsuhiro Omura ,  Makiko Katano ,  Shoko Ito ,  Takaya Matsushita ,  Hisashi Kaneko

IPC分类号： H01L21/311

CPC分类号： H01L21/76838 ,  H01L21/02046 ,  H01L21/31116

摘要： A method of manufacturing a semiconductor device includes subjecting a semiconductor wafer, which includes a copper layer formed above a semiconductor substrate and covered with an insulating film, to a dry etching using a fluorocarbon gas to partially remove the insulating film, thereby at least partially exposing a surface of the copper layer. The copper layer, the surface of which is at least partially exposed is subjected to a nitrogen plasma treatment. The semiconductor wafer having the nitrogen plasma-treated copper layer is exposed to atmosphere, and then the semiconductor wafer is subjected to a surface treatment.

摘要翻译： 一种制造半导体器件的方法包括使用碳氟化合物气体对包含形成在半导体衬底之上并被绝缘膜形成的铜层的半导体晶片进行干蚀刻，以部分地去除绝缘膜，从而至少部分曝光 铜层的表面。 将其表面至少部分暴露的铜层进行氮等离子体处理。 将具有氮等离子体处理的铜层的半导体晶片暴露于大气中，然后对半导体晶片进行表面处理。

公开(公告)号：US08513134B2

公开(公告)日：2013-08-20

申请号：US13013380

申请日：2011-01-25

申请人： Mitsuhiro Omura ,  Yumi Ohno ,  Takaya Matsushita ,  Tokuhisa Ohiwa

发明人： Mitsuhiro Omura ,  Yumi Ohno ,  Takaya Matsushita ,  Tokuhisa Ohiwa

IPC分类号： H01L21/302

CPC分类号： H01L21/31116 ,  H01L21/0273 ,  H01L21/31144 ,  H01L21/32139

摘要： In a semiconductor device producing method according to one embodiment, an insulating film containing silicon is formed on a semiconductor substrate, a resist is deposited on the insulating film, the resist is patterned into a predetermined pattern, and the insulating film is processed by a dry etching treatment in which gas containing C, F, Br, H, and O is used with the resist having the predetermined pattern as a mask. A deposited film in which C and Br are coupled is produced on the resist.

摘要翻译： 在根据一个实施例的半导体器件制造方法中，在半导体衬底上形成含有硅的绝缘膜，在绝缘膜上沉积抗蚀剂，将抗蚀剂图案化成预定图案，并且通过干燥 蚀刻处理，其中使用含有C，F，Br，H和O的气体，其中具有预定图案的抗蚀剂作为掩模。 在抗蚀剂上制造其中C和Br连接的沉积膜。

公开(公告)号：US20110168205A1

公开(公告)日：2011-07-14

申请号：US12985652

申请日：2011-01-06

申请人： Shigeru TAHARA ,  Fumiko YAMASHITA ,  Eiichi NISHIMURA ,  Tokuhisa OHIWA ,  Takaya MATSUSHITA ,  Hiroshi TOMITA

发明人： Shigeru TAHARA ,  Fumiko YAMASHITA ,  Eiichi NISHIMURA ,  Tokuhisa OHIWA ,  Takaya MATSUSHITA ,  Hiroshi TOMITA

IPC分类号： B08B7/00 ,  C23F1/08

CPC分类号： H01L21/67028 ,  H01L21/02057

摘要： A substrate cleaning method performing cleaning of a surface of a substrate after a pattern on the substrate is formed by plasma etching, includes: a by-product removal process removing a by-product by exposing the substrate to an HF gas atmosphere; and a residual fluorine removal process removing fluorine remaining on the substrate by turning cleaning gas containing hydrogen gas and chemical compound gas containing carbon and hydrogen as constituent elements into plasma to act on the substrate.

摘要翻译： 通过等离子体蚀刻形成在基板上的图案之后进行基板表面的清洗的基板清洗方法，包括：通过将基板暴露于HF气体气氛中来除去副产物的副产物去除处理; 以及通过将含有氢气的含氢气和含有碳和氢的化合物气体作为构成元素的清洗气体转移到等离子体中，从而除去残留在基板上的氟的残留除氟过程。