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公开(公告)号：US10796778B2
公开(公告)日：2020-10-06
申请号：US16694043
申请日：2019-11-25
Applicant: Micron Technology, Inc.
Inventor： Han Zhao , Akira Goda , Krishna K. Parat , Aurelio Giancarlo Mauri , Haitao Liu , Toru Tanzawa , Shigekazu Yamada , Koji Sakui
Abstract: Some embodiments include apparatuses and methods having a memory cell string including memory cells located in different levels of the apparatus and a data line coupled to the memory cell string. The memory cell string includes a pillar body associated with the memory cells. At least one of such apparatus can include a module configured to store information in a memory cell among memory cells and/or to determine a value of information stored in a memory cell among memory cells. The module can also be configured to apply a voltage having a positive value to the data line and/or a source to control a potential of the body. Other embodiments are described.
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公开(公告)号：US09881686B2
公开(公告)日：2018-01-30
申请号：US15393719
申请日：2016-12-29
Applicant: Micron Technology, Inc.
Inventor： Han Zhao , Akira Goda , Krishna K. Parat , Aurelio Giancarlo Mauri , Haitao Liu , Toru Tanzawa , Shigekazu Yamada , Koji Sakui
CPC classification number: G11C16/3459 , G11C8/08 , G11C16/0483 , G11C16/06 , G11C16/08 , G11C16/16 , G11C16/26 , G11C16/32 , G11C16/3445 , G11C2213/71
Abstract: Some embodiments include apparatuses and methods having a memory cell string including memory cells located in different levels of the apparatus and a data line coupled to the memory cell string. The memory cell string includes a pillar body associated with the memory cells. At least one of such apparatus can include a module configured to store information in a memory cell among memory cells and/or to determine a value of information stored in a memory cell among memory cells. The module can also be configured to apply a voltage having a positive value to the data line and/or a source to control a potential of the body. Other embodiments are described.
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公开(公告)号：US20170110198A1
公开(公告)日：2017-04-20
申请号：US15393719
申请日：2016-12-29
Applicant: Micron Technology, Inc.
Inventor： Han Zhao , Akira Goda , Krishna K. Parat , Aurelio Giancarlo Mauri , Haitao Liu , Toru Tanzawa , Shigekazu Yamada , Koji Sakui
CPC classification number: G11C16/3459 , G11C8/08 , G11C16/0483 , G11C16/06 , G11C16/08 , G11C16/16 , G11C16/26 , G11C16/32 , G11C16/3445 , G11C2213/71
Abstract: Some embodiments include apparatuses and methods having a memory cell string including memory cells located in different levels of the apparatus and a data line coupled to the memory cell string. The memory cell string includes a pillar body associated with the memory cells. At least one of such apparatus can include a module configured to store information in a memory cell among memory cells and/or to determine a value of information stored in a memory cell among memory cells. The module can also be configured to apply a voltage having a positive value to the data line and/or a source to control a potential of the body. Other embodiments are described.
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14.发明授权Apparatuses and methods comprising a channel region having different minority carrier lifetimes 有权装置和方法包括具有不同少数载体寿命的通道区域公开(公告)号：US09190472B2
公开(公告)日：2015-11-17
申请号：US14293854
申请日：2014-06-02
Applicant: Micron Technology, Inc.
Inventor： Paolo Tessariol , Aurelio Giancarlo Mauri , Akira Goda , Yijie Zhao
IPC: H01L27/108 , H01L29/10 , H01L27/115
CPC classification number: H01L29/1054 , H01L27/11519 , H01L27/11524 , H01L27/11556 , H01L27/11565 , H01L27/1157 , H01L27/11582
Abstract: Apparatuses, such as memory devices, memory cell strings, and electronic systems, and methods of forming such apparatuses are shown. One such apparatus includes a channel region that has a minority carrier lifetime that is lower at one or more end portions, than in a middle portion. Other apparatuses and methods are also disclosed.
Abstract translation: 示出了诸如存储器件，存储器单元串和电子系统的装置以及形成这种装置的方法。 一种这样的装置包括在一个或多个端部处具有比在中间部分中具有较低的少数载流子寿命的沟道区域。 还公开了其它装置和方法。
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15.发明申请APPARATUSES AND METHODS COMPRISING A CHANNEL REGION HAVING DIFFERENT MINORITY CARRIER LIFETIMES 有权包含不同少数携带者生存的频道区域的装置和方法公开(公告)号：US20140264447A1
公开(公告)日：2014-09-18
申请号：US14293854
申请日：2014-06-02
Applicant: Micron Technology, Inc.
Inventor： Paolo Tessariol , Aurelio Giancarlo Mauri , Akira Goda , Yijie Zhao
IPC: H01L29/10 , H01L27/115
CPC classification number: H01L29/1054 , H01L27/11519 , H01L27/11524 , H01L27/11556 , H01L27/11565 , H01L27/1157 , H01L27/11582
Abstract: Apparatuses, such as memory devices, memory cell strings, and electronic systems, and methods of forming such apparatuses are shown. One such apparatus includes a channel region that has a minority carrier lifetime that is lower at one or more end portions, than in a middle portion. Other apparatuses and methods are also disclosed.
Abstract translation: 示出了诸如存储器件，存储器单元串和电子系统的装置以及形成这种装置的方法。 一种这样的装置包括在一个或多个端部处具有比在中间部分中具有较低的少数载流子寿命的沟道区域。 还公开了其它装置和方法。
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Patent Agency Ranking
公开(公告)号：US12279434B2
公开(公告)日：2025-04-15
申请号：US17662982
申请日：2022-05-11
Applicant: Micron Technology, Inc.
Inventor： Albert Fayrushin , Kamal Karda , Gianpietro Carnevale , Aurelio Giancarlo Mauri
Abstract: Methods, systems, and devices for NAND structures with polarized materials are described. A memory device may include a polarized dielectric material located relatively near to a channel, which may reduce interference between cells. The polarized dielectric material may include a dielectric material with a fixed polarity and having a first surface with a negative polarity oriented towards the channel. The negative polarity of the polarized dielectric material may affect an electron distribution of the channel by shifting the electron distribution closer to an associated charge trapping material. The shifted electron distribution may reduce an effect of an electric field of any aggressor cells of the memory device on one or more victim cells, by creating a more uniform channel electron distribution and increasing gate control relative to a channel without the effects of the polarized dielectric material.
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17.发明申请公开(公告)号：US20200234781A1
公开(公告)日：2020-07-23
申请号：US16694043
申请日：2019-11-25
Applicant: Micron Technology, Inc.
Inventor： Han Zhao , Akira Goda , Krishna K. Parat , Aurelio Giancarlo Mauri , Haitao Liu , Toru Tanzawa , Shigekazu Yamada , Koji Sakui
Abstract: Some embodiments include apparatuses and methods having a memory cell string including memory cells located in different levels of the apparatus and a data line coupled to the memory cell string. The memory cell string includes a pillar body associated with the memory cells. At least one of such apparatus can include a module configured to store information in a memory cell among memory cells and/or to determine a value of information stored in a memory cell among memory cells. The module can also be configured to apply a voltage having a positive value to the data line and/or a source to control a potential of the body. Other embodiments are described.
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公开(公告)号：US10170196B2
公开(公告)日：2019-01-01
申请号：US15849267
申请日：2017-12-20
Applicant: Micron Technology, Inc.
Inventor： Han Zhao , Akira Goda , Krishna K. Parat , Aurelio Giancarlo Mauri , Haitao Liu , Toru Tanzawa , Shigekazu Yamada , Koji Sakui
Abstract: Some embodiments include apparatuses and methods having a memory cell string including memory cells located in different levels of the apparatus and a data line coupled to the memory cell string. The memory cell string includes a pillar body associated with the memory cells. At least one of such apparatus can include a module configured to store information in a memory cell among memory cells and/or to determine a value of information stored in a memory cell among memory cells. The module can also be configured to apply a voltage having a positive value to the data line and/or a source to control a potential of the body. Other embodiments are described.
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19.发明申请公开(公告)号：US20180114581A1
公开(公告)日：2018-04-26
申请号：US15849267
申请日：2017-12-20
Applicant: Micron Technology, Inc.
Inventor： Han Zhao , Akira Goda , Krishna K. Parat , Aurelio Giancarlo Mauri , Haitao Liu , Toru Tanzawa , Shigekazu Yamada , Koji Sakui
CPC classification number: G11C16/3459 , G11C8/08 , G11C16/0483 , G11C16/06 , G11C16/08 , G11C16/16 , G11C16/26 , G11C16/32 , G11C16/3445 , G11C2213/71
Abstract: Some embodiments include apparatuses and methods having a memory cell string including memory cells located in different levels of the apparatus and a data line coupled to the memory cell string. The memory cell string includes a pillar body associated with the memory cells. At least one of such apparatus can include a module configured to store information in a memory cell among memory cells and/or to determine a value of information stored in a memory cell among memory cells. The module can also be configured to apply a voltage having a positive value to the data line and/or a source to control a potential of the body. Other embodiments are described.
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公开(公告)号：US20140203344A1
公开(公告)日：2014-07-24
申请号：US13748747
申请日：2013-01-24
Applicant: MICRON TECHNOLOGY, INC.
Inventor： John Hopkins , Darwin Franseda Fan , Fatma Arzum Simsek-Ege , James Brighten , Aurelio Giancarlo Mauri , Srikant Jayanti
IPC: H01L29/423 , H01L29/40
CPC classification number: H01L29/7887 , H01L21/28035 , H01L21/28273 , H01L21/28282 , H01L27/11524 , H01L27/11556 , H01L27/11582 , H01L29/401 , H01L29/42324 , H01L29/518 , H01L29/66825 , H01L29/7827 , H01L29/7881 , H01L29/7889
Abstract: Three-dimensional memory cells and methods of making and using the memory cells are discussed generally herein. In one or more embodiments, a three-dimensional vertical memory can include a memory stack. Such a memory stack can include memory cells and a dielectric between adjacent memory cells, each memory cell including a control gate and a charge storage structure. The memory cell can further include a barrier material between the charge storage structure and the control gate, the charge storage structure and the barrier material having a substantially equal dimension.
Abstract translation: 三维存储器单元以及制造和使用存储器单元的方法一般在此讨论。 在一个或多个实施例中，三维垂直存储器可以包括存储器堆栈。 这样的存储器堆可以包括存储器单元和相邻存储单元之间的电介质，每个存储单元包括控制栅极和电荷存储结构。 存储单元还可以包括电荷存储结构和控制栅极之间的阻挡材料，电荷存储结构和阻挡材料具有基本相等的尺寸。
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