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公开(公告)号:US11487441B2
公开(公告)日:2022-11-01
申请号:US16862129
申请日:2020-04-29
Applicant: Macronix International Co., Ltd.
Inventor: Chin-Hung Chang , Chia-Feng Cheng
Abstract: Systems, methods, circuits, devices, and apparatus including computer-readable mediums for managing tamper detections in secure memory devices. In one aspect, a secure memory device includes: a memory cell array, one or more tamper detectors each configured to detect a respective type of tamper event on at least part of the secure memory device, and a tamper detection status register storing one or more values each indicating a tamper detection status detected by a corresponding tamper detector. The secure memory device can include a command interface coupled to the tamper detection status register and configured to output the values stored in the tamper detection status register when receiving a trigger. The secure memory device can also include an output pin coupled to the tamper detection status register and be configured to automatically output the values stored in the tamper detection status register via the output pin.
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公开(公告)号:US10379926B2
公开(公告)日:2019-08-13
申请号:US14596768
申请日:2015-01-14
Applicant: Macronix International Co., Ltd.
Inventor: Kuen Long Chang , Ken Hui Chen , Su Chueh Lo , Chia-Feng Cheng
Abstract: A method for monitoring data error status of a memory device includes generating, by a memory controller, a data status indication code indicating error status of a data chunk transmitted by the memory controller and outputting, by the memory controller, the data status indication code to a user interface.
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公开(公告)号:US09678829B2
公开(公告)日:2017-06-13
申请号:US15185066
申请日:2016-06-17
Applicant: MACRONIX INTERNATIONAL CO., LTD.
Inventor: Chin-Hung Chang , Chia-Feng Cheng , Yu-Chen Wang , Ken-Hui Chen , Kuen-Long Chang
CPC classification number: G06F11/1044 , G06F11/1068 , G06F11/1076 , G06F2212/403 , G11C11/5635 , G11C16/00 , G11C16/14 , G11C16/16 , G11C16/3404 , G11C29/42
Abstract: An erasing method of a memory device is provided. The memory device includes a memory controller and a memory array having a first memory region and a second memory region. The first memory region and the second memory region share the same well. The erasing method comprising steps of: erasing the first memory region; and selectively programming the second memory region according to an error correction code algorithm.
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公开(公告)号:US09208842B2
公开(公告)日:2015-12-08
申请号:US14162854
申请日:2014-01-24
Applicant: Macronix International Co., Ltd.
Inventor: Chun-Hsiung Hung , Nai-Ping Kuo , Ken-Hui Chen , Kuen-Long Chang , Yu-Chen Wang , Chin-Hung Chang , Chia-Feng Cheng , Min-Hsiung Meng
CPC classification number: G11C8/18 , G11C16/3418 , G11C16/349 , G11C29/50004 , G11C29/50016 , G11C2029/0409
Abstract: A method and a system for operating a memory are provided. The memory includes a plurality of memory cells which are configured to store data. The method includes the following steps. A counting number recorded in a counter is counted by 1, if the memory is written. The memory is set as a frequently using device, if the counting number recoded in the counter reaches a predetermined value.
Abstract translation: 提供了一种用于操作存储器的方法和系统。 存储器包括被配置为存储数据的多个存储单元。 该方法包括以下步骤。 如果存储器被写入,计数器中记录的计数器被计数1。 如果在计数器中重新编码的计数号达到预定值,则将存储器设置为频繁使用的设备。
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