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    Memory management based on usage specifications
    11.
    发明授权
    Memory management based on usage specifications 有权
    基于使用规范的内存管理

    公开(公告)号：US09513815B2

    公开(公告)日：2016-12-06

    申请号：US14523006

    申请日：2014-10-24

    Applicant: Macronix International Co., Ltd.

    Inventor： Ping-Chun Chang ,  Yuan-Hao Chang ,  Hung-Sheng Chang ,  Tei-Wei Kuo ,  Hsiang-Pang Li

    IPC: G06F12/02 ,  G06F3/06

    CPC classification number: G06F3/061 ,  G06F3/064 ,  G06F3/0644 ,  G06F3/0679 ,  G06F12/023 ,  G06F12/0238 ,  G06F12/0292 ,  G06F2212/1024 ,  G06F2212/202 ,  G06F2212/214 ,  G06F2212/7201

    Abstract: A method is provided for managing a memory device including a plurality of physical memory segments. A logical memory space is classified into a plurality of classifications based on usage specifications. The plurality of physical memory segments is allocated to corresponding logical addresses based on the plurality of classifications, and on usage statistics of the physical memory segments. A data structure is maintained recording translation between logical addresses in the logical memory space and physical addresses of the physical memory segments. The plurality of classifications includes a first classification and a second classification having different usage statistic requirements than the first classification. Logical addresses having the second classification can be redirected to physical segments allocated to logical addresses having the first classification, and the data structure can be updated to record redirected logical addresses. A free command can release a physical memory segment allocated for main memory use.

    Abstract translation: 提供了一种用于管理包括多个物理存储器段的存储器件的方法。 逻辑存储器空间根据使用规范被分类为多个分类。 基于多个分类，以及物理存储器段的使用统计，将多个物理存储器段分配给相应的逻辑地址。 数据结构保持在逻辑存储器空间中的逻辑地址和物理存储器段的物理地址之间进行记录转换。 多个分类包括与第一分类不同的使用统计要求的第一分类和第二分类。 具有第二分类的逻辑地址可以被重定向到分配给具有第一分类的逻辑地址的物理段，并且可以更新数据结构以记录重定向的逻辑地址。 免费命令可以释放分配给主内存使用的物理内存段。

    MEMORY ORPRATING METHOD AND MEMORY DEVICE USING THE SAME
    12.
    发明申请
    MEMORY ORPRATING METHOD AND MEMORY DEVICE USING THE SAME 有权
    使用该存储器的记录方法和存储器件

    公开(公告)号：US20160147464A1

    公开(公告)日：2016-05-26

    申请号：US14805498

    申请日：2015-07-22

    Applicant: MACRONIX INTERNATIONAL CO., LTD.

    Inventor： Yu-Ming Chang ,  Yung-Chun Li ,  Hsiang-Pang Li ,  Yuan-Hao Chang ,  Tei-Wei Kuo

    IPC: G06F3/06

    CPC classification number: G06F12/00 ,  G06F12/0246 ,  G06F2212/7202 ,  G06F2212/7209 ,  G11C11/5628 ,  G11C16/0483 ,  G11C16/10 ,  G11C2211/5641 ,  G11C2211/5648

    Abstract: An operating method for a memory, the memory comprising at least one memory block including a plurality of first pages and a plurality of second pages corresponding to the first pages, the operating method including the following steps: determining whether a target first page of the first pages is valid, wherein the target first page is corresponding to a target second page of the second pages; if the target first page is valid, performing first type programming on the target second page; if the target first page is invalid, performing second type programming on the target second page.

    Abstract translation: 一种用于存储器的操作方法，所述存储器包括至少一个存储块，所述至少一个存储块包括与所述第一页对应的多个第一页和多个第二页，所述操作方法包括以下步骤：确定所述第一页的目标第一页 页面是有效的，其中目标第一页面对应于第二页面的目标第二页面; 如果目标第一页有效，则在目标第二页上执行第一类型编程; 如果目标第一页无效，则在目标第二页上执行第二类型编程。

    Memory device and operating method thereof
    13.
    发明授权
    Memory device and operating method thereof 有权

    公开(公告)号：US11966628B2

    公开(公告)日：2024-04-23

    申请号：US17830471

    申请日：2022-06-02

    Applicant: MACRONIX INTERNATIONAL CO., LTD.

    Inventor： Wei-Chen Wang ,  Han-Wen Hu ,  Yung-Chun Li ,  Huai-Mu Wang ,  Chien-Chung Ho ,  Yuan-Hao Chang ,  Tei-Wei Kuo

    IPC: G06F3/06

    CPC classification number: G06F3/0655 ,  G06F3/0604 ,  G06F3/0673

    Abstract: A memory device, includes a memory array for storing a plurality of vector data each of which has an MSB vector and a LSB vector. The memory array includes a plurality of memory units each of which has a first bit and a second bit. The first bit is used to store the MSB vector of each vector data, the second bit is used to store the LSB vector of each vector data. A bit line corresponding to each vector data executes one time of bit-line-setup, and reads the MSB vector and the LSB vector of each vector data according to the bit line. The threshold voltage distribution of each memory unit is divided into N states, where N is a positive integer and N is less than 2 to the power of 2, and the effective bit number stored by each memory unit is less than 2.

    MEMORY MANAGEMENT APPARATUS AND MEMORY MANAGEMENT METHOD
    15.
    发明申请
    MEMORY MANAGEMENT APPARATUS AND MEMORY MANAGEMENT METHOD 审中-公开

    公开(公告)号：US20200319803A1

    公开(公告)日：2020-10-08

    申请号：US16742811

    申请日：2020-01-14

    Applicant: MACRONIX International Co., Ltd.

    Inventor： Wei-Chen Wang ,  Ping-Hsien Lin ,  Tse-Yuan Wang ,  Yuan-Hao Chang ,  Tei-Wei Kuo

    IPC: G06F3/06 ,  G06F16/901 ,  G06F12/10

    Abstract: A memory management method includes: performing a bloom filtering operation on a plurality of logic block addresses to determine a read and written frequency of each of the logic block addresses; setting a first program/erase (P/E) cycle threshold and a second P/E cycle threshold value, wherein the first P/E cycle threshold value is smaller than the second P/E cycle threshold value; dividing each of physical memory blocks into a first type memory block, a second type memory block or a third type memory block according to the first P/E cycle threshold value and the second P/E cycle threshold value; and, allocating each of the logic block addresses to the first type memory block, the second type memory block or the third type memory block according to the read and written frequency of corresponding logic block addresses.

    Memory system and memory management method thereof
    16.
    发明授权
    Memory system and memory management method thereof 有权

    公开(公告)号：US10108555B2

    公开(公告)日：2018-10-23

    申请号：US15370059

    申请日：2016-12-06

    Applicant: MACRONIX INTERNATIONAL CO., LTD.

    Inventor： Yu-Ming Chang ,  Yuan-Hao Chang ,  Hsiu-Chang Chen ,  Tei-Wei Kuo

    IPC: G06F12/02 ,  G06F12/121 ,  G06F12/00 ,  G06F12/06 ,  G06F12/1009

    Abstract: A memory management method includes: providing a hybrid memory comprising a first type memory and a second type memory; providing an inactive list and a read active list for recording in-used pages on the first type memory; providing a write active list for recording in-used pages on the second type memory; allocating a page from the first type memory according to a system request, and inserting the page into the inactive list accordingly; moving the page from the inactive list to the write active list or the read active list in response to two or more successive access operations on the page; and referring the page to a physical address on the second type memory when the page is in the write active list.

    Half block management for flash storage devices
    20.
    发明授权
    Half block management for flash storage devices 有权
    闪存存储设备的半块管理

    公开(公告)号：US09558108B2

    公开(公告)日：2017-01-31

    申请号：US14018149

    申请日：2013-09-04

    Applicant: MACRONIX INTERNATIONAL CO., LTD.

    Inventor： Yu-Ming Chang ,  Yung-Chun Li ,  Hsing-Chen Lu ,  Hsiang-Pang Li ,  Cheng-Yuan Wang ,  Yuan-Hao Chang ,  Tei-Wei Kuo

    IPC: G06F12/00 ,  G06F12/02 ,  G11C16/34 ,  G11C16/04 ,  G11C16/16

    CPC classification number: G06F12/0246 ,  G06F2212/7205 ,  G11C16/0483 ,  G11C16/16 ,  G11C16/3427

    Abstract: A method for managing block erase operations is provided for an array of memory cells including erasable blocks of memory cells in the array. The method comprises maintaining status data for a plurality of sub-blocks of the erasable blocks of the array. The status data indicate whether the sub-blocks are currently accessible and whether the sub-blocks are invalid. The method comprises, in response to a request to erase a selected sub-block of a particular erasable block, issuing an erase command to erase the particular block if the other sub-blocks of the particular erasable block are invalid, else updating the status data to indicate that the selected sub-block is invalid.

    Abstract translation: 提供了一种用于管理块擦除操作的方法，用于包括阵列中的可擦除存储单元块的存储单元阵列。 该方法包括维护阵列的可擦除块的多个子块的状态数据。 状态数据指示子块当前是否可访问以及子块是否无效。 该方法响应于擦除特定可擦除块的所选子块的请求，如果特定可擦除块的其他子块无效则发出擦除命令以擦除特定块，否则更新状态数据 以指示所选择的子块是无效的。

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