公开(公告)号：US10756040B2

公开(公告)日：2020-08-25

申请号：US15881063

申请日：2018-01-26

Applicant: MEDIATEK INC.

Inventor： Ta-Jen Yu ,  Chi-Yuan Chen ,  Wen-Sung Hsu

IPC: H01L23/485 ,  H01L23/488 ,  H01L23/525 ,  H01L29/40 ,  H01L23/48 ,  H01L23/498 ,  H01L23/02 ,  H01L23/04 ,  H01L23/12 ,  H01L23/00 ,  H01L23/31

Abstract: The invention provides a semiconductor package. The semiconductor package includes a semiconductor die and a conductive pillar bump structure and a conductive plug. The semiconductor die has a die pad thereon. The conductive pillar bump structure is positioned overlying the die pad. The conductive pillar bump structure includes an under bump metallurgy (UBM) stack having a first diameter and a conductive plug on the UBM stack. The conductive plug has a second diameter that is different than the first diameter.

公开(公告)号：US20240243046A1

公开(公告)日：2024-07-18

申请号：US18402667

申请日：2024-01-02

Applicant: MEDIATEK INC.

Inventor： Chun-Yin Lin ,  Tai-Yu Chen ,  Li-Song Lin ,  Chi-Yuan Chen

IPC: H01L23/498 ,  H01L23/00 ,  H01L23/373

CPC classification number: H01L23/49816 ,  H01L23/3735 ,  H01L23/49822 ,  H01L24/08 ,  H01L24/16 ,  H01L2224/08145 ,  H01L2224/08225 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/15311 ,  H01L2924/18161 ,  H01L2924/351

Abstract: A flip chip ball grid array package includes a package substrate and a flip chip device mounted on a top surface of the package substrate. The flip chip device includes a semiconductor integrated circuit die; an epoxy molding compound encapsulating vertical sidewalls of the semiconductor integrated circuit die; a re-distribution layer structure disposed on an active surface of the semiconductor integrated circuit die and on a lower surface of the epoxy molding compound; a sintered nanosilver layer disposed on a passive rear surface of the semiconductor integrated circuit die and on an upper surface of the epoxy molding compound; and a stiffener ring mounted around the flip chip device on the package substrate.

公开(公告)号：US20230307849A1

公开(公告)日：2023-09-28

申请号：US18113606

申请日：2023-02-23

Applicant: MEDIATEK INC.

Inventor： Ya-Jui Hsieh ,  Chi-Yuan Chen ,  Shih-Chao Chiu ,  Yao-Pang Hsu

IPC: H01Q21/08 ,  H01Q9/04 ,  H01L25/16

CPC classification number: H01Q21/08 ,  H01Q9/0407 ,  H01L25/16

Abstract: An antenna-in-module package-on-package includes an antenna package having a top surface and a bottom surface opposing the top surface. The antenna package includes a radiative antenna element on the bottom surface. A chip package is mounted on the top surface of the antenna package. The chip package includes a semiconductor chip. Conductive elements are disposed between the antenna package and the chip package to electrically interconnect the chip package and the antenna package. A radiative antenna element is disposed on the bottom surface of the antenna package. At least one air trench is disposed on the bottom surface of the antenna package.

公开(公告)号：US11705413B2

公开(公告)日：2023-07-18

申请号：US17549901

申请日：2021-12-14

Applicant: MEDIATEK INC.

Inventor： Chia-Hao Hsu ,  Tai-Yu Chen ,  Shiann-Tsong Tsai ,  Hsing-Chih Liu ,  Yao-Pang Hsu ,  Chi-Yuan Chen ,  Chung-Fa Lee

IPC: H01L27/14 ,  H01L23/66 ,  H01L23/367 ,  H01L23/373 ,  H01L23/498 ,  H01L23/00 ,  H01Q1/02 ,  H01Q1/22

CPC classification number: H01L23/66 ,  H01L23/3672 ,  H01L23/3733 ,  H01L23/49822 ,  H01L23/49838 ,  H01L24/16 ,  H01Q1/02 ,  H01Q1/2283 ,  H01L2223/6677 ,  H01L2224/16227 ,  H01L2924/0103 ,  H01L2924/014 ,  H01L2924/0105 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01051 ,  H01L2924/01083 ,  H01L2924/18161

Abstract: A semiconductor package including a base comprising an upper surface and a lower surface that is opposite to the upper surface; a radio-frequency (RF) module embedded near the upper surface of the base; an integrated circuit (IC) die mounted on the lower surface of the base in a flip-chip manner so that a backside of the IC die is available for heat dissipation; a plurality of conductive structures disposed on the lower surface of the base and arranged around the IC die; and a metal thermal interface layer comprising a backside metal layer that is in contact with the backside of the IC die, and a solder paste conformally printed on the backside metal layer.

公开(公告)号：US20220130734A1

公开(公告)日：2022-04-28

申请号：US17493853

申请日：2021-10-05

Applicant: MEDIATEK INC.

Inventor： Shih-Chao Chiu ,  Chi-Yuan Chen ,  Wen-Sung Hsu ,  Ya-Jui Hsieh ,  Yao-Pang Hsu ,  Wen-Chun Huang

IPC: H01L23/31 ,  H01L23/40 ,  H05K5/02 ,  H05K5/00 ,  H01L23/473

Abstract: A semiconductor package includes a substrate having a top surface and a bottom surface; a semiconductor die mounted on the top surface of the substrate; and a two-part lid mounted on a perimeter of the top surface of the substrate and housing the semiconductor die. The lid comprises an annular lid base and a cover plate removably installed on the annular lid base. The semiconductor package can be uncovered by removing the cover plate and a forced cooling module can be installed in place of the cover plate.