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公开(公告)号：US20210335445A1
公开(公告)日：2021-10-28
申请号：US17368651
申请日：2021-07-06
Applicant: Micron Technology, Inc.
Inventor： Samuel E. Bradshaw , Justin Eno
Abstract: Exemplary methods, apparatuses, and systems include determining that data in a group of memory cells of a first memory device is to be moved to a spare group of memory cells. The group of memory cells spans a first dimension and a second dimension that is orthogonal to the first dimension and the spare group of memory cells also spans the first dimension and the second dimension. The data is read from the group of memory cells along the first dimension of the group of memory cells. The data is written to the spare group of memory cells along the second dimension of the spare group of memory cells.
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公开(公告)号：US10950318B2
公开(公告)日：2021-03-16
申请号：US16442430
申请日：2019-06-14
Applicant: Micron Technology, Inc.
Inventor： Jeffrey L. McVay , Samuel E. Bradshaw , Justin Eno
Abstract: Exemplary methods, apparatuses, and systems include a controller to manage memory proximity disturb. The controller identifies a first memory location in response to an access of a second memory location, the first memory location storing a first value. The controller updates a first disturb value by a first amount, the first disturb value representing a cumulative disturb effect on the first value in the first memory location by accesses to a first plurality of memory locations proximate to the first memory location, the first plurality of memory locations including the second memory location.
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公开(公告)号：US10468112B1
公开(公告)日：2019-11-05
申请号：US16101263
申请日：2018-08-10
Applicant: Micron Technology, Inc.
Inventor： Justin Eno
Abstract: A first bit of an aggressor codeword is written to a first memory cell, wherein the write to the first memory cell disturbs a set of one or more victim codewords by contributing to a cumulative effect that can change a value of a victim codeword in the set based on proximity to the first memory cell. A second bit of the aggressor codeword is written to a second memory cell, wherein the write to the second memory cell disturbs at most the one or more victim codewords of the set by contributing to the cumulative effect based on proximity to the second memory cell. The second memory cell is separated from the first memory cell by at least a third memory cell, wherein the third memory cell stores a first bit of a second codeword.
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公开(公告)号：US12073110B2
公开(公告)日：2024-08-27
申请号：US17931262
申请日：2022-09-12
Applicant: MICRON TECHNOLOGY, INC.
Inventor： Justin Eno , Sean S. Eilert , Ameen D. Akel , Kenneth M. Curewitz
IPC: G06F12/00 , C12Q1/6869 , G06F3/06
CPC classification number: G06F3/0655 , C12Q1/6869 , G06F3/0604 , G06F3/0673
Abstract: A memory device may be used to implement a Bloom filter. In some examples, the memory device may include a memory array to perform a multiply-accumulate operation to implement the Bloom filter. The memory device may store multiple portions of a reference genetic sequence in the memory array and compare the portions of the reference genetic sequence to a read sequence in parallel by performing the multiply-accumulate operation. The results of the multiply-accumulate operation between the read sequence and the portions of the reference genetic sequence may be used to determine where the read sequence aligns to the reference sequence.
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公开(公告)号：US20240087643A1
公开(公告)日：2024-03-14
申请号：US17931277
申请日：2022-09-12
Applicant: MICRON TECHNOLOGY, INC.
Inventor： Justin Eno , Sean S. Eilert , Ameen D. Akel , Kenneth M. Curewitz
IPC: G11C13/00 , C12Q1/6869 , G11C7/16 , G16B30/10
CPC classification number: G11C13/0069 , C12Q1/6869 , G11C7/16 , G11C13/004 , G16B30/10
Abstract: A memory device may be used to implement a Bloom filter. In some examples, the memory device may include a memory array to perform a multiply-accumulate operation to implement the Bloom filter. The memory device may store multiple portions of a reference genetic sequence in the memory array and compare the portions of the reference genetic sequence to a read sequence in parallel by performing the multiply-accumulate operation. The results of the multiply-accumulate operation between the read sequence and the portions of the reference genetic sequence may be used to determine where the read sequence aligns to the reference sequence.
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Patent Agency Ranking
公开(公告)号：US11768764B2
公开(公告)日：2023-09-26
申请号：US17018636
申请日：2020-09-11
Applicant: Micron Technology, Inc.
Inventor： Samuel E. Bradshaw , Justin Eno
IPC: G06F12/02 , G06F3/06 , G06F12/1009
CPC classification number: G06F12/0246 , G06F3/0616 , G06F3/0647 , G06F3/0679 , G06F12/1009 , G06F2212/7201 , G06F2212/7211
Abstract: A wear-leveling process for a memory subsystem selects a source chunk to be removed from a usable address space of the memory subsystem to distribute wear across all available chunks in the memory subsystem. The memory subsystem has a plurality of non-volatile memory components. The plurality of non-volatile memory components includes a plurality of chunks including at least one chunk in an unusable address space of the memory subsystem. The wear-leveling process copies valid data of the source chunk to a destination chunk in the unusable address space of the memory subsystem and assigns the destination chunk to a location in the usable address space of the memory subsystem occupied by the source chunk.
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公开(公告)号：US11664085B2
公开(公告)日：2023-05-30
申请号：US17368651
申请日：2021-07-06
Applicant: Micron Technology, Inc.
Inventor： Samuel E. Bradshaw , Justin Eno
CPC classification number: G11C29/70 , G06F11/1612 , G11C13/0004 , G11C13/004 , G11C13/0069 , G11C29/52 , G11C29/72 , G11C29/883
Abstract: Exemplary methods, apparatuses, and systems include determining that data in a group of memory cells of a first memory device is to be moved to a spare group of memory cells. The group of memory cells spans a first dimension and a second dimension that is orthogonal to the first dimension and the spare group of memory cells also spans the first dimension and the second dimension. The data is read from the group of memory cells along the first dimension of the group of memory cells. The data is written to the spare group of memory cells along the second dimension of the spare group of memory cells.
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公开(公告)号：US20230065783A1
公开(公告)日：2023-03-02
申请号：US17647944
申请日：2022-01-13
Applicant: Micron Technology, Inc.
Inventor： Sean S. Eilert , Ameen D. Akel , Justin Eno , Brian Hirano
IPC: G06F3/06
Abstract: Methods, systems, and devices for in-memory associative processing for vectors are described. A device may perform a computational operation on a first set of contiguous bits of a first vector and a first set of contiguous bits of a second vector. The first sets of contiguous bits may be stored in a first plane of a memory die and the computational operation may be based on a truth table for the computational operation. The device may perform a second computational operation on a second set of contiguous bits of the first vector and a second set of contiguous bits of the second vector. The second sets of contiguous bits may be stored in a second plane of the memory die and the computational operation based on the truth table for the computational operation.
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公开(公告)号：US11455242B2
公开(公告)日：2022-09-27
申请号：US17062344
申请日：2020-10-02
Applicant: Micron Technology, Inc.
Inventor： Justin Eno , Samuel E. Bradshaw
Abstract: A process for wear-leveling in a memory subsystem where references to invalidated chunks and a write count for each of the invalidated chunks of a memory subsystem are received by a wear-leveling manager. The wear-leveling manager orders the received references to the invalidated chunks of the memory subsystem in a tracking structure based on the write count of each of the invalidated chunks, and provides a reference to at least one of the invalidated chunks based on the ordering from the tracking structure to a write scheduler to service a write request, wherein the memory subsystem is wear-leveled by biasing the order of the invalidated chunks to prioritize low write count chunks.
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公开(公告)号：US11087859B2
公开(公告)日：2021-08-10
申请号：US16853226
申请日：2020-04-20
Applicant: Micron Technology, Inc.
Inventor： Samuel E. Bradshaw , Justin Eno
Abstract: Exemplary methods, apparatuses, and systems include determining that data in a group of memory cells of a first memory device is to be moved to a spare group of memory cells. The group of memory cells spans a first dimension and a second dimension that is orthogonal to the first dimension and the spare group of memory cells also spans the first dimension and the second dimension. The data is read from the group of memory cells along the first dimension of the group of memory cells. The data is written to the spare group of memory cells along the second dimension of the spare group of memory cells.
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