公开(公告)号：US07902904B2

公开(公告)日：2011-03-08

申请号：US12330828

申请日：2008-12-09

Applicant: Pankaj Kumar ,  Makeshwar Kothandaraman ,  Dipankar Bhattacharya ,  John Kriz ,  Jeffrey J. Nagy ,  Pramod Elamannu Parameswaran

Inventor： Pankaj Kumar ,  Makeshwar Kothandaraman ,  Dipankar Bhattacharya ,  John Kriz ,  Jeffrey J. Nagy ,  Pramod Elamannu Parameswaran

IPC: G05F1/10

CPC classification number: G05F3/16

Abstract: Disclosed is a bias circuit with a first resistor connected between the supply voltage and a feedback node. Resistors are connected in series between the feedback node and the reference supply voltage. The connections between the resistors define at least one bias voltage. A second resistor is connected between the feedback node and a first drain node. A first field-effect transistor has a first gate node, the first drain node, and a first source node. The gate node is connected to the first supply voltage. A second field-effect transistor has a second gate node, a second drain node, and a second source node. The second drain node is connected to the first source node. The second gate node is connected to the bias voltage. The second source node is connected to an output signal node. The output signal node capable of experiencing an overshoot voltage.

Abstract translation: 公开了一种偏置电路，其中第一电阻器连接在电源电压和反馈节点之间。 电阻器连接在反馈节点和参考电源电压之间。 电阻之间的连接限定了至少一个偏置电压。 第二电阻器连接在反馈节点和第一漏极节点之间。 第一场效应晶体管具有第一栅极节点，第一漏极节点和第一源节点。 门节点连接到第一电源电压。 第二场效应晶体管具有第二栅极节点，第二漏极节点和第二源节点。 第二排水节点连接到第一源节点。 第二栅极节点连接到偏置电压。 第二源节点连接到输出信号节点。 输出信号节点能够经历过冲电压。

公开(公告)号：US20060200645A1

公开(公告)日：2006-09-07

申请号：US11073784

申请日：2005-03-07

Applicant: Pankaj Kumar

Inventor： Pankaj Kumar

IPC: G06F15/00

CPC classification number: G06F8/36

Abstract: The present invention provides a method and apparatus for employing cloning for creating hierarchies of artifacts needed for development of software. The present invention also applies to managing cloning for the maintenance and modification of software artifacts including tracking and propagating the changes to the artifacts. In accordance with the present invention, cloning is applied to create new artifacts.

Abstract translation: 本发明提供了一种用于使用克隆来创建开发软件所需的伪像层次的方法和装置。 本发明还适用于管理用于维护和修改软件工件的克隆，包括跟踪和传播对工件的改变。 根据本发明，应用克隆来创建新的伪像。

公开(公告)号：US10682802B2

公开(公告)日：2020-06-16

申请号：US15314389

申请日：2014-05-29

Applicant: DISCMA AG ,  Frederick C. Beuerle ,  G. David Lisch, Jr. ,  Richard Steih ,  Semen Kharchenko ,  Pankaj Kumar

Inventor： Frederick C. Beuerle ,  G. David Lisch, Jr. ,  Richard Steih ,  Semen Kharchenko ,  Pankaj Kumar

IPC: B29C49/58 ,  B29C49/06 ,  B29C49/12 ,  B29C49/46

Abstract: An injection nozzle for cooling and providing counter pressure to a neck of a preform during a forming of a container from the preform. The injection nozzle includes a manifold that defines a receiving space into which the neck of the preform is received. A cavity is also defined in a part by an inner wall and an outer wall of the manifold and a plurality of ports are provided through the inner wall to communicate the cavity with the receiving space. When a cooling medium is received into the cavity, the cooling medium is directed through at least some of the ports toward the neck of the preform located within the receiving space.

公开(公告)号：US09074513B2

公开(公告)日：2015-07-07

申请号：US13352885

申请日：2012-01-18

Applicant: Imad Hassan Makki ,  Pankaj Kumar ,  James Michael Kerns ,  Hassene Jammoussi

Inventor： Imad Hassan Makki ,  Pankaj Kumar ,  James Michael Kerns ,  Hassene Jammoussi

IPC: G01N33/00 ,  F01N11/00 ,  F02D41/14 ,  F02D41/28

CPC classification number: F01N11/00 ,  F02D41/1441 ,  F02D41/1474 ,  F02D41/1495 ,  F02D2041/1431 ,  F02D2041/286

Abstract: A method for monitoring an exhaust gas sensor coupled in an engine exhaust is provided. In one embodiment, the method comprises indicating exhaust gas sensor degradation based on characteristics of a distribution of extreme values of a plurality of sets of lambda differentials collected during selected operating conditions. In this way, the exhaust gas sensor may be monitored in a non-intrusive manner.

Abstract translation: 提供一种用于监测联接在发动机排气中的废气传感器的方法。 在一个实施例中，该方法包括基于在选择的操作条件期间收集的多组λ差分的极值的分布的特性来指示废气传感器劣化。 以这种方式，废气传感器可以以非侵入的方式被监视。

公开(公告)号：US08943334B2

公开(公告)日：2015-01-27

申请号：US12889121

申请日：2010-09-23

Applicant: Pankaj Kumar ,  Hang Nguyen ,  Christopher Houghton ,  David A. Biermann

Inventor： Pankaj Kumar ,  Hang Nguyen ,  Christopher Houghton ,  David A. Biermann

IPC: G06F1/00 ,  G06F1/26 ,  G06F1/32

CPC classification number: G06F1/3296 ,  G05F1/46 ,  G06F1/26 ,  G06F1/3206 ,  G06F1/3228 ,  G06F1/324 ,  G06F9/3016 ,  Y02D10/126 ,  Y02D10/172

Abstract: In one embodiment, the present invention includes a processor having a plurality of cores and a control logic to control provision of a voltage/frequency to a first core of the plurality of cores independently of provision of a voltage/frequency to at least a second core of the plurality of cores. In some embodiments, the voltages may be provided from one or more internal voltage regulators of the processor. Other embodiments are described and claimed.

公开(公告)号：US08909862B2

公开(公告)日：2014-12-09

申请号：US12495676

申请日：2009-06-30

Applicant: Mark A. Yarch ,  Pankaj Kumar ,  Hang T. Nguyen

Inventor： Mark A. Yarch ,  Pankaj Kumar ,  Hang T. Nguyen

IPC: G06F12/08 ,  G06F11/16 ,  G06F11/20

CPC classification number: G06F11/1666 ,  G06F11/20 ,  G06F2201/82

Abstract: Methods and apparatus relating to processing out of order transactions for mirrored subsystems. A first device (that is mirroring data from a second device) includes a cache to track out of order write operations prior to writing data from the write operations to memory. A register may be used to track the state of the cache in response to receipt of a special transaction, which may be a posted transaction or snapshot. The first devise transmits an acknowledgement of commitment of the data to memory once all cache entries, as recorded at a select point by the register, are emptied or otherwise invalidated. Devices may communicate via a peripheral component interconnect express (PCIe) interconnect, and may include a point-to-point or serial link. Various components may be on the same integrated circuit die. An uninterrupted power supply or batteries may supply power in response to a power failure.

Abstract translation: 涉及处理镜像子系统的乱序事务的方法和装置。 第一设备（即来自第二设备的镜像数据）包括在从写入操作到存储器的数据写入之前跟踪故障写入操作的高速缓存。 可以使用寄存器来跟踪高速缓存的状态以响应特殊事务的接收，这可以是已发布的事务或快照。 一旦在寄存器的选择点处记录的所有缓存条目被清空或以其他方式被无效，则第一设备将数据承诺的确认传送到存储器。 设备可以通过外围组件互连快速（PCIe）互连进行通信，并且可以包括点到点或串行链路。 各种组件可以在相同的集成电路管芯上。 不间断的电源或电池可能会供电以响应电源故障。

公开(公告)号：US08803535B2

公开(公告)日：2014-08-12

申请号：US13171725

申请日：2011-06-29

Applicant: Makeshwar Kothandaraman ,  Pankaj Kumar ,  Pramod Parameswaran

Inventor： Makeshwar Kothandaraman ,  Pankaj Kumar ,  Pramod Parameswaran

IPC: G01R27/26 ,  H03F3/45

CPC classification number: H03F3/45475 ,  H03F2203/45594

Abstract: A comparison circuit for detecting impedance mismatch between pull-up and pull-down devices in a circuit to be monitored includes a comparator operative to receive first and second signals and to generate, as an output, a third signal indicative of a difference between the first and second signals. A first signal generator is operative to generate the first signal indicative of a difference between reference pull-up and pull-down currents that is scaled by a prescribed amount. The reference pull-up current is indicative of a current flowing through at least one corresponding pull-up transistor device in the circuit to be monitored. The pull-down reference current is indicative of a current flowing through at least one corresponding pull-down transistor device in the circuit to be monitored. A second signal generator connected with the second input of the comparator is operative to generate the second signal as a reference voltage defining a prescribed impedance mismatch threshold associated with the circuit to be monitored.

Abstract translation: 用于检测待监测电路中的上拉和下拉器件之间的阻抗失配的比较电路包括一个比较器，用于接收第一和第二信号，并产生一个第三信号，该第三信号指示第一和第二信号之间的差值 和第二信号。 第一信号发生器用于产生表示参考上拉和下拉电流之间的差的第一信号，该下拉电流被缩放规定量。 参考上拉电流指示流过待监测电路中的至少一个对应的上拉晶体管器件的电流。 下拉参考电流表示流过待监测电路中的至少一个对应的下拉晶体管器件的电流。 与比较器的第二输入端连接的第二信号发生器可操作以产生第二信号作为参考电压，该参考电压限定与待监视电路相关联的规定阻抗失配阈值。

公开(公告)号：US08800356B2

公开(公告)日：2014-08-12

申请号：US13247640

申请日：2011-09-28

Applicant: Imad Hassan Makki ,  James Michael Kerns ,  Michael James Uhrich ,  Stephen B. Smith ,  Pankaj Kumar ,  Adam Banker

Inventor： Imad Hassan Makki ,  James Michael Kerns ,  Michael James Uhrich ,  Stephen B. Smith ,  Pankaj Kumar ,  Adam Banker

IPC: G01M15/10

CPC classification number: F01N11/00 ,  F01N2550/02 ,  G01N33/007 ,  G06N99/005 ,  Y02T10/47

Abstract: Embodiments for predicting catalyst function are disclosed. One example embodiment includes applying a set of parameter readings for a given sample to a support vector machine to generate a classification output, recording a plurality of classification outputs for a plurality of successive samples over a first duration, and indicating catalyst degradation if a threshold percentage of the classification outputs indicates degraded catalyst performance. In this way, catalyst degradation may be indicated using a simplified model that does not require extensive calibration.

Abstract translation: 公开了用于预测催化剂功能的实施方案。 一个示例性实施例包括将给定样本的一组参数读数应用于支持向量机以产生分类输出，在第一持续时间内记录多个连续样本的多个分类输出，并且如果阈值百分比 的分类输出表明催化剂性能下降。 以这种方式，可以使用不需要大量校准的简化模型来指示催化剂降解。

公开(公告)号：US20140082451A1

公开(公告)日：2014-03-20

申请号：US14083059

申请日：2013-11-18

Applicant: Sivakumar Radhakrishnan ,  Mark A. Schmisseur ,  Sin S. Tan ,  Kenneth C. Haren ,  Thomas C. Brown ,  Pankaj Kumar ,  Vinodh Gopal ,  Wajdi K. Feghali

Inventor： Sivakumar Radhakrishnan ,  Mark A. Schmisseur ,  Sin S. Tan ,  Kenneth C. Haren ,  Thomas C. Brown ,  Pankaj Kumar ,  Vinodh Gopal ,  Wajdi K. Feghali

IPC: G06F11/10

CPC classification number: G06F11/10 ,  G06F11/1076 ,  H03M1/1052 ,  H03M7/42 ,  H03M13/09 ,  H03M13/091 ,  H03M13/158 ,  H03M13/6575

Abstract: Embodiments of the present disclosure describe methods, apparatus, and system configurations for cyclic redundancy check circuits using Galois-field arithmetic.

Abstract translation: 本公开的实施例描述了使用伽罗瓦域算术的循环冗余校验电路的方法，装置和系统配置。

公开(公告)号：US20130342258A1

公开(公告)日：2013-12-26

申请号：US13530426

申请日：2012-06-22

Applicant: Pankaj Kumar ,  Pramod Parameswaran ,  Vani Deshpande ,  Makeshwar Kothandaraman

Inventor： Pankaj Kumar ,  Pramod Parameswaran ,  Vani Deshpande ,  Makeshwar Kothandaraman

IPC: H03L5/00

CPC classification number: H03L5/00 ,  H03K19/0013 ,  H03K19/018507

Abstract: An apparatus comprising a first stage and a second stage. The first stage may be configured to generate an intermediate signal having a first voltage in response to an input signal having a second voltage received from a pad. The second stage may be configured to generate a core voltage in response to the first voltage. The voltage received from the pad may operate at a voltage compliant with one or more published interface specifications.

Abstract translation: 一种包括第一级和第二级的装置。 第一级可以被配置为响应于具有从焊盘接收到的第二电压的输入信号而产生具有第一电压的中间信号。 第二级可以被配置为响应于第一电压而产生核心电压。 从焊盘接收的电压可以在符合一个或多个公布的接口规范的电压下工作。