公开(公告)号：US07528027B1

公开(公告)日：2009-05-05

申请号：US12054727

申请日：2008-03-25

申请人： Huilong Zhu ,  Mahender Kumar ,  Dan M. Mocuta ,  Ravikumar Ramachandran ,  Wenjuan Zhu

发明人： Huilong Zhu ,  Mahender Kumar ,  Dan M. Mocuta ,  Ravikumar Ramachandran ,  Wenjuan Zhu

IPC分类号： H01L21/336

CPC分类号： H01L29/78696 ,  H01L21/823807 ,  H01L21/82385 ,  H01L21/84 ,  H01L29/045 ,  H01L29/1037 ,  H01L29/66545 ,  H01L29/66621 ,  H01L29/66772

摘要： An SOI CMOS structure includes a v-shape trench in a pFet region. The v-shape trench has a surface in a (111) plane and extends into an SOI layer in the pFet region. A layer, such as a gate oxide or high-k material, is formed in the v-shape trench. Poly-Si is deposited on top of the layer.

摘要翻译： SOI CMOS结构包括pFet区域中的v形沟槽。 V形沟槽具有（111）面中的表面并延伸到pFet区域中的SOI层。 在V形沟槽中形成诸如栅极氧化物或高k材料的层。 多晶硅沉积在层的顶部。

公开(公告)号：US07504700B2

公开(公告)日：2009-03-17

申请号：US10907935

申请日：2005-04-21

申请人： Wenjuan Zhu ,  Michael P. Chudzik ,  Oleg Gluschenkov ,  Dae-Gyu Park ,  Akihisa Sekiguchi

发明人： Wenjuan Zhu ,  Michael P. Chudzik ,  Oleg Gluschenkov ,  Dae-Gyu Park ,  Akihisa Sekiguchi

IPC分类号： H01L27/088 ,  H01L21/3205 ,  H01L21/4763

CPC分类号： H01L21/28185 ,  H01L21/28097 ,  H01L21/28229 ,  H01L21/823857 ,  H01L29/4966 ,  H01L29/4975 ,  H01L29/517

摘要： A semiconductor structure and method of forming the same, comprising forming a uniform buffer layer of diffusion-controlling stable material on top of a base gate dielectric layer, and then forming a uniform layer which contains a source of transitional metal atoms, and then annealing the structure to diffuse the transitional metal atoms from their source through the diffusion-controlling material and into the base gate dielectric layer.

摘要翻译： 一种半导体结构及其制造方法，包括在基极电介质层的顶部形成扩散控制稳定材料的均匀缓冲层，然后形成含有过渡金属原子源的均匀层，然后退火 结构将过渡金属原子从其源极扩散通过扩散控制材料并进入基极栅极电介质层。

公开(公告)号：US20130207080A1

公开(公告)日：2013-08-15

申请号：US13369901

申请日：2012-02-09

申请人： Christos D. Dimitrakopoulos ,  Damon B. Farmer ,  Alfred Grill ,  Yu-Ming Lin ,  Deborah A. Neumayer ,  Dirk Pfeiffer ,  Wenjuan Zhu

发明人： Christos D. Dimitrakopoulos ,  Damon B. Farmer ,  Alfred Grill ,  Yu-Ming Lin ,  Deborah A. Neumayer ,  Dirk Pfeiffer ,  Wenjuan Zhu

IPC分类号： H01L29/775 ,  H01L21/336

CPC分类号： H01L21/0237 ,  B82Y30/00 ,  B82Y40/00 ,  H01L21/02378 ,  H01L21/02527 ,  H01L21/02617 ,  H01L21/02661 ,  H01L29/1606 ,  H01L29/4908 ,  H01L29/513 ,  H01L29/66045 ,  H01L29/7781 ,  H01L29/78684

摘要： A silicon nitride layer is provided on an uppermost surface of a graphene layer and then a hafnium dioxide layer is provided on an uppermost surface of the silicon nitride layer. The silicon nitride layer acts as a wetting agent for the hafnium dioxide layer and thus prevents the formation of discontinuous columns of hafnium dioxide atop the graphene layer. The silicon nitride layer and the hafnium dioxide layer, which collectively form a low EOT bilayer gate dielectric, exhibit continuous morphology atop the graphene layer.

摘要翻译： 在石墨烯层的最上表面上设置氮化硅层，然后在氮化硅层的最上表面上设置二氧化铪层。 氮化硅层用作二氧化铪层的润湿剂，从而防止在石墨烯层顶上形成不连续的二氧化铪塔。 共同形成低EOT双层栅极电介质的氮化硅层和二氧化铪层在石墨烯层的顶部呈现连续的形态。

公开(公告)号：US08101474B2

公开(公告)日：2012-01-24

申请号：US12652804

申请日：2010-01-06

申请人： Wenjuan Zhu

发明人： Wenjuan Zhu

IPC分类号： H01L21/338 ,  H01L29/66

CPC分类号： H01L29/1606 ,  H01L21/28255 ,  H01L29/1054 ,  H01L29/165 ,  H01L29/458 ,  H01L29/518 ,  H01L29/66742 ,  H01L29/7781 ,  H01L29/78687 ,  H01L29/78696

摘要： A novel buried-channel graphene device structure and method for manufacture. The new structure includes a two level channel layer comprised of a buried-channel graphene layer with an amorphous silicon top channel layer. The method for making such structure includes the steps of depositing a graphene layer on a substrate, depositing an amorphous silicon layer on the graphene layer, converting the upper layer of the amorphous silicon layer to a gate dielectric by nitridation, oxidation or oxynitridation, while keeping the lower layer of the amorphous silicon layer to serve as part of the channel to form the buried-channel graphene device.

摘要翻译： 一种新颖的埋沟石墨烯器件结构及其制造方法。 新结构包括由具有非晶硅顶部沟道层的埋入通道石墨烯层组成的二级沟道层。 制造这种结构的方法包括以下步骤：在基板上沉积石墨烯层，在石墨烯层上沉积非晶硅层，通过氮化，氧化或氧氮化将非晶硅层的上层转化为栅极电介质，同时保持 非晶硅层的下层用作沟道的一部分以形成掩埋沟道石墨烯器件。

公开(公告)号：US20110163289A1

公开(公告)日：2011-07-07

申请号：US12652804

申请日：2010-01-06

申请人： Wenjuan Zhu

发明人： Wenjuan Zhu

IPC分类号： H01L29/16 ,  H01L21/336

CPC分类号： H01L29/1606 ,  H01L21/28255 ,  H01L29/1054 ,  H01L29/165 ,  H01L29/458 ,  H01L29/518 ,  H01L29/66742 ,  H01L29/7781 ,  H01L29/78687 ,  H01L29/78696

摘要： A novel buried-channel graphene device structure and method for manufacture. The new structure includes a two level channel layer comprised of a buried-channel graphene layer with an amorphous silicon top channel layer. The method for making such structure includes the steps of depositing a graphene layer on a substrate, depositing an amorphous silicon layer on the graphene layer, converting the upper layer of the amorphous silicon layer to a gate dielectric by nitridation, oxidation or oxynitridation, while keeping the lower layer of the amorphous silicon layer to serve as part of the channel to form the buried-channel graphene device.

摘要翻译： 一种新颖的埋沟石墨烯器件结构及其制造方法。 新结构包括由具有非晶硅顶部沟道层的埋入通道石墨烯层组成的二级沟道层。 制造这种结构的方法包括以下步骤：在基板上沉积石墨烯层，在石墨烯层上沉积非晶硅层，通过氮化，氧化或氧氮化将非晶硅层的上层转化为栅极电介质，同时保持 非晶硅层的下层用作沟道的一部分以形成掩埋沟道石墨烯器件。

公开(公告)号：US07485510B2

公开(公告)日：2009-02-03

申请号：US11538174

申请日：2006-10-03

申请人： Huilong Zhu ,  Ravikumar Ramachandran ,  Effendi Leobandung ,  Mahender Kumar ,  Wenjuan Zhu ,  Christine Norris

发明人： Huilong Zhu ,  Ravikumar Ramachandran ,  Effendi Leobandung ,  Mahender Kumar ,  Wenjuan Zhu ,  Christine Norris

IPC分类号： H01L21/84

CPC分类号： H01L29/78696 ,  H01L29/78648

摘要： A semiconductor structure includes a semiconductor layer that includes an inverted V shaped channel region that allows avoidance of a raised source/drain region within the semiconductor structure. In one embodiment, a generally conventional gate electrode is located over a planar surface of the semiconductor layer over the inverted V shaped channel region. In another embodiment, the foregoing generally conventional gate electrode is used in conjunction with an inverted V shaped gate electrode that is located within an inverted V shaped notch that comprises the inverted V shaped channel region.

摘要翻译： 半导体结构包括半导体层，其包括反向V形沟道区域，其允许避免半导体结构内的升高的源极/漏极区域。 在一个实施例中，通常常规的栅电极位于反向V形沟道区上的半导体层的平面表面上方。 在另一个实施例中，上述通常的常规栅极电极与位于包括反向V形沟道区域的倒V形凹口内的反向V形栅电极结合使用。

公开(公告)号：US09765392B2

公开(公告)日：2017-09-19

申请号：US13477099

申请日：2012-05-22

申请人： Hongbo Peng ,  Gustavo A. Stolovitzky ,  Wenjuan Zhu

发明人： Hongbo Peng ,  Gustavo A. Stolovitzky ,  Wenjuan Zhu

IPC分类号： G01N27/62 ,  C12Q1/68 ,  G01N33/487 ,  B82Y5/00

CPC分类号： C12Q1/6869 ,  B82Y5/00 ,  G01N33/48721 ,  Y10T436/143333

摘要： A technique for a nanodevice is provided. A reservoir is separated into two parts by a membrane. A nanopore is formed through the membrane, and the nanopore connects the two parts of the reservoir. The nanopore and the two parts of the reservoir are filled with ionic buffer. The membrane includes a graphene layer and insulating layers. The graphene layer is wired to first and second metal pads to form a graphene transistor in which transistor current flowing through the graphene transistor is modulated by charges or dipoles passing through the nanopore.

公开(公告)号：US08735242B2

公开(公告)日：2014-05-27

申请号：US13563673

申请日：2012-07-31

申请人： Wenjuan Zhu

发明人： Wenjuan Zhu

IPC分类号： H01L21/8238

CPC分类号： H01L23/485 ,  B82Y10/00 ,  H01L23/5256 ,  H01L23/53276 ,  H01L27/11206 ,  H01L29/1606 ,  H01L29/417 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method of forming a semiconductor device includes forming a field-effect transistor (FET), and forming a fuse which includes a graphene layer and is electrically connected to the FET.

摘要翻译： 形成半导体器件的方法包括形成场效应晶体管（FET），并形成包括石墨烯层并与FET电连接的熔丝。

公开(公告)号：US08724402B2

公开(公告)日：2014-05-13

申请号：US13595614

申请日：2012-08-27

申请人： Wenjuan Zhu

发明人： Wenjuan Zhu

IPC分类号： G11C7/00

CPC分类号： H01L29/84 ,  G11C13/0014 ,  H01L29/1606 ,  H01L29/685

摘要： Embodiments relate to a method for representing data in a graphene-based memory device. The method includes applying a first voltage to a back gate of a graphene-based memory device and a second voltage to a first graphene layer of the graphene-based memory device. The graphene-based memory device includes the first graphene layer and a second graphene layer and a first insulation layer located between the first and second graphene layers. The first insulation layer has an opening between the first and second graphene layers. The back gate is located on an opposite side of the second graphene layer from the first insulation layer. The first graphene layer is configured to bend into the opening of the first insulation layer to contact the second graphene layer based on a first electrostatic force generated by the applying the first voltage to the back gate.

摘要翻译： 实施例涉及一种用于在基于石墨烯的存储器件中表示数据的方法。 该方法包括将第一电压施加到基于石墨烯的存储器件的背栅，并将第二电压施加到基于石墨烯的存储器件的第一石墨烯层。 基于石墨烯的存储器件包括第一石墨烯层和第二石墨烯层以及位于第一和第二石墨烯层之间的第一绝缘层。 第一绝缘层在第一和第二石墨烯层之间具有开口。 背栅极位于与第一绝缘层相反的第二石墨烯层的一侧。 基于通过将第一电压施加到后门产生的第一静电力，第一石墨烯层被配置为弯曲到第一绝缘层的开口中以接触第二石墨烯层。

公开(公告)号：US20140050036A1

公开(公告)日：2014-02-20

申请号：US13595614

申请日：2012-08-27

申请人： Wenjuan Zhu

发明人： Wenjuan Zhu

IPC分类号： G11C7/00 ,  B82Y99/00

CPC分类号： H01L29/84 ,  G11C13/0014 ,  H01L29/1606 ,  H01L29/685

摘要： Embodiments relate to a method for representing data in a graphene-based memory device. The method includes applying a first voltage to a back gate of a graphene-based memory device and a second voltage to a first graphene layer of the graphene-based memory device. The graphene-based memory device includes the first graphene layer and a second graphene layer and a first insulation layer located between the first and second graphene layers. The first insulation layer has an opening between the first and second graphene layers. The back gate is located on an opposite side of the second graphene layer from the first insulation layer. The first graphene layer is configured to bend into the opening of the first insulation layer to contact the second graphene layer based on a first electrostatic force generated by the applying the first voltage to the back gate.

摘要翻译： 实施例涉及一种用于在基于石墨烯的存储器件中表示数据的方法。 该方法包括将第一电压施加到基于石墨烯的存储器件的背栅，并将第二电压施加到基于石墨烯的存储器件的第一石墨烯层。 基于石墨烯的存储器件包括第一石墨烯层和第二石墨烯层以及位于第一和第二石墨烯层之间的第一绝缘层。 第一绝缘层在第一和第二石墨烯层之间具有开口。 背栅极位于与第一绝缘层相反的第二石墨烯层的一侧。 基于通过将第一电压施加到后门产生的第一静电力，第一石墨烯层被配置为弯曲到第一绝缘层的开口中以接触第二石墨烯层。