公开(公告)号：US20080294368A1

公开(公告)日：2008-11-27

申请号：US12052387

申请日：2008-03-20

申请人： Jun Wan ,  Chee-Keong Chong ,  Guirong Shi ,  JunBo Zhang ,  Lei Yang ,  Raymond Kok

发明人： Jun Wan ,  Chee-Keong Chong ,  Guirong Shi ,  JunBo Zhang ,  Lei Yang ,  Raymond Kok

IPC分类号： G01B21/28

CPC分类号： G06F17/5018 ,  G06T7/62

摘要： A system, method, and computer program for calculating internal volume of a solid model, comprising selecting a seed cube that is internal to a solid model; determining a plurality of surrounding cubes surrounding said seed cube; and calculating a boundary volume from said plurality of surrounding cubes, and appropriate means and computer-readable instructions.

摘要翻译： 一种用于计算实体模型的内部体积的系统，方法和计算机程序，包括选择实体模型内部的种子立方体; 确定围绕所述种子立方体的多个周围立方体; 以及从所述多个周围立方体计算边界体积，以及适当的装置和计算机可读指令。

公开(公告)号：US07452231B2

公开(公告)日：2008-11-18

申请号：US11749019

申请日：2007-05-15

申请人： Jun Wan

发明人： Jun Wan

IPC分类号： H01R13/267

CPC分类号： H01R13/6271 ,  H01R13/6658

摘要： A portable electronic device is disclosed. The portable electronic device includes a body, a circuit board, and a USB plug. The body includes a top cover and a bottom cover. The top cover is engaged with the bottom cover. The circuit board is disposed in the body. The USB plug includes a metallic plug and an insulating portion connecting with the metallic plug. The USB plug is detachably disposed between the top cover and the bottom cover and transits between a first position and a second position. When the USB plug is in the first position, the metallic plug and the insulating portion abut against the top cover and the bottom cover. When the USB plug is in the second position, the metallic plug is disposed outside the body.

摘要翻译： 公开了一种便携式电子设备。 便携式电子设备包括主体，电路板和USB插头。 主体包括顶盖和底盖。 顶盖与底盖接合。 电路板设置在体内。 USB插头包括金属插头和与金属插头连接的绝缘部分。 USB插头可拆卸地设置在顶盖和底盖之间，并且在第一位置和第二位置之间转换。 当USB插头处于第一位置时，金属插头和绝缘部分抵靠顶盖和底盖。 当USB插头位于第二位置时，金属插头设置在身体外部。

公开(公告)号：US07447065B2

公开(公告)日：2008-11-04

申请号：US12021741

申请日：2008-01-29

申请人： Yupin Fong ,  Jun Wan ,  Jeffrey Lutze

发明人： Yupin Fong ,  Jun Wan ,  Jeffrey Lutze

IPC分类号： G11C11/34

CPC分类号： G11C16/3418 ,  G11C16/3427

摘要： A system is disclosed for reducing or removing a form of read disturb in a non-volatile storage device. One embodiment seeks to prevent read disturb by eliminating or minimizing boosting of the channel of the memory elements. For example, one implementation prevents or reduces boosting of the source side of the NAND string channel during a read process. Because the source side of the NAND string channel is not boosted, at least one form of read disturb is minimized or does not occur.

公开(公告)号：US07385426B1

公开(公告)日：2008-06-10

申请号：US11679053

申请日：2007-02-26

申请人： Jun Wan ,  Peter R. Holloway

发明人： Jun Wan ,  Peter R. Holloway

IPC分类号： H03K19/094 ,  H03H11/26

CPC分类号： H03F3/70 ,  H03F3/45179 ,  H03F3/45475 ,  H03F3/45766 ,  H03F2200/264 ,  H03F2203/45038 ,  H03F2203/45166 ,  H03F2203/45212 ,  H03F2203/45354

摘要： A buffer circuit (318) including a first half circuit and a second half circuit. Each half circuit includes a first MOS transistor (M4, M9) as the input device and a source follower, a second MOS transistor (M23, M22) as a transconductance amplifier device, and a third MOS transistor (M5, M8) as a folded cascode device. The first half circuit receives a buffer input voltage as the input voltage and the second half circuit receives a reference voltage as the input voltage. The first and second half circuits providing a pair of differential output signals indicative of the buffer input voltage. The buffer circuit has a very low input capacitance where the input capacitance does not vary with the buffer input voltage and other operating conditions, such as fabrication process, temperature and power supply voltage variations.

摘要翻译： 一种包括第一半电路和第二半电路的缓冲电路（318）。 每个半电路包括作为输入装置的第一MOS晶体管（M 4，M 9）和源极跟随器，作为跨导放大器装置的第二MOS晶体管（M23，M22）和第三MOS晶体管（M5， M 8）作为折叠共源共栅器件。 前半部电路接收缓冲器输入电压作为输入电压，第二半电路接收参考电压作为输入电压。 第一和第二半电路提供指示缓冲器输入电压的一对差分输出信号。 缓冲电路具有非常低的输入电容，其中输入电容不随缓冲器输入电压和其他工作条件（例如制造工艺，温度和电源电压变化）而变化。

公开(公告)号：US20080072732A1

公开(公告)日：2008-03-27

申请号：US11836850

申请日：2007-08-10

申请人： Jun Wan ,  Xiang-Lin Li

发明人： Jun Wan ,  Xiang-Lin Li

IPC分类号： B26D5/00 ,  H05K7/14

CPC分类号： B26D3/02 ,  B26D1/09 ,  H04M1/0266 ,  Y10T83/8878

摘要： A cushion disposed on a display panel is provided. The display panel has an active area and an inactive area surrounding the active area. The cushion includes a body having a first surface, a second surface and a concave channel. The second surface is joined to the inactive area. The concave channel passes through the first surface and the second surface so as to expose the active area. The concave channel has an inclined lateral wall, which forms a first inclination angle and a second inclination angle with the first surface and the second surface respectively, such that the area of the first surface is larger than that of the second surface.

摘要翻译： 设置在显示面板上的缓冲垫。 显示面板具有活动区域和围绕有效区域的无效区域。 该衬垫包括具有第一表面，第二表面和凹形通道的主体。 第二表面连接到非活动区域。 凹槽通过第一表面和第二表面以暴露活性区域。 凹槽具有倾斜的侧壁，分别与第一表面和第二表面形成第一倾斜角和第二倾斜角，使得第一表面的面积大于第二表面的面积。

公开(公告)号：US07262994B2

公开(公告)日：2007-08-28

申请号：US11296087

申请日：2005-12-06

申请人： Yupin Fong ,  Jun Wan ,  Jeffrey Lutze

发明人： Yupin Fong ,  Jun Wan ,  Jeffrey Lutze

IPC分类号： G11C11/34

CPC分类号： G11C16/3418 ,  G11C11/5628 ,  G11C11/5642 ,  G11C16/0483 ,  G11C16/3427

摘要： A system for reducing or removing a form of read disturb in a non-volatile storage device. One embodiment seeks to prevent read disturb by eliminating or minimizing boosting of the channel of the memory elements. For example, one implementation prevents or reduces boosting of the source side of the NAND string channel during a read process. Because the source side of the NAND string channel is not boosted, at least one form of read disturb is minimized or does not occur.

公开(公告)号：US07206231B2

公开(公告)日：2007-04-17

申请号：US11394441

申请日：2006-03-31

申请人： Jun Wan ,  Jeffrey W. Lutze

发明人： Jun Wan ,  Jeffrey W. Lutze

IPC分类号： G11C16/04

CPC分类号： G11C11/5628 ,  G11C16/0483 ,  G11C16/10

摘要： The maximum allowable number of voltage programming pulses to program memory elements of a non-volatile memory device is adjusted to account for changes in the memory elements which occur over time. Programming pulses are applied until the threshold voltage of one or more memory elements reaches a certain verify level, after which a defined maximum number of additional pulses may be applied to other memory elements to allow them to also reach associated target threshold voltage levels. The technique enforces a maximum allowable number of programming pulses that can change over time as the memory is cycled.

摘要翻译： 调整非易失性存储器件对程序存储器元件的电压编程脉冲的最大允许数量，以便考虑随时间发生的存储元件的变化。 施加编程脉冲，直到一个或多个存储器元件的阈值电压达到某个验证电平，之后可以将限定的最大数量的附加脉冲施加到其它存储器元件以允许它们也达到相关联的目标阈值电压电平。 该技术实现了随着存储器循环而随时间变化的最大允许编程脉冲数。

公开(公告)号：US07075475B1

公开(公告)日：2006-07-11

申请号：US10917779

申请日：2004-08-13

申请人： Jun Wan

发明人： Jun Wan

IPC分类号： H03M1/12 ,  H03M3/00 ,  G06F7/64 ,  G06G7/18 ,  G06G7/19

CPC分类号： H03M3/342 ,  H03M3/356 ,  H03M3/39 ,  H03M3/43 ,  H03M3/456

摘要： A charge balancing modulation system for digitizing the output of a variable impedance sensor utilizes synchronous excitation of the input sensor and AC coupling of the analog input signal. In one embodiment, the modulation system includes a switched excitation source for exciting the input sensor and generating an input voltage step in response, and an integrator including an input capacitor, an amplifier and an accumulation capacitor. The input capacitor AC couples the input voltage step to the integrator to form an input charge. A reference charge packet is generated in a data dependent manner and coupled to the integrator simultaneously with the input charge. The integrator integrates charge associated with the sum of the input charge and the reference charge, when applied. The modulation system generates an output data stream exhibiting a ones density proportional to the magnitude of the average input voltage step.

摘要翻译： 用于数字化可变阻抗传感器的输出的电荷平衡调制系统利用输入传感器的同步激励和模拟输入信号的AC耦合。 在一个实施例中，调制系统包括用于激励输入传感器并产生响应的输入电压阶跃的切换激励源，以及包括输入电容器，放大器和累加电容器的积分器。 输入电容器AC将输入电压阶跃耦合到积分器以形成输入电荷。 以数据依赖的方式生成参考电荷分组，并与输入电荷同时耦合到积分器。 当应用时，积分器将与输入电荷和参考电荷的总和相关联的电荷进行积分。 调制系统产生表现出与平均输入电压阶跃幅度成比例的一个密度的输出数据流。

公开(公告)号：US06962436B1

公开(公告)日：2005-11-08

申请号：US11083861

申请日：2005-03-17

申请人： Peter R. Holloway ,  Eric D. Blom ,  Jun Wan ,  Stuart H. Urie

发明人： Peter R. Holloway ,  Eric D. Blom ,  Jun Wan ,  Stuart H. Urie

IPC分类号： G01K1/02 ,  G01K7/01 ,  H03M3/02 ,  H03M3/00

CPC分类号： H03M3/324 ,  G01K1/028 ,  G01K7/01 ,  H03M3/43 ,  H03M3/456

摘要： A digitizing temperature measurement system for providing a digital temperature measurement includes an excitation source for providing switched excitation currents to two or three temperature sensing elements and an ADC circuit including a charge-balancing modulator and a digital post processing circuit. The system utilizes synchronous AC excitation of the temperature sensing elements and an AC coupled analog-to-digital converter input. The temperature measurement system also implements correlated double sampling for noise cancellation to provide low noise and highly accurate analog-to-digital conversions. The modulator receives a charge domain reference signal generated by a reference charge packet generator incorporating a charge based bandgap subsystem. Therefore, the temperature measurement system can be operated at very low supply voltages, such as 1.0 Vdc. A low noise and highly accurate temperature measurement system is thus realized where temperature measurements of very high resolutions (up to 16 bit) can be attained.

摘要翻译： 用于提供数字温度测量的数字化温度测量系统包括用于向两个或三个温度感测元件提供开关激励电流的激励源和包括电荷平衡调制器和数字后处理电路的ADC电路。 该系统利用温度感测元件的同步AC励磁和AC耦合模数转换器输入。 温度测量系统还实现了噪声消除的相关双采样，以提供低噪声和高精度的模数转换。 调制器接收由包含基于电荷的带隙子系统的参考电荷包发生器产生的电荷域参考信号。 因此，温度测量系统可以在非常低的电源电压下工作，例如1.0 Vdc。 因此，实现了可以获得非常高分辨率（高达16位）的温度测量的低噪声和高精度的温度测量系统。

公开(公告)号：US06903558B1

公开(公告)日：2005-06-07

申请号：US10423355

申请日：2003-04-25

申请人： Eric D. Blom ,  Peter R. Holloway ,  Jun Wan ,  Stuart H. Urie

发明人： Eric D. Blom ,  Peter R. Holloway ,  Jun Wan ,  Stuart H. Urie

IPC分类号： G01R27/02 ,  G01R1/38

CPC分类号： G01R27/02

摘要： A digitizing ohmmeter system for providing a digital resistance measurement includes a current source for providing an excitation current to an impedance-varying input sensor and an ADC circuit including a charge-balancing modulator and a digital post processing circuit. The system utilizes synchronous AC excitation of the input sensor and an AC coupled analog-to-digital converter input. The digitizing ohmmeter system also implements correlated double sampling for noise cancellation to provide low noise and highly accurate analog-to-digital conversions. The ADC circuit includes a reference signal generator generating a resistance reference signal by time-sharing the excitation current with the input sensor. The digitizing ohmmeter system thereby realizes fully ratiometric operation such that neither a precise current source nor a precise voltage source is required for accurate resistance measurements.