公开(公告)号：US11271576B1

公开(公告)日：2022-03-08

申请号：US17223559

申请日：2021-04-06

Applicant: QUALCOMM Incorporated

Inventor： Andrew Weil ,  Ashok Swaminathan ,  Siyu Yang

IPC: H03M1/10

Abstract: Certain aspects of the present disclosure provide a digital-to-analog converter (DAC). The DAC generally includes a plurality of current-steering cells, each having a bypass switch, and a resistor ladder circuit having multiple segments. Each segment may include a first resistive element and a second resistive element, the bypass switch being configured to selectively provide a bypass current to a common node between the first resistive element and the second resistive element.

公开(公告)号：US10797720B2

公开(公告)日：2020-10-06

申请号：US16367712

申请日：2019-03-28

Applicant: QUALCOMM Incorporated

Inventor： Eunyung Sung ,  Nitz Saputra ,  Behnam Sedighi ,  Ashok Swaminathan ,  Honghao Ji ,  Shahin Mehdizad Taleie ,  Dongwon Seo

IPC: H03M1/74 ,  H03M1/78 ,  H03M1/68

Abstract: A current digital-to-analog converter includes a binary current-generating section configured to generate a binary-weighted current based on a first set of control signals; a unary current-generating section configured to generate a unary-weighted current based on a second set of control signals; and a current combining circuit configured to add or subtract a reference current and a current generated by a current source of the unary current-generating section using the binary-weighted current.

公开(公告)号：US10454509B2

公开(公告)日：2019-10-22

申请号：US15962865

申请日：2018-04-25

Applicant: QUALCOMM Incorporated

Inventor： Bhushan Shanti Asuri ,  Krishnaswamy Thiagarajan ,  Ashok Swaminathan ,  Shahin Mehdizad Taleie ,  Yen-Wei Chang ,  Vinod Panikkath ,  Sameer Vasantlal Vora ,  Ayush Mittal ,  Tonmoy Biswas ,  Sy-Chyuan Hwu ,  Zhilong Tang ,  Ibrahim Chamas ,  Ping Wing Lai ,  Behnam Sedighi ,  Dongwon Seo ,  Nitz Saputra

IPC: H04B1/04 ,  H04L27/20 ,  H04B1/00

Abstract: A communication circuit may include a first pair of digital-to-analog converters (DACs) coupled to an input of a first mixer and configured to generate first baseband signals. The communication circuit may further include a second pair of DACs coupled to an input of a second mixer and configured to generate second baseband signals. The second baseband signals may be shifted in phase relative to the first baseband signals.

公开(公告)号：US09634676B2

公开(公告)日：2017-04-25

申请号：US14789095

申请日：2015-07-01

Applicant: QUALCOMM Incorporated

Inventor： Ashok Swaminathan ,  Christian Venerus ,  Marzio Pedrali-Noy

IPC: H03L7/06 ,  H03L7/099 ,  H03B5/04 ,  H03L1/00

CPC classification number: H03L7/099 ,  H03B5/04 ,  H03B2202/042 ,  H03B2202/06 ,  H03L1/00

Abstract: Methods, systems, and circuits for providing compensation for voltage variation are disclosed. A system includes: a voltage comparator configured to assert a control signal in response to detecting that one or more of power supply voltages droops below a threshold amount; a phase locked loop (PLL) configured to divide an output frequency for the PLL in response to the assertion of the control signal; a plurality of voltage sensors corresponding to the plurality of power supply voltages, the voltage sensors configured to output respective digital signals indicative of a voltage level of its corresponding power supply voltage; and a control circuit configured to control an oscillator frequency in the PLL during the open-loop mode responsive to the respective digital signals.

公开(公告)号：US20160285385A1

公开(公告)日：2016-09-29

申请号：US14670996

申请日：2015-03-27

Applicant: QUALCOMM Incorporated

Inventor： Christian Venerus ,  Ashok Swaminathan

IPC: H02M7/217 ,  G01R19/165 ,  G01R19/00

CPC classification number: H02M7/217 ,  G01R19/0084 ,  G01R19/165 ,  G01R19/16547 ,  G06F1/26 ,  G06F1/28 ,  G06F1/324 ,  H02M2001/0025 ,  H03K19/00346 ,  Y02D10/126

Abstract: A droop detector includes: a plurality of input nodes, each input node configured to receive a supply voltage; an output node; a plurality of detector modules, each detector module comprises: an input terminal coupled to each input node, an output terminal coupled to the output node; and an input tracking unit configured as a voltage follower to detect a droop in the supply voltage coupled to each input node and output an output voltage that follows the supply voltage on the output terminal when the droop is detected on the supply voltage; and a comparator coupled to the output node and configured to output a control signal when the droop is detected.

Abstract translation: 下垂检测器包括：多个输入节点，每个输入节点被配置为接收电源电压; 输出节点; 多个检测器模块，每个检测器模块包括：耦合到每个输入节点的输入端子，耦合到输出节点的输出端子; 以及输入跟踪单元，被配置为电压跟随器，用于检测耦合到每个输入节点的电源电压中的下降，并且当在所述电源电压上检测到所述下降时，输出在所述输出端子上的所述电源电压之后的输出电压; 以及耦合到输出节点并被配置为当检测到下降时输出控制信号的比较器。

公开(公告)号：US12081229B2

公开(公告)日：2024-09-03

申请号：US17811706

申请日：2022-07-11

Applicant: QUALCOMM Incorporated

Inventor： Sumant Ramprasad ,  Nitz Saputra ,  Ashok Swaminathan

IPC: H03M1/08 ,  H03M1/74 ,  H03M1/78

CPC classification number: H03M1/08 ,  H03M1/742 ,  H03M1/785

Abstract: Methods and apparatus for common-mode current removal in a digital-to-analog converter (DAC). An example DAC circuit generally includes a plurality of current-steering cells, a resistor ladder circuit coupled to the plurality of current-steering cells and having a plurality of shunt branches, and an adjustable resistance circuit coupled between middle nodes of the plurality of shunt branches and a reference potential node for the DAC circuit.

公开(公告)号：US11728822B2

公开(公告)日：2023-08-15

申请号：US17359918

申请日：2021-06-28

Applicant: QUALCOMM Incorporated

Inventor： Shahin Mehdizad Taleie ,  Dongwon Seo ,  Ashok Swaminathan ,  Gurkanwal Singh Sahota ,  Andrew Weil ,  Haibo Fei

IPC: H03M1/74 ,  H03M1/46 ,  H03M1/50 ,  H03M1/78 ,  H03M1/00 ,  H03M1/12

CPC classification number: H03M1/747 ,  H03M1/002 ,  H03M1/1295 ,  H03M1/466 ,  H03M1/502 ,  H03M1/742 ,  H03M1/785

Abstract: Certain aspects of the present disclosure provide a digital-to-analog converter (DAC) system. The DAC system generally includes a plurality of current steering cells, each comprising a current source coupled to at least two current steering switches, wherein control inputs of the at least two current steering switches are coupled to an input path of the DAC system. The DAC system may also include a current source toggle circuit configured to selectively disable the current source of at least one of the plurality of current steering cells, and a feedforward path coupled between the input path and at least one control input of the current source toggle circuit.

公开(公告)号：US20200099389A1

公开(公告)日：2020-03-26

申请号：US16367712

申请日：2019-03-28

Applicant: QUALCOMM Incorporated

Inventor： Eunyung Sung ,  Nitz Saputra ,  Behnam Sedighi ,  Ashok Swaminathan ,  Honghao Ji ,  Shahin Mehdizad Taleie ,  Dongwon Seo

IPC: H03M1/74 ,  H03M1/68 ,  H03M1/78

Abstract: A current digital-to-analog converter includes a binary current-generating section configured to generate a binary-weighted current based on a first set of control signals; a unary current-generating section configured to generate a unary-weighted current based on a second set of control signals; and a current combining circuit configured to add or subtract a reference current and a current generated by a current source of the unary current-generating section using the binary-weighted current.

公开(公告)号：US20150035611A1

公开(公告)日：2015-02-05

申请号：US13954277

申请日：2013-07-30

Applicant: QUALCOMM Incorporated

Inventor： Ashok Swaminathan ,  Ian Galton

IPC: H03K3/354

CPC classification number: H03K3/354 ,  H03B5/24

Abstract: An oscillating circuit with linear gain is presented. The oscillating circuit may include a relaxation oscillator and a current compensation block. The relaxation oscillator includes a capacitor, a pair of resistors operative to deliver a first current to the capacitor, and a first current source adapted to generate the first current having a first predefined level. The current compensation block includes a second current source, and a pair of cross-coupled transistors coupled to the second current source and adapted to steer a current exceeding the first predefined level in the relaxation oscillator away from the capacitor and to the second current source. The proposed oscillating circuit generates an output signal which has a linear gain over a wide tuning range.

Abstract translation: 提出了一种具有线性增益的振荡电路。 振荡电路可以包括张弛振荡器和电流补偿模块。 张弛振荡器包括电容器，一对电阻器，用于向电容器传送第一电流;以及第一电流源，适于产生具有第一预定电平的第一电流。 电流补偿块包括第二电流源和耦合到第二电流源的一对交叉耦合晶体管，并且适于将稳定在振荡器中的第一预定电平的电流从电容器转移到第二电流源。 所提出的振荡电路产生在宽的调谐范围内具有线性增益的输出信号。