-
公开(公告)号：US09431077B2
公开(公告)日：2016-08-30
申请号：US13798803
申请日：2013-03-13
Applicant: QUALCOMM Incorporated
Inventor： Assaf Shacham , Amit Gil , Erez Tsidon , Yanru Li , Azzedine Touzni
CPC classification number: G11C7/1075 , G06F1/3225 , G06F1/3275 , G06F1/3296 , G06F9/462 , G06F9/463 , G06F9/52 , G06F9/544 , G06F11/0757 , Y02D10/13 , Y02D10/14 , Y02D10/172
Abstract: Efficient techniques using a multi-port shared non-volatile memory are described that reduce latency in memory accesses from dedicated function specific processors, such as a modem control processor. The modem processor preempts a host processor that is accessing data from a multi-port shared non-volatile memory flash device allowing the modem processor to quickly access data in the flash device. The preemption process uses a doorbell interrupt initiated by a processor that seeks access and interrupts the processor being preempted. After preemption, the host processor may resume or restart the data access. Access control by the processors utilizes a hardware semaphore atomic control mechanism. Power control of the shared non-volatile memory modules includes at least one inactivity timer to indicate when a supply voltage to the shared non-volatile memory modules can be safely reduced or turned off. Power may be restarted by any of the processors sharing the memory, allowing fast access to the data.
Abstract translation: 描述了使用多端口共享非易失性存储器的有效技术，其减少了诸如调制解调器控制处理器之类的专用功能特定处理器的存储器访问中的延迟。 调制解调器处理器抢占正在从多端口共享非易失性存储器闪存器件访问数据的主处理器，允许调制解调器处理器快速访问闪存设备中的数据。 抢占过程使用由寻求访问并中断处理器被抢占的处理器发起的门铃中断。 抢占后，主机处理器可以恢复或重新启动数据访问。 处理器的访问控制利用硬件信号量原子控制机制。 共享的非易失性存储器模块的功率控制包括至少一个不活动定时器，以指示何时可以安全地减少或关闭共享的非易失性存储器模块的电源电压。 共享内存的任何处理器可能会重新启动电源，从而可以快速访问数据。
-
公开(公告)号：US09367447B2
公开(公告)日：2016-06-14
申请号：US14080852
申请日：2013-11-15
Applicant: QUALCOMM Incorporated
Inventor： Assaf Shacham , Amit Gil
CPC classification number: G06F12/0246 , G06F12/0238 , G06F13/4068 , G06F2212/7207
Abstract: Removable memory card discrimination systems and methods are disclosed. In particular, exemplary embodiments discriminate between secure digital (SD) cards and other removable memory cards that comply with the SD form factor, but support the Universal Flash Storage (UFS) protocol. That is, a host may have a receptacle that supports the SD card form factor and is configured to receive a device. In use, a removable memory card is inserted into the receptacle and, using an SD compliant interrogation signal, the host interrogates a common area on the card so inserted. The common area includes information related to capability descriptors of the card. An SD compliant card will respond with information such as capability descriptors about the SD protocol capabilities, while a UFS compliant card will respond with an indication that the card is UFS compliant. The host may then restart the communication with the card using the UFS protocol.
Abstract translation: 公开了可移动存储卡鉴别系统和方法。 特别地，示例性实施例区分安全数字（SD）卡和符合SD外形尺寸但支持通用闪存存储（UFS）协议的其他可移动存储卡。 也就是说，主机可以具有支持SD卡形状因子的插座，并且被配置为接收设备。 在使用中，将可移动存储卡插入插座中，并且使用SD兼容询问信号，主机询问插入的卡上的公共区域。 公共区域包括与卡的能力描述符相关的信息。 SD兼容卡将响应诸如关于SD协议能力的能力描述符的信息，而符合UFS的卡将响应该卡符合UFS的指示。 然后，主机可以使用UFS协议重新启动与该卡的通信。
-
公开(公告)号：US20150033071A1
公开(公告)日：2015-01-29
申请号：US14338279
申请日：2014-07-22
Applicant: QUALCOMM Incorporated
Inventor： Assaf Shacham , Itai Lanel , Maya Haim (Erez)
CPC classification number: G06F11/0793 , G06F11/0721 , G06F11/0745 , G06F11/0772 , G06F11/3024 , G06F11/3409 , G06F13/00 , G06F2201/86
Abstract: A method for error detection and recovery is provided in which a host controller and host software collaborate together. The host controller may: detect an error condition, set an error interrupt or register, and/or halt task execution or processing at the host controller. The host software may: detect an error condition as a result of the host controller having set the error interrupt or register; performs error handling, and clears the error condition. The host controller then resumes execution or processing of tasks upon detecting that error condition has been cleared by the host software.
Abstract translation: 提供了一种用于错误检测和恢复的方法，其中主机控制器和主机软件协同工作。 主机控制器可以：在主机控制器处检测错误状况，设置错误中断或寄存器，和/或停止任务执行或处理。 主机软件可以：由主机控制器设置错误中断或寄存器的结果来检测错误状况; 执行错误处理，并清除错误条件。 主机控制器在检测到主机软件已经清除了错误状况后，继续执行或处理任务。
-
14.发明授权公开(公告)号：US10157153B2
公开(公告)日：2018-12-18
申请号：US15014158
申请日：2016-02-03
Applicant: QUALCOMM Incorporated
Inventor： Assaf Shacham , Eyal Skulsky , Shaul Yohai Yifrach
Abstract: Aspects disclosed in the detailed description include inline cryptographic engine (ICE) for peripheral component interconnect express (PCIe). In this regard, in one aspect, an ICE is provided in a PCIe root complex (RC) in a host system. The PCIe RC is configured to receive at least one transport layer packet (TLP), which includes a TLP prefix, from a storage device. In a non-limiting example, the TLP prefix includes transaction-specific information that may be used by the ICE to provide data encryption and decryption. By providing the ICE in the PCIe RC and receiving the transaction-specific information in the TLP prefix, it is possible to encrypt and decrypt data in the PCIe RC in compliance with established standards, thus ensuring adequate protection during data exchange between the PCIe RC and the storage device.
-
公开(公告)号：US10067688B2
公开(公告)日：2018-09-04
申请号：US14603630
申请日：2015-01-23
Applicant: QUALCOMM Incorporated
Inventor： Konstantin Dorfman , Assaf Shacham
Abstract: Aspects disclosed in the detailed description include storage resource management in virtualized environments. In this regard, in one aspect, a virtualization layer is provided in a storage controller as an interface between one or more clients and a storage device. The storage controller is configured to trap storage resource requests from a client. A virtualized resource manager creates a virtual resource allocation that corresponds to a physical resource allocation in the storage device. The client receives the virtual resource allocation from the virtualization layer and subsequently accesses the virtual resource allocation through the storage controller as if the client were the sole user of the storage device. By trapping the storage resource requests at the storage controller and providing the virtual resource allocations to the one or more clients, it is possible to share compatibly the storage device among the one or more clients in a virtualized environment.
-
Patent Agency Ranking
公开(公告)号：US10042777B2
公开(公告)日：2018-08-07
申请号：US15084886
申请日：2016-03-30
Applicant: QUALCOMM Incorporated
Inventor： Assaf Shacham , Shaul Yohai Yifrach , Thomas Zeng
IPC: G06F12/10 , G06F12/1027 , G06F3/06 , G06F12/1081 , G06F13/28 , G06F12/0891
Abstract: Hardware-based translation lookaside buffer (TLB) invalidation techniques are disclosed. A host system is configured to exchange data with a peripheral component interconnect express PCIE) endpoint (EP). A memory management unit (MMU), which is a hardware element, is included in the host system to provide address translation according to at least one TLB. In one aspect, the MMU is configured to invalidate the at least one TLB in response to receiving at least one TLB invalidation command from the PCIE EP. In another aspect, the PCIE EP is configured to determine that the at least one TLB needs to be invalidated and provide the TLB invalidation command to invalidate the at least one TLB. By implementing hardware-based TLB invalidation in the host system, it is possible to reduce TLB invalidation delay, thus leading to increased data throughput, reduced power consumption, and improved user experience.
-
公开(公告)号：US09891945B2
公开(公告)日：2018-02-13
申请号：US15075945
申请日：2016-03-21
Applicant: QUALCOMM Incorporated
Inventor： Assaf Shacham , Tom Yahalom , David Teb
CPC classification number: G06F9/45558 , G06F3/0605 , G06F3/0613 , G06F3/062 , G06F3/0635 , G06F3/0644 , G06F3/0659 , G06F3/0664 , G06F3/067 , G06F3/0679 , G06F2009/45583 , G06F2009/45595
Abstract: Storage resource management in virtualized environments is provided. In this regard, when receiving a request for accessing a target general purpose partition (GPP) in a storage device, partition switching circuitry is configured to determine whether the target GPP equals a current GPP that is accessed by a list of existing requests. The partition switching circuitry adds the request into the list of existing requests if the target GPP equals the current GPP. Otherwise, the partition switching circuitry waits for the list of existing requests to be executed on the current GPP before switching to the target GPP to execute the request received from a client. By switching to the target GPP after executing the list of existing commands on the current GPP, it is possible to share a plurality of GPPs among multiple clients in a virtualized environment while maintaining data integrity and security in the storage device.
-
18.发明申请公开(公告)号：US20170220494A1
公开(公告)日：2017-08-03
申请号：US15014158
申请日：2016-02-03
Applicant: QUALCOMM Incorporated
Inventor： Assaf Shacham , Eyal Skulsky , Shaul Yohai Yifrach
CPC classification number: G06F13/1673 , G06F12/1408 , G06F12/1466 , G06F13/385 , G06F13/4068 , G06F13/4282 , G06F21/602 , G06F21/85 , G06F2212/402
Abstract: Aspects disclosed in the detailed description include inline cryptographic engine (ICE) for peripheral component interconnect express (PCIe). In this regard, in one aspect, an ICE is provided in a PCIe root complex (RC) in a host system. The PCIe RC is configured to receive at least one transport layer packet (TLP), which includes a TLP prefix, from a storage device. In a non-limiting example, the TLP prefix includes transaction-specific information that may be used by the ICE to provide data encryption and decryption. By providing the ICE in the PCIe RC and receiving the transaction-specific information in the TLP prefix, it is possible to encrypt and decrypt data in the PCIe RC in compliance with established standards, thus ensuring adequate protection during data exchange between the PCIe RC and the storage device.
-
公开(公告)号：US09542340B2
公开(公告)日：2017-01-10
申请号：US14728343
申请日：2015-06-02
Applicant: QUALCOMM Incorporated
Inventor： Assaf Shacham , Dolev Raviv , David Teb
Abstract: An input/output virtualization (IOY) host controller (HC) (IOV-HC) of a flash-memory-based storage device is disclosed. In one aspect, an IOV-HC is coupled to input/output (I/O) clients via corresponding client register interfaces (CRIs), and is also coupled to a flash-memory-based storage device. The IOV-HC comprises transfer request list (TRL) slot offset registers indicating slots of a shared TRL that are assigned as base slots to each of the CRIs. The IOV-HC further comprises TRL slot count registers indicating how many slots of the shared TRL are assigned to each of the CRIs. When a transfer request (TR) directed to the flash-memory-based storage device is received from a CRI, the IOV-HC is configured to map the TR to a slot of the shared TRL based on a TRL slot offset register and a TRL slot count register of the plurality of TRL slot count registers corresponding to the CRI.
-
公开(公告)号：US09442793B2
公开(公告)日：2016-09-13
申请号：US14338279
申请日：2014-07-22
Applicant: QUALCOMM Incorporated
Inventor： Assaf Shacham , Itai Lanel , Maya Haim
CPC classification number: G06F11/0793 , G06F11/0721 , G06F11/0745 , G06F11/0772 , G06F11/3024 , G06F11/3409 , G06F13/00 , G06F2201/86
Abstract: A method for error detection and recovery is provided in which a host controller and host software collaborate together. The host controller may: detect an error condition, set an error interrupt or register, and/or halt task execution or processing at the host controller. The host software may: detect an error condition as a result of the host controller having set the error interrupt or register; performs error handling, and clears the error condition. The host controller then resumes execution or processing of tasks upon detecting that error condition has been cleared by the host software.
Abstract translation: 提供了一种用于错误检测和恢复的方法，其中主机控制器和主机软件协同工作。 主机控制器可以：在主机控制器处检测错误状况，设置错误中断或寄存器，和/或停止任务执行或处理。 主机软件可以：由主机控制器设置错误中断或寄存器的结果来检测错误状况; 执行错误处理，并清除错误条件。 主机控制器在检测到主机软件已经清除了错误状况后，继续执行或处理任务。
-
-
-
-
-
-
-
-
-
Search Results
33
records
(took 0.015 seconds)
