公开(公告)号：US20070012659A1

公开(公告)日：2007-01-18

申请号：US11525602

申请日：2006-09-21

申请人： Camelia Rusu ,  Rajinder Dhindsa ,  Eric Hudson ,  Mukund Srinivasan ,  Lumin Li ,  Felix Kozakevich

发明人： Camelia Rusu ,  Rajinder Dhindsa ,  Eric Hudson ,  Mukund Srinivasan ,  Lumin Li ,  Felix Kozakevich

IPC分类号： C03C25/68 ,  C23F1/00 ,  H01L21/306 ,  B44C1/22

CPC分类号： H01J37/32165 ,  H01J37/32082 ,  H01J37/32155 ,  H01J2237/3347 ,  H01L21/31116 ,  H01L21/67063 ,  H01L21/67069

摘要： A method for etching a high aspect ratio feature through a mask into a layer to be etched over a substrate is provided. The substrate is placed in a process chamber, which is able to provide RF power at a first frequency, a second frequency different than the first frequency, and a third frequency different than the first and second frequency. An etchant gas is provided to the process chamber. A first etch step is provided, where the first frequency, the second frequency, and the third frequency are at power settings for the first etch step. A second etch step is provided, where the first frequency, the second frequency, and the third frequency are at a different power setting.

摘要翻译： 提供了一种通过掩模将高宽比特征蚀刻到衬底上待蚀刻的层中的方法。 基板被放置在处理室中，该处理室能够提供第一频率的RF功率，不同于第一频率的第二频率和与第一和第二频率不同的第三频率。 向处理室提供蚀刻剂气体。 提供了第一蚀刻步骤，其中第一频率，第二频率和第三频率处于第一蚀刻步骤的功率设置。 提供了第二蚀刻步骤，其中第一频率，第二频率和第三频率处于不同的功率设置。

公开(公告)号：US06984288B2

公开(公告)日：2006-01-10

申请号：US10032279

申请日：2001-12-31

申请人： Rajinder Dhindsa ,  Mukund Srinivasan ,  Eric Lenz ,  Lumin Li

发明人： Rajinder Dhindsa ,  Mukund Srinivasan ,  Eric Lenz ,  Lumin Li

IPC分类号： H01L21/00 ,  C23C16/00

CPC分类号： H01J37/32522 ,  H01J37/32082 ,  Y10S156/916

摘要： A vacuum plasma chamber for processing a workpiece includes first and second electrodes for electrical coupling with gas in the chamber and respectively connected to first and second relatively high and low frequency RF sources. The chamber includes a wall at a reference potential and a plasma confinement region spaced from the wall. A filter arrangement connected to the sources and the electrodes enables current from the first source to flow to the first electrode, prevents the substantial flow of current from the first source to the second electrode and the second source, and enables current from the second source to flow to the first and second electrodes and prevents the substantial flow of current from the second source to the first source.

摘要翻译： 用于处理工件的真空等离子体室包括用于与腔室中的气体电耦合并分别连接到第一和第二相对较高和低频RF源的第一和第二电极。 该室包括在参考电位的壁和与壁间隔开的等离子体约束区域。 连接到源极和电极的滤波器装置使来自第一源的电流流向第一电极，防止电流从第一电源到第二电极和第二电源的大量流动，并使电流从第二电源到 流到第一和第二电极并且防止电流从第二源到第一源的实质性流动。

公开(公告)号：US06824627B2

公开(公告)日：2004-11-30

申请号：US10139364

申请日：2002-05-07

申请人： Rajinder Dhindsa ,  Mukund Srinivasan ,  Aaron Eppler ,  Eric Lenz

发明人： Rajinder Dhindsa ,  Mukund Srinivasan ,  Aaron Eppler ,  Eric Lenz

IPC分类号： H01L2120

CPC分类号： H01J37/32009 ,  H01J37/3244 ,  Y10T156/10

摘要： A plasma discharge electrode having a front surface with a central portion thereof including gas outlets discharging a process gas which forms a plasma and a peripheral portion substantially surrounding the gas outlets. The peripheral portion has at least one step for controlling a density of the plasma formed by the electrode. The electrode can be used as the grounded upper electrode in a parallel plate plasma processing apparatus such as a plasma etching apparatus. The geometric features of the step and of a corresponding edge ring on the lower electrode can be varied to achieve the desired etch rate profile across a wafer surface.

摘要翻译： 一种具有前表面的等离子体放电电极，其中心部分包​​括排出形成等离子体的工艺气体的气体出口和基本上围绕气体出口的周边部分。 周边部分具有用于控制由电极形成的等离子体的密度的至少一个步骤。 在等离子体蚀刻装置等平板等离子体处理装置中，电极可以用作接地上电极。 可以改变下部电极上的台阶和对应的边缘环的几何特征以实现跨晶片表面所需的蚀刻速率分布。

公开(公告)号：US06872281B1

公开(公告)日：2005-03-29

申请号：US09676269

申请日：2000-09-28

申请人： Jian J. Chen ,  Mukund Srinivasan ,  Eric H. Lenz

发明人： Jian J. Chen ,  Mukund Srinivasan ,  Eric H. Lenz

IPC分类号： H05H1/46 ,  B01J19/08 ,  C23F4/00 ,  H01J37/32 ,  H01L21/205 ,  H01L21/3065 ,  C23C16/00 ,  C23F1/00

CPC分类号： H01J37/32871 ,  H01J37/32082 ,  H01J37/32623

摘要： A plasma confining assembly for minimizing unwanted plasma formations in regions outside of a process region in a process chamber is disclosed. The plasma confining assembly includes a first confining element and second confining element positioned proximate the periphery of the process region. The second confining element is spaced apart from the first confining element. The first confining element includes an exposed conductive surface that is electrically grounded and the second confining element includes an exposed insulating surface, which is configured for covering a conductive portion that is electrically grounded. The first confining element and the second confining element substantially reduce the effects of plasma forming components that pass therebetween. Additionally, the plasma confining assembly may include a third confining element, which is formed from an insulating material and disposed between the first confining element and the second confining element, and proximate the periphery of the process region. The third confining element further reduces the effects of plasma forming components that pass between the first confining element and the second confining element.

公开(公告)号：US07547635B2

公开(公告)日：2009-06-16

申请号：US10170424

申请日：2002-06-14

申请人： Aaron Eppler ,  Mukund Srinivasan ,  Robert Chebi

发明人： Aaron Eppler ,  Mukund Srinivasan ,  Robert Chebi

IPC分类号： H01L21/302

CPC分类号： H01L21/32139 ,  H01L21/0276 ,  H01L21/31116 ,  H01L21/31138 ,  H01L21/32136

摘要： A process of etching openings in a dielectric layer includes supporting a semiconductor substrate in a plasma etch reactor, the substrate having a dielectric layer and a patterned photoresist and/or hardmask layer above the dielectric layer; supplying to the plasma etch reactor an etchant gas comprising (a) a fluorocarbon gas (CxFyHz, where x≧1, y≧1, and z≧0), (b) a silane-containing gas, hydrogen or a hydrocarbon gas (CxHy, where x≧1 and y≧4), (c) an optional oxygen-containing gas, and (d) an optional inert gas, wherein the flow rate ratio of the silane-containing gas to fluorocarbon gas is less than or equal to 0.1, or the flow rate ratio of the hydrogen or hydrocarbon gas to fluorocarbon gas is less than or equal to 0.5; energizing the etchant gas into a plasma; and plasma etching openings in the dielectric layer with enhanced photoresist/hardmask to dielectric layer selectivity and/or minimal photoresist distortion or striation.

摘要翻译： 蚀刻电介质层中的开口的过程包括在等离子体蚀刻反应器中支撑半导体衬底，所述衬底在电介质层上方具有电介质层和图案化的光致抗蚀剂和/或硬掩模层; 向等离子体蚀刻反应器供应包括（a）碳氟化合物气体（CxFyHz，其中x> = 1，y> = 1和z> = 0）的蚀刻剂气体，（b）含硅烷的气体，氢气或烃 气体（CxHy，其中x> = 1和y> = 4），（c）任选的含氧气体，和（d）任选的惰性气体，其中含硅烷气体与碳氟化合物气体的流速比为 小于或等于0.1，或者氢气或烃气体与碳氟化合物气体的流量比小于或等于0.5; 将蚀刻剂气体激发成等离子体; 以及具有增强的光致抗蚀剂/硬掩模的电介质层中的等离子体蚀刻开口至介电层选择性和/或最小的光致抗蚀剂失真或条纹。

公开(公告)号：US07405521B2

公开(公告)日：2008-07-29

申请号：US10645665

申请日：2003-08-22

申请人： Raj Dhindsa ,  S. M. Reza Sadjadi ,  Felix Kozakevich ,  Dave Trussell ,  Lumin Li ,  Eric Lenz ,  Camelia Rusu ,  Mukund Srinivasan ,  Aaron Eppler ,  Jim Tietz ,  Jeffrey Marks

发明人： Raj Dhindsa ,  S. M. Reza Sadjadi ,  Felix Kozakevich ,  Dave Trussell ,  Lumin Li ,  Eric Lenz ,  Camelia Rusu ,  Mukund Srinivasan ,  Aaron Eppler ,  Jim Tietz ,  Jeffrey Marks

IPC分类号： H01J7/24 ,  C23F1/00 ,  C23C16/00

CPC分类号： H01J37/32174 ,  H01J37/32082 ,  H01J37/32165

摘要： A workpiece is processed with a plasma in a vacuum plasma processing chamber by exciting the plasma at several frequencies such that the excitation of the plasma by the several frequencies simultaneously causes several different phenomena to occur in the plasma. The chamber includes central top and bottom electrodes and a peripheral top and/or bottom electrode arrangement that is either powered by RF or is connected to a reference potential by a filter arrangement that passes at least one of the plasma excitation frequencies to the exclusion of other frequencies.

摘要翻译： 通过以几个频率激发等离子体，在真空等离子体处理室中用等离子体处理工件，使得等离子体被几个频率激发同时导致在等离子体中发生几种不同的现象。 该腔室包括中央顶部和底部电极以及由RF供电的外围顶部和/或底部电极装置，或通过将至少一个等离子体激发频率传递至排除另一个等离子体激发频率的滤波器装置连接到参考电位 频率

公开(公告)号：US06942816B2

公开(公告)日：2005-09-13

申请号：US10366201

申请日：2003-02-12

申请人： Camelia Rusu ,  Mukund Srinivasan

发明人： Camelia Rusu ,  Mukund Srinivasan

IPC分类号： C23F1/00 ,  H01L20060101 ,  H01L21/00 ,  H01L21/027 ,  H01L21/3065 ,  H01L21/311 ,  H01L21/32

CPC分类号： H01L21/31144

摘要： A method for substantially reducing photoresist wiggling while etching a layer on a substrate is provided. The substrate having thereon the layer disposed below a photoresist mask is introduced into the plasma processing chamber. An etchant source gas mixture is flowed into the plasma processing chamber, where the etchant source gas mixture comprises xenon and an active etchant, where a flow rate of the xenon is at least 35% of etchant source gas mixture. A plasma is struck from the etchant source gas mixture. The layer is etched with the plasma, where the flow rate of xenon reduces photoresist wiggling.

摘要翻译： 提供了一种在蚀刻衬底上的层的同时基本上减少光致抗蚀剂晃动的方法。 其上具有设置在光致抗蚀剂掩模下方的层的基板被引入等离子体处理室。 蚀刻剂源气体混合物流入等离子体处理室，其中蚀刻剂源气体混合物包括氙和活性蚀刻剂，其中氙的流速为蚀刻剂源气体混合物的至少35％。 从蚀刻剂源气体混合物中冲击出等离子体。 用等离子体蚀刻该层，其中氙气的流速减少光致抗蚀剂的晃动。

公开(公告)号：US06714033B1

公开(公告)日：2004-03-30

申请号：US09999648

申请日：2001-10-31

申请人： Konstantin Makhratchev ,  Mukund Srinivasan

发明人： Konstantin Makhratchev ,  Mukund Srinivasan

IPC分类号： G01R3126

CPC分类号： H01J37/32082 ,  G01R19/0061 ,  H01J37/32706 ,  H01J37/32935 ,  H01L22/34 ,  H01L2924/0002 ,  H01L2924/3011 ,  H01L2924/00

摘要： An apparatus for measuring the DC bias voltage of a wafer in a chamber comprises an electrical coupling, a first filter, a second filter. The electrical coupling receives a probe for measuring the DC bias voltage in the chamber. The probe is disposed within the chamber. A first filter, coupled to the electrical coupling, is disposed within the chamber. A second filter, coupled to the first filter, is disposed outside the chamber.

摘要翻译： 用于测量腔室中的晶片的DC偏置电压的装置包括电耦合，第一滤波器，第二滤波器。 电耦合接收用于测量腔室中的DC偏置电压的探针。 探头设置在腔室内。 耦合到电耦合的第一滤波器设置在室内。 耦合到第一过滤器的第二过滤器设置在室外。

公开(公告)号：US20110021031A1

公开(公告)日：2011-01-27

申请号：US12740091

申请日：2008-10-27

申请人： Travis R. Taylor ,  Mukund Srinivasan ,  Bobby Kadkhodayan ,  K.Y. Ramanujam ,  Biljana Mikijelj ,  Shanghua Wu

发明人： Travis R. Taylor ,  Mukund Srinivasan ,  Bobby Kadkhodayan ,  K.Y. Ramanujam ,  Biljana Mikijelj ,  Shanghua Wu

IPC分类号： H01L21/3065 ,  C23F1/08 ,  C23F1/00 ,  B29C43/02

CPC分类号： C04B35/593 ,  C04B2235/3206 ,  C04B2235/3418 ,  C04B2235/72 ,  C04B2235/77 ,  H01J37/32467 ,  H01L21/3065

摘要： A method of increasing mean time between cleans of a plasma etch chamber and chamber parts lifetimes is provided. Semiconductor substrates are plasma etched in the chamber while using at least one sintered silicon nitride component exposed to ion bombardment and/or ionized halogen gas. The sintered silicon nitride component includes high purity silicon nitride and a sintering aid consisting of silicon dioxide. A plasma processing chamber is provided including the sintered silicon nitride component. A method of reducing metallic contamination on the surface of a silicon substrate during plasma processing is provided with a plasma processing apparatus including one or more sintered silicon nitride components. A method of manufacturing a component exposed to ion bombardment and/or plasma erosion in a plasma etch chamber, comprising shaping a powder composition consisting of high purity silicon nitride and silicon dioxide and densifying the shaped component.

摘要翻译： 提供了一种增加等离子体蚀刻室清洁之间的平均时间和室部件寿命的方法。 在使用暴露于离子轰击和/或电离卤素气体的至少一种烧结氮化硅组件的同时，半导体衬底在腔室中进行等离子体蚀刻。 烧结氮化硅组分包括高纯度氮化硅和由二氧化硅组成的烧结助剂。 提供了包括烧结氮化硅组分的等离子体处理室。 提供了一种在等离子体处理期间减少硅衬底表面上的金属污染的方法，该等离子体处理装置包括一个或多个烧结氮化硅组分。 一种在等离子体蚀刻室中制造暴露于离子轰击和/或等离子体侵蚀的部件的方法，包括使由高纯度氮化硅和二氧化硅组成的粉末组合物成形并致密化成形部件。

公开(公告)号：US20100327413A1

公开(公告)日：2010-12-30

申请号：US12595234

申请日：2008-05-02

申请人： Jong Pil Lee ,  Seiji Kawaguchi ,  Camelia Rusu ,  Zhisong Huang ,  Mukund Srinivasan ,  Eric Hudson ,  Aaron Eppler

发明人： Jong Pil Lee ,  Seiji Kawaguchi ,  Camelia Rusu ,  Zhisong Huang ,  Mukund Srinivasan ,  Eric Hudson ,  Aaron Eppler

IPC分类号： H01L29/00 ,  H01L21/3065 ,  C23F1/08 ,  H01L21/306

CPC分类号： H01L21/31144 ,  H01L21/31122

摘要： A method for opening a carbon-based hardmask layer formed on an etch layer over a substrate is provided. The hardmask layer is disposed below a patterned mask. The substrate is placed in a plasma processing chamber. The hardmask layer is opened by flowing a hardmask opening gas including a COS component into the plasma chamber, forming a plasma from the hardmask opening gas, and stopping the flow of the hardmask opening gas. The hardmask layer may be made of amorphous carbon, or made of spun-on carbon, and the hardmask opening gas may further include O2.

摘要翻译： 提供了一种用于打开形成在衬底上的蚀刻层上的碳基硬掩模层的方法。 硬掩模层设置在图案化掩模下方。 将基板放置在等离子体处理室中。 通过将包括COS组分的硬掩模开口气体流入等离子体室来打开硬掩模层，从硬掩模开口气体形成等离子体，并阻止硬掩模开口气体的流动。 硬掩模层可以由无定形碳制成，或由旋涂碳制成，并且硬掩模开口气体还可以包括O 2。