公开(公告)号：US5815354A

公开(公告)日：1998-09-29

申请号：US821497

申请日：1997-03-21

申请人： George Maria Braceras ,  John Connor ,  Donald Albert Evans

发明人： George Maria Braceras ,  John Connor ,  Donald Albert Evans

IPC分类号： H02H9/04 ,  H02H9/00

CPC分类号： H02H9/046

摘要： An off-chip receiver circuit for interfacing an integrated circuit of a 2.5 Volt CMOS technology to a 3.3 Volt LVTTL bus. The off-chip receiver includes protection circuitry for preventing overstressing of the gate oxide caused by undershoot/overshoot peaks of -1 volt to 6 volts on the input.

摘要翻译： 用于将2.5伏CMOS技术的集成电路与3.3伏的LVTTL总线接口的片外接收器电路。 片外接收器包括用于防止由输入端上的-1伏至6伏特的下冲/过冲峰值引起的栅极氧化物的过应力的保护电路。

公开(公告)号：US5929667A

公开(公告)日：1999-07-27

申请号：US872374

申请日：1997-06-10

申请人： Wagdi W. Abadeer ,  George Maria Braceras ,  John Connor ,  Donald Albert Evans

发明人： Wagdi W. Abadeer ,  George Maria Braceras ,  John Connor ,  Donald Albert Evans

IPC分类号： H03K19/003 ,  H03K3/00

CPC分类号： H03K19/00315

摘要： A CMOS off-chip driver circuit and a method of operating the circuit are provided. The circuit has two pull-down transistors and two pull-up transistors, each pull-up transistor has a gate. A voltage source provides voltage at a logic-high output voltage of approximately 3.3 volts. An output terminal is provided. Initially, a logic-low output voltage is applied to the gate of each of the two pull-up transistors. A condition is detected in which the voltage of the output terminal is greater than a predetermined threshold voltage. The predetermined threshold voltage is between approximately 2.5 volts and approximately 3.3 volts. The voltage applied to the gate of each of the pull-up transistors is raised to an intermediate level that is greater than the logic-low output voltage and less than the logic-high output voltage while the condition is detected. The intermediate level may be approximately 1.5 volts. A clamping mechanism is provided for sinking current from the output terminal to the voltage source, when the voltage of the output terminal is greater than the logic-high output voltage. The clamping mechanism sources current to the output terminal from a ground conductor that provides the logic-low output voltage to the pull-down transistor, when the voltage of the output terminal is less than the logic-low output voltage.

摘要翻译： 提供CMOS片外驱动电路和操作电路的方法。 该电路具有两个下拉晶体管和两个上拉晶体管，每个上拉晶体管都有一个栅极。 电压源以大约3.3伏特的逻辑高输出电压提供电压。 提供输出端子。 最初，将两个上拉晶体管中的每一个的栅极施加逻辑低输出电压。 检测出输出端子的电压大于预定阈值电压的条件。 预定的阈值电压在大约2.5伏和大约3.3伏之间。 在检测到条件时，施加到每个上拉晶体管的栅极的电压升高到大于逻辑低输出电压并小于逻辑高输出电压的中间电平。 中间电平可以是大约1.5伏特。 当输出端子的电压大于逻辑高输出电压时，提供钳位机构用于将电流从输出端子吸收到电压源。 当输出端子的电压小于逻辑低输出电压时，钳位机构将电流从提供逻辑低输出电压的接地导体输出到下拉晶体管。

公开(公告)号：US07291399B2

公开(公告)日：2007-11-06

申请号：US10821760

申请日：2004-04-09

申请人： Samuel Kaplan ,  Santokh Badesha ,  Mark Amico ,  Alexander Klymachyov ,  Johan Marien van der Werf ,  Peter MHM Peeters ,  John Connor ,  Peter Karran ,  Louis D. Fratangelo ,  Mark John Lillie

发明人： Samuel Kaplan ,  Santokh Badesha ,  Mark Amico ,  Alexander Klymachyov ,  Johan Marien van der Werf ,  Peter MHM Peeters ,  John Connor ,  Peter Karran ,  Louis D. Fratangelo ,  Mark John Lillie

IPC分类号： G03G13/20

CPC分类号： G03G15/2025 ,  G03G15/2057 ,  Y10T428/3154 ,  Y10T428/31663

摘要： Disclosed is a fuser member comprising a substrate, a layer thereover comprising a polymer or an elastomer, and, on the layer, a coating including mercapto- and amino-functionalities comprising from about 0.05 mole percent to about 1.00 mole percent mercapto groups and from about 0.0001 mole percent to about 0.06 mole percent amino groups, wherein the ratio of mercapto to amino mole percent values is at least 2. The layer preferably is a fluoropolymer or fluoroelastomer filled with a metal oxide (CuO, Al2O3, etc.).

摘要翻译： 公开了一种定影器构件，其包括基底，其上包含聚合物或弹性体的层，并且在该层上，包含巯基和氨基官能团的涂层，其包含约0.05摩尔％至约1.00摩尔％的巯基和约 0.0001摩尔％至约0.06摩尔％的氨基，其中巯基与氨基摩尔百分比的比值至少为2.该层优选为填充有金属氧化物（CuO，Al 2 O 3）的含氟聚合物或含氟弹性体 > O 3等）。

公开(公告)号：US06278339B1

公开(公告)日：2001-08-21

申请号：US09735679

申请日：2000-12-13

申请人： Wagdi W. Abadeer ,  John Connor ,  Patrick R. Hansen

发明人： Wagdi W. Abadeer ,  John Connor ,  Patrick R. Hansen

IPC分类号： H03H738

摘要： An impedance matching system and a network for impedance matching at a driver circuit output for high frequency input-output devices. The impedance matching network comprises an adjustable-length transmission line having a length adjusted in proportion to the magnitude of transients on the driver circuit output and an input impedance, which is purely reactive, and is a function of its length. The purpose of the adjustable-length transmission line is to reduce transient voltages by providing a matching impedance for the reactive component of the impedance of the receiver circuit to the driver circuit. In the preferred embodiment, the impedance matching network comprises two parallel conductive lines formed on the system card, shorted by a movable stub, and connected in parallel to the driver circuit. Optionally, the impedance matching network further comprises a control circuit which detects overshoots and undershoots on the driver circuit output and provides a control current proportional to the magnitude of overshoots and undershoots to an electromagnetic adjustment mechanism which provides a linear adjustment to the moveable stub proportional to the control current.

公开(公告)号：US4740028A

公开(公告)日：1988-04-26

申请号：US937062

申请日：1986-11-05

申请人： John Connor

发明人： John Connor

IPC分类号： B60J3/02

CPC分类号： B60J3/0282

摘要： Sunvisors provided with vanity mirrors usually have the mirror, with or without illumination, fixed to the upper surface of the visor when in the stowed position, and to avoid undesirable reflections a cover is sometimes provided. Also, various switches are provided to control energization of the lighting means when present. The invention simplifies this kind of visor by arranging that the mirror is carried by a hinge (7b) near the lower margins of the visor to open out therefrom downwardly from a stowed position facing into a recess (11) in the upper surface of the visor. The lower edge of the visor may be relieved as at (12) to maximize the hingeing angle of the mirror so as to achieve compactness while satisfying visor safety requirements. The wire frame (7) of the visor may be joggled inwards at (7a) and (8a) to provide hinge pins and electrical connections (7b) and (8b) for the visor.

摘要翻译： PCT No.PCT / GB86 / 00111 Sec。 371日期：1986年11月5日 102（e）日期1986年11月5日PCT Filted Mar 3，1986 PCT Pub。 出版物WO86 / 05146 日期为1986年9月12日。设有梳妆镜的管家通常具有镜子，有或没有照明，在收纳位置时固定在遮阳板的上表面，并且为了避免不必要的反射，有时会提供盖子。 此外，提供各种开关以控制当存在时照明装置的通电。 本发明通过将镜子布置在靠近遮阳板的下边缘处的铰链（7b）来简化这种遮阳板，以便从面向在遮阳板的上表面中的凹槽（11）的收起位置向下打开 。 如（12）所示，遮阳板的下边缘可以减轻以最大化反射镜的铰接角度，以便在满足遮阳板安全要求的同时实现紧凑性。 在（7a）和（8a）处，遮阳板的线框架（7）可向内倾斜，以提供用于遮阳板的铰链销和电连接（7b）和（8b）。

公开(公告)号：US09076111B2

公开(公告)日：2015-07-07

申请号：US13375883

申请日：2010-06-02

申请人： Philippe Delorme ,  Vincent Petit ,  James Simonelli ,  Barry Coflan ,  Scott Henneberry ,  Ronald Schoop ,  Jean-Louis Bergerand ,  Gregory Allen Thompson ,  Cyril Perducat ,  Philip E. London ,  John Connor

发明人： Philippe Delorme ,  Vincent Petit ,  James Simonelli ,  Barry Coflan ,  Scott Henneberry ,  Ronald Schoop ,  Jean-Louis Bergerand ,  Gregory Allen Thompson ,  Cyril Perducat ,  Philip E. London ,  John Connor

IPC分类号： G06F15/16 ,  G06Q10/06

CPC分类号： G05B15/02 ,  F24F11/30 ,  F24F11/62 ,  G06Q10/06 ,  H02J3/00 ,  H04L67/02 ,  Y02P80/10 ,  Y02P90/82 ,  Y02P90/86

摘要： An integrated solution strategy that integrates multiple domains together in a seamless and standardized way for increasing a users control over facilities and equipment. This integrated approach can lead to a reduction of energy usage, more efficient energy usage, increased safety, health, and security of a facility and its occupants, optimized production in industrial settings, and associated and other economic advantages. Accurate, reliable information about a facility or equipment is essential to making timely, informed decisions. Enhanced automation provides a reliable means of collecting and assembling a variety of operating data and archiving that data into a central database for evaluation, reporting, forecasting, and negotiation with resource marketers.

摘要翻译： 集成的解决方案战略，以一种无缝和标准化的方式将多个域集成在一起，以增加用户对设施和设备的控制。 这种综合方法可以减少能源消耗，更有效的能源使用，增加设施及其居住者的安全性，健康和安全性，优化工业环境中的生产以及相关的经济优势。 有关设施或设备的准确，可靠的信息对于及时做出明智的决定至关重要。 增强的自动化提供了收集和组合各种操作数据的可靠方法，并将该数据归档到中央数据库中，以便与资源营销人员进行评估，报告，预测和协商。

公开(公告)号：US20120131217A1

公开(公告)日：2012-05-24

申请号：US13375883

申请日：2010-06-02

申请人： Philippe Delorme ,  Vincent Petit ,  James Simonelli ,  Barry Coflan ,  Scott Henneberry ,  Ronald Schoop ,  Jean-Louis Bergerand ,  Gregory Allen Thompson ,  Cyril Perducat ,  Philip E. London ,  John Connor

发明人： Philippe Delorme ,  Vincent Petit ,  James Simonelli ,  Barry Coflan ,  Scott Henneberry ,  Ronald Schoop ,  Jean-Louis Bergerand ,  Gregory Allen Thompson ,  Cyril Perducat ,  Philip E. London ,  John Connor

IPC分类号： G06F15/16

CPC分类号： G05B15/02 ,  F24F11/30 ,  F24F11/62 ,  G06Q10/06 ,  H02J3/00 ,  H04L67/02 ,  Y02P80/10 ,  Y02P90/82 ,  Y02P90/86

摘要： An integrated solution strategy that integrates multiple domains together in a seamless and standardized way for increasing a users control over facilities and equipment. This integrated approach can lead to a reduction of energy usage, more efficient energy usage, increased safety, health, and security of a facility and its occupants, optimized production in industrial settings, and associated and other economic advantages. Accurate, reliable information about a facility or equipment is essential to making timely, informed decisions. Enhanced automation provides a reliable means of collecting and assembling a variety of operating data and archiving that data into a central database for evaluation, reporting, forecasting, and negotiation with resource marketers.

摘要翻译： 集成的解决方案战略，以一种无缝和标准化的方式将多个域集成在一起，以增加用户对设施和设备的控制。 这种综合方法可以减少能源消耗，更有效的能源使用，增加设施及其居住者的安全性，健康和安全性，优化工业环境中的生产以及相关的经济优势。 有关设施或设备的准确，可靠的信息对于及时做出明智的决定至关重要。 增强的自动化提供了收集和组合各种操作数据的可靠方法，并将该数据归档到中央数据库中，以便与资源营销人员进行评估，报告，预测和协商。

公开(公告)号：US20050042702A1

公开(公告)日：2005-02-24

申请号：US10931956

申请日：2004-09-01

申请人： John Connor ,  Steven Birken ,  Galina Kovalevskaya

发明人： John Connor ,  Steven Birken ,  Galina Kovalevskaya

IPC分类号： G01N33/53 ,  C07K16/26 ,  C12N15/02 ,  G01N33/577 ,  G01N33/76

CPC分类号： G01N33/76 ,  C07K16/26 ,  G01N33/57434 ,  G01N33/57449 ,  G01N2333/59 ,  G01N2800/368 ,  Y10S436/814 ,  Y10S436/818

摘要： The present invention provides a method of predicting pregnancy outcome in a subject by determining the amount of an early pregnancy associated molecular isoform of hCG in a sample. The present invention further provides a method for determining the amount of early pregnancy associated molecular isoforms of human chorionic gonadotropin (hCG) in a sample. The present invention also provides a diagnostic kit for determining the amount of early pregnancy associated hCG in a sample. The present invention additionally provides an antibody which specifically binds to an early pregnancy associated molecular isoform of human chorionic gonadotropin. Finally, the present invention provides methods for detecting trophoblast or non-trophoblast malignancy in a sample.

摘要翻译： 本发明提供了通过确定样品中hCG的早期妊娠相关分子同种型的量来预测受试者的妊娠结局的方法。 本发明还提供了一种用于确定样品中人绒毛膜促性腺激素（hCG）的早期妊娠相关分子同种型的量的方法。 本发明还提供了用于确定样品中早期妊娠相关hCG的量的诊断试剂盒。 本发明另外提供了与人绒毛膜促性腺激素的早期怀孕相关分子同种型特异性结合的抗体。 最后，本发明提供了检测样品中滋养层细胞或非滋养层恶性肿瘤的方法。

公开(公告)号：US5793592A

公开(公告)日：1998-08-11

申请号：US855187

申请日：1997-05-13

申请人： Robert D. Adams ,  George M. Braceras ,  John Connor ,  Donald A. Evans

发明人： Robert D. Adams ,  George M. Braceras ,  John Connor ,  Donald A. Evans

IPC分类号： H03K17/16 ,  H02H3/20

CPC分类号： H03K17/162

摘要： A topology for arranging a plurality of transistors between a signal source and an off-chip receiver, using a single power supply voltage. A pass through NFET has a gate controlled by a network comprised of two transistors arrayed between the power supply voltage and the drain of the NFET, which limits overshoots to the power supply voltage and reduces undershoots. Further reduction of undershoots is accomplished by an additional network of transistors, optimally including a PFET in series with the pass through NFET.

摘要翻译： 一种用于使用单个电源电压在信号源和片外接收器之间布置多个晶体管的拓扑。 通过NFET的通过栅极由网络控制，该网络由排列在电源电压和NFET的漏极之间的两个晶体管组成，其将过冲限制到电源电压并降低下冲。 通过附加的晶体管网络实现进一步减少下冲，最佳地包括与通过NFET串联的PFET。

公开(公告)号：US07496398B2

公开(公告)日：2009-02-24

申请号：US10260719

申请日：2002-09-27

申请人： Morgan W. Nields ,  John Connor ,  Curtis Daly

发明人： Morgan W. Nields ,  John Connor ,  Curtis Daly

IPC分类号： A61B6/02

CPC分类号： A61B6/502 ,  A61B6/0435 ,  A61B6/4417 ,  A61B6/463 ,  A61B6/465 ,  A61B6/469 ,  A61B6/5247 ,  A61B8/0825 ,  A61B8/406 ,  A61B8/4416 ,  A61B8/463 ,  A61B8/464 ,  A61B8/465 ,  A61B8/467 ,  A61B8/469 ,  A61B8/5238 ,  Y10S128/915 ,  Y10S128/916

摘要： The present invention provides for x-ray imaging and ultrasound imaging of a body region of interest in a spatially correlatable manner. The resultant x-ray and ultrasound images may be combinatively employed to provide three-dimensional information regarding a location of interest within the body, and is particularly apt for use in the analysis/biopsy of potential lesions and suspicious masses in a female breast. The invention provides for direct body contact by an ultrasound imaging head, as well as targeted ultrasound imaging of a selected portion of the region from which x-ray images are obtained. A user interface system facilitates various procedures including ultrasound guided needle biopsy procedures.

摘要翻译： 本发明以空间可相关的方式提供感兴趣的身体区域的X射线成像和超声成像。 可以组合使用所得的X射线和超声图像以提供关于身体内的感兴趣位置的三维信息，并且特别适合用于女性乳房中潜在损伤和可疑肿块的分析/活检。 本发明提供了通过超声成像头的直接身体接触以及从其获得X射线图像的区域的选定部分的目标超声成像。 用户界面系统促进包括超声引导针活检程序在内的各种程序。