公开(公告)号：US11700731B2

公开(公告)日：2023-07-11

申请号：US17347652

申请日：2021-06-15

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Il-Woo Kim ,  Sang-Ho Rha ,  Byoung-Deog Choi ,  Ik-Soo Kim ,  Min-Jae Oh

IPC: H10B43/27 ,  H01L21/28 ,  H01L21/67 ,  H01L21/8234 ,  H10B43/35

CPC classification number: H10B43/27 ,  H01L21/67178 ,  H01L21/823487 ,  H01L29/40117 ,  H10B43/35 ,  H01L2924/1438

Abstract: A method of manufacturing a vertical memory device includes forming a first sacrificial layer on a substrate, the first sacrificial layer including a first insulating material, forming a mold including an insulation layer and a second sacrificial layer alternately and repeatedly stacked on the first sacrificial layer, the insulation layer and the second sacrificial layer including second and third insulating materials, respectively, different from the first insulating material, forming a channel through the mold and the first sacrificial layer, forming an opening through the mold and the first sacrificial layer to expose an upper surface of the substrate, removing the first sacrificial layer through the opening to form a first gap, forming a channel connecting pattern to fill the first gap, and replacing the second sacrificial layer with a gate electrode.

公开(公告)号：US11348938B2

公开(公告)日：2022-05-31

申请号：US16446028

申请日：2019-06-19

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Il-Woo Kim ,  Sang-Gi An ,  Hyun-Gon Pyo ,  Ik-Soo Kim ,  Hee-Sook Park ,  Ji-Woon Im

IPC: H01L21/336 ,  H01L27/11582 ,  H01L21/311 ,  H01L27/11565

Abstract: In a method of manufacturing a vertical memory device, a first sacrificial layer including a nitride is formed on a substrate. A mold including an insulation layer and a second sacrificial layer alternately and repeatedly stacked on the first sacrificial layer is formed. The insulation layer and the second sacrificial layer include a first oxide and a second oxide, respectively. A channel is formed through the mold and the first sacrificial layer. An opening is formed through the mold and the first sacrificial layer to expose an upper surface of the substrate. The first sacrificial layer is removed through the opening to form a first gap. A channel connecting pattern is formed to fill the first gap. The second sacrificial layer is replaced with a gate electrode.

公开(公告)号：US10091599B2

公开(公告)日：2018-10-02

申请号：US15278549

申请日：2016-09-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Won-Gi Lee ,  Ik-Soo Kim ,  Young-Joon Oh ,  Yang-Wook Kim ,  Jung-Hoon Park

IPC: H04R25/00 ,  H04R29/00 ,  H04R3/00 ,  G06F3/16 ,  H04R1/32 ,  H04S7/00 ,  G06F3/0484 ,  G06F3/0488

Abstract: A portable terminal, a hearing aid, and a method of indicating the position of a sound source in the portable terminal are provided. The method includes receiving sound signals of a plurality of sound sources, determining respective distances between the plurality of sound sources and the portable terminal, and respective directions of the plurality of sound sources from the portable terminal, based on the received sound signals of the plurality of sound sources, determining positions of the plurality of sound sources on the touch screen based on the determined distances and directions of the plurality of sound sources, and displaying the determined positions of the plurality of sound sources on the touch screen.

公开(公告)号：US20130302966A1

公开(公告)日：2013-11-14

申请号：US13942149

申请日：2013-07-15

Applicant: Samsung Electronics Co., Ltd.

Inventor： Gyu-Hwan Oh ,  Sung-Lae Cho ,  Byoung-Jae Bae ,  Ik-Soo Kim ,  Dong-Hyun Im ,  Doo-Hwan Park ,  Kyoung-Ha Eom ,  Sung-Un Kwon ,  Chul-Ho Shin ,  Sang-Sup Jeong

IPC: H01L45/00

CPC classification number: H01L45/1683 ,  H01L27/2463 ,  H01L45/06

Abstract: A conductive pattern on a substrate is formed. An insulating layer having an opening exposing the conductive pattern is formed. A bottom electrode is formed on the conductive pattern and a first sidewall of the opening. A spacer is formed on the bottom electrode and a second sidewall of the opening. The spacer and the bottom electrode are formed to be lower than a top surface of the insulating layer. A data storage plug is formed on the bottom electrode and the spacer. The data storage plug has a first sidewall aligned with a sidewall of the bottom electrode and a second sidewall aligned with a sidewall of the spacer. A bit line is formed on the data storage plug.

Abstract translation: 形成基板上的导电图案。 形成具有露出导电图案的开口的绝缘层。 底部电极形成在导电图案和开口的第一侧壁上。 在底部电极和开口的第二侧壁上形成间隔物。 间隔件和底部电极形成为低于绝缘层的顶表面。 数据存储插头形成在底部电极和间隔件上。 数据存储插头具有与底部电极的侧壁对准的第一侧壁和与间隔件的侧壁对准的第二侧壁。 在数据存储插头上形成位线。