SEMICONDUCTOR DEVICE INCLUDING A FIELD EFFECT TRANSISTOR

    公开(公告)号:US20210143144A1

    公开(公告)日:2021-05-13

    申请号:US17154282

    申请日:2021-01-21

    摘要: A semiconductor device includes a substrate having a plurality of active patterns. A plurality of gate electrodes intersects the plurality of active patterns. An active contact is electrically connected to the active patterns. A plurality of vias includes a first regular via and a first dummy via. A plurality of interconnection lines is disposed on the vias. The plurality of interconnection lines includes a first interconnection line disposed on both the first regular via and the first dummy via. The first interconnection line is electrically connected to the active contact through the first regular via. Each of the vias includes a via body portion and a via barrier portion covering a bottom surface and sidewalls of the via body portion. Each of the interconnection lines includes an interconnection line body portion and an interconnection line barrier portion covering a bottom surface and sidewalls of the interconnection line body portion.

    Semiconductor device including a field effect transistor

    公开(公告)号:US10332870B2

    公开(公告)日:2019-06-25

    申请号:US15870143

    申请日:2018-01-12

    摘要: A semiconductor device includes a substrate having a plurality of active patterns. A plurality of gate electrodes intersects the plurality of active patterns. An active contact is electrically connected to the active patterns. A plurality of vias includes a first regular via and a first dummy via. A plurality of interconnection lines is disposed on the vias. The plurality of interconnection lines includes a first interconnection line disposed on both the first regular via and the first dummy via. The first interconnection line is electrically connected to the active contact through the first regular via. Each of the vias includes a via body portion and a via barrier portion covering a bottom surface and sidewalls of the via body portion. Each of the interconnection lines includes an interconnection line body portion and an interconnection line barrier portion covering a bottom surface and sidewalls of the interconnection line body portion.

    Integrated circuit including asymmetric power line and method of designing the same

    公开(公告)号:US11755809B2

    公开(公告)日:2023-09-12

    申请号:US17458948

    申请日:2021-08-27

    摘要: An integrated circuit is provided. The integrated circuit includes a first cell that has a first height and is arranged in a first row which extends in a first direction; a second cell that has a second height and is arranged in a second row which extends in the first direction and is adjacent to the first row, wherein the second cell is adjacent to the first cell in a second direction perpendicular to the first direction; and a power line that extends in the first direction, is arranged on a boundary between the first cell and the second cell, and is configured to supply power to the first cell and the second cell. The first cell overlaps a first width of the power line along the second direction and the second cell overlaps a second width of the power line along the second direction, and the first width and the second width are different from each other.

    Semiconductor device including a field effect transistor

    公开(公告)号:US11557585B2

    公开(公告)日:2023-01-17

    申请号:US17154282

    申请日:2021-01-21

    摘要: A semiconductor device includes a substrate having a plurality of active patterns. A plurality of gate electrodes intersects the plurality of active patterns. An active contact is electrically connected to the active patterns. A plurality of vias includes a first regular via and a first dummy via. A plurality of interconnection lines is disposed on the vias. The plurality of interconnection lines includes a first interconnection line disposed on both the first regular via and the first dummy via. The first interconnection line is electrically connected to the active contact through the first regular via. Each of the vias includes a via body portion and a via barrier portion covering a bottom surface and sidewalls of the via body portion. Each of the interconnection lines includes an interconnection line body portion and an interconnection line barrier portion covering a bottom surface and sidewalls of the interconnection line body portion.

    Display apparatus
    18.
    发明授权

    公开(公告)号:US11262617B2

    公开(公告)日:2022-03-01

    申请号:US17130313

    申请日:2020-12-22

    IPC分类号: G02F1/13357

    摘要: Provided is a display apparatus including a display panel, a light-emitting assembly disposed behind the display panel and including a light-emitting diode (LED) configured to emit light in a rear direction, and a reflective assembly disposed behind the light-emitting assembly and configured to reflect light emitted from the light-emitting assembly toward the display panel, wherein the reflective assembly includes a first area corresponding to the LED, and a second area adjacent to the first area, wherein at least one of a diffusion amount and a reflection amount of light exiting the second area is different from a corresponding one of a diffusion amount and a reflection amount of light exiting the first area.

    Semiconductor device
    19.
    发明授权

    公开(公告)号:US11101803B2

    公开(公告)日:2021-08-24

    申请号:US16820835

    申请日:2020-03-17

    摘要: A semiconductor device is provided. The semiconductor device includes first and second logic cells adjacent to each other on a substrate, and a mixed separation structure extending in a first direction between the first and second logic cells. Each logic cell includes first and second active fins that protrude from the substrate, the first and second active fins extending in a second direction intersecting the first direction and being spaced apart from each other in the first direction, and gate electrodes extending in the first direction and spanning the first and second active fins, and having a gate pitch. The mixed separation structure includes a first separation structure separating the first active fin of the first logic cell from the first active fin of the second logic cell; and a second separation structure on the first separation structure. A width of the first separation structure is greater than the gate pitch.

    DISPLAY APPARATUS
    20.
    发明申请

    公开(公告)号:US20210200027A1

    公开(公告)日:2021-07-01

    申请号:US17130313

    申请日:2020-12-22

    IPC分类号: G02F1/13357

    摘要: Provided is a display apparatus including a display panel, a light-emitting assembly disposed behind the display panel and including a light-emitting diode (LED) configured to emit light in a rear direction, and a reflective assembly disposed behind the light-emitting assembly and configured to reflect light emitted from the light-emitting assembly toward the display panel, wherein the reflective assembly includes a first area corresponding to the LED, and a second area adjacent to the first area, wherein at least one of a diffusion amount and a reflection amount of light exiting the second area is different from a corresponding one of a diffusion amount and a reflection amount of light exiting the first area.