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公开(公告)号：US11482296B2
公开(公告)日：2022-10-25
申请号：US16891336
申请日：2020-06-03
Applicant: SanDisk Technologies LLC
Inventor： Idan Alrod , Eran Sharon
Abstract: Technology for error correcting data stored in memory dies is disclosed. Codewords, which may contain data bits and parity bits, are stored on a memory die. The memory die is bonded to a control die through bond pads that allow communication between the memory die and the control die. The codewords are decoded at the control die based on the parity bits. If the control die successfully decodes a codeword, the control die may send the data bits but not the parity bits to a memory controller. By not sending the parity bits to the memory controller, substantial bandwidth is saved. Also, substantial power may be saved. For example, the interface between the control die and the memory controller could be a high speed interface.
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公开(公告)号：US10432232B2
公开(公告)日：2019-10-01
申请号：US15252753
申请日：2016-08-31
Applicant: SanDisk Technologies LLC
Inventor： Ran Zamir , Alexander Bazarsky , Eran Sharon , Idan Alrod
Abstract: A non-volatile memory system may be configured to generate a codeword with first-type parity bits and one or more second-type parity bits. If a storage location in which the codeword is to be stored includes one or more bad memory cells, the bit sequence of the codeword may be arranged so that at least some of the second-type parity bits are stored in the bad memory cells. During decoding, a first set of syndrome values may be determined for a first set of check nodes and a second set of syndrome values may be determined for a second set of check nodes. In some examples, a syndrome weight used for determining if convergence is achieved may be calculated using check nodes that are unassociated with the second-type parity bits.
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公开(公告)号：US10372536B2
公开(公告)日：2019-08-06
申请号：US15921165
申请日：2018-03-14
Applicant: SanDisk Technologies LLC
Inventor： Idan Alrod , Eran Sharon , Alon Eyal , Liang Pang , Evgeny Mekhanik
IPC: G11C16/28 , G06F11/10 , G11C16/04 , G11C16/08 , G11C16/10 , G11C16/26 , G11C16/34 , G11C29/52 , G11C11/56 , G11C16/32
Abstract: Techniques are provided for improving the accuracy of read operations of memory cells, where the threshold voltage of a memory cell can shift depending on when the read operation occurs. A memory cell is sensed by discharging a sense node into a bit line and detecting an amount of discharge at two sense times relative to a trip voltage. A bit of data is stored in first and second latches based on the two sense times, to provide first and second pages of data. The pages are evaluated using parity check equations and one of the pages which satisfies the most equations is selected. In another option, word line voltages are grounded and then floated to prevent coupling up of the word line. A weak pulldown to ground can gradually discharge a coupled up voltage of the word lines.
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公开(公告)号：US10230395B2
公开(公告)日：2019-03-12
申请号：US15475638
申请日：2017-03-31
Applicant: SanDisk Technologies LLC
Inventor： Rami Rom , Idan Goldenberg , Alexander Bazarsky , Eran Sharon , Ran Zamir , Idan Alrod , Stella Achtenberg
Abstract: A storage device may program data differently for different memory areas of a memory. In some embodiments, the storage device may use different codebooks for different memory areas. In other embodiments, the storage device may modify bit orders differently for different memory areas. What codebook the storage device uses or what bit order modification the storage device performs for a particular memory area may depend on the bad storage locations specific to that memory area. Where different codebooks are used, optimal codebooks may be selected from a library, or codebooks may be modified based on the bad storage locations of the memory areas.
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公开(公告)号：US10229744B2
公开(公告)日：2019-03-12
申请号：US15816546
申请日：2017-11-17
Applicant: SanDisk Technologies LLC
Inventor： Deepanshu Dutta , Idan Alrod , Huai-Yuan Tseng , Amul Desai , Jun Wan , Ken Cheah , Sarath Puthenthermadam
IPC: G11C16/04 , G11C16/34 , G11C16/26 , G11C16/16 , G11C8/08 , G11C16/08 , G11C29/02 , G11C11/56 , G11C29/12
Abstract: Techniques are provided for improving the accuracy of read operations of memory cells, where the threshold voltage of the memory cells can shift depending on the coupled up state of the word lines. In one approach, for a read operation, a representative word line voltage in a block is detected and a corresponding set of read voltages is selected. In another approach, a pre-read voltage pulse is applied to a selected word line in response to a read command, just prior to reading the selected cells. In another approach, a voltage pulse is periodically applied to each word line in a block to provide the word lines in a coupled up state. In another approach, a soft erase is performed after a read operation to prevent coupling up of the word lines.
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Patent Agency Ranking
公开(公告)号：US10133645B2
公开(公告)日：2018-11-20
申请号：US15414442
申请日：2017-01-24
Applicant: SanDisk Technologies LLC
Inventor： Ofer Shapira , Idan Alrod , Eran Sharon
Abstract: Data is programmed in a respective block of non-volatile three dimensional memory. The block contains a plurality of rows of subblocks, each row having S subblocks. Programming data in the respective block includes successively programming data in individual rows of the respective block. Programming data in each row is completed prior to programming data in a next row. Programming data in a row includes successively programming data in individual subblocks of the row, in a predefined order. The programming of data in each subblock is completed prior to programming data in a next subblock. While programming data in each individual subblock, a number of XOR signatures, sufficient in number to enable recovery from a short circuit that disables two or three word lines, are generated in volatile memory, and then copied to non-volatile memory prior to programming data in a next subblock in the respective block.
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公开(公告)号：US20180203763A1
公开(公告)日：2018-07-19
申请号：US15921184
申请日：2018-03-14
Applicant: SanDisk Technologies LLC
Inventor： Idan Alrod , Eran Sharon , Alon Eyal , Liang Pang , Evgeny Mekhanik
CPC classification number: G06F11/1068 , G06F11/08 , G06F11/10 , G11C11/5642 , G11C16/0483 , G11C16/08 , G11C16/10 , G11C16/26 , G11C16/32 , G11C16/3459 , G11C29/52 , G11C2207/2281
Abstract: Techniques are provided for improving the accuracy of read operations of memory cells, where the threshold voltage of a memory cell can shift depending on when the read operation occurs. A memory cell is sensed by discharging a sense node into a bit line and detecting an amount of discharge at two sense times relative to a trip voltage. A bit of data is stored in first and second latches based on the two sense times, to provide first and second pages of data. The pages are evaluated using parity check equations and one of the pages which satisfies the most equations is selected. In another option, word line voltages are grounded and then floated to prevent coupling up of the word line. A weak pulldown to ground can gradually discharge a coupled up voltage of the word lines.
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公开(公告)号：US10026486B1
公开(公告)日：2018-07-17
申请号：US15451186
申请日：2017-03-06
Applicant: SanDisk Technologies LLC
Inventor： Deepanshu Dutta , Idan Alrod , Huai-Yuan Tseng , Amul Desai , Jun Wan , Ken Cheah , Sarath Puthenthermadam
Abstract: Techniques are provided for improving the accuracy of read operations of memory cells, where the threshold voltage of the memory cells can shift depending on the coupled up state of the word lines. In one approach, for a read operation, a representative word line voltage in a block is detected and a corresponding set of read voltages is selected. In another approach, a pre-read voltage pulse is applied to a selected word line in response to a read command, just prior to reading the selected cells. In another approach, a voltage pulse is periodically applied to each word line in a block to provide the word lines in a coupled up state. In another approach, a soft erase is performed after a read operation to prevent coupling up of the word lines.
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公开(公告)号：US20180114580A1
公开(公告)日：2018-04-26
申请号：US15440185
申请日：2017-02-23
Applicant: SanDisk Technologies LLC
Inventor： Idan Alrod , Eran Sharon , Alon Eyal , Liang Pang , Evgeny Mekhanik
CPC classification number: G11C16/26 , G11C16/0483 , G11C16/08 , G11C16/3418 , G11C16/349 , G11C2211/563
Abstract: Techniques are provided for improving the accuracy of read operations of memory cells, where the threshold voltage of a memory cell can shift depending on when the read operation occurs. A command is issued for performing a conditioning operation which helps to transition the memory cells so that their threshold voltages are at predictable levels. In one approach, the conditioning operation is performed by applying a voltage pulse to one or more word lines in response to a trigger, such as detecting that a duration since a last sensing operation exceeds a threshold, detecting that a duration since a last performance of the conditioning operation exceeds a threshold, or a detecting that a read command has been issued. Moreover, the peak power consumption required to perform the conditioning operation can be reduced for various configurations of a memory device on one or more die.
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公开(公告)号：US10732847B2
公开(公告)日：2020-08-04
申请号：US16262125
申请日：2019-01-30
Applicant: SanDisk Technologies LLC
Inventor： Alexander Bazarsky , Grishma Shah , Idan Alrod , Eran Sharon
Abstract: A non-volatile memory system may include a non-volatile memory die storing a requested data set that a host requests to be read. In response to the host request, a copy of a data set may be retrieved from the non-volatile memory die without performing error correction on an entry identifying a physical address where the data set is stored. If the data set copy matches the requested data set, the data set copy may be sent to the host. If the data set copy does not match the requested data set, then error correction may be performed on a copy of the entry to identify the correct physical address where the requested data set is stored. A copy of the requested data set may then be retrieved and sent to the host.
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