公开(公告)号：US09099185B2

公开(公告)日：2015-08-04

申请号：US14136708

申请日：2013-12-20

Applicant: Seagate Technology LLC

Inventor： YoungPil Kim ,  Rodney Virgil Bowman ,  Dadi Setiadi ,  Wei Tian

IPC: G11C16/04 ,  G11C16/14 ,  G11C13/00

CPC classification number: G11C16/14 ,  G11C11/56 ,  G11C11/5628 ,  G11C13/004 ,  G11C13/0069 ,  G11C16/10 ,  G11C16/3495 ,  G11C2211/5641

Abstract: Method and apparatus for managing data in a memory, such as a flash memory array. In accordance with some embodiments, a memory cell is provided with a plurality of available programming states to accommodate multi-level cell (MLC) programming. A control circuit stores a single bit logical value to the memory cell using single level cell (SLC) programming to provide a first read margin between first and second available programming states. The control circuit subsequently stores a single bit logical value to the memory cell using virtual multi-level cell (VMLC) programming to provide a larger, second read margin between the first available programming state and a third available programming state.

Abstract translation: 用于管理诸如闪存阵列的存储器中的数据的方法和装置。 根据一些实施例，存储器单元被提供有多个可用的编程状态以适应多级单元（MLC）编程。 控制电路使用单电平单元（SLC）编程将单个位逻辑值存储到存储器单元，以在第一和第二可用编程状态之间提供第一读取裕度。 控制电路随后使用虚拟多电平单元（VMLC）编程将单个位逻辑值存储到存储器单元，以在第一可用编程状态和第三可用编程状态之间提供较大的第二读取余量。

公开(公告)号：US20130277806A1

公开(公告)日：2013-10-24

申请号：US13783929

申请日：2013-03-04

Applicant: SEAGATE TECHNOLOGY LLC

Inventor： Roger L. Hipwell, JR. ,  Dadi Setiadi

IPC: H01S5/022

CPC classification number: H01S5/02268 ,  G11B5/105 ,  G11B5/3173 ,  G11B2005/0021 ,  H01L21/6836 ,  H01L21/78 ,  H01S5/0201 ,  H01S5/02236 ,  H01S5/02252 ,  H01S5/0226 ,  H01S5/02272

Abstract: A wafer is formed having a plurality of laser-to-slider submount features on a first surface. An etching process is used to form scribe lines between the submounts on the first surface of the wafer. The wafer is separated at the scribe lines to form the submounts.

Abstract translation: 在第一表面上形成具有多个激光到滑动器底座特征的晶片。 蚀刻工艺用于在晶片的第一表面上的底座之间形成划线。 晶片在划线处分离以形成底座。

公开(公告)号：US08854772B1

公开(公告)日：2014-10-07

申请号：US13886780

申请日：2013-05-03

Applicant: Seagate Technology LLC

Inventor： Dadi Setiadi ,  Wei Tian ,  Young Pil Kim

IPC: G11B21/24 ,  H01L41/053 ,  G11B5/48 ,  B82Y30/00

CPC classification number: G11B5/4873 ,  B82Y30/00 ,  G11B5/483 ,  H01L41/0533 ,  H01L41/0815 ,  H01L41/314 ,  H01L41/332 ,  Y10S977/837

Abstract: A microactuator, for example for a disc drive, comprising a substrate, a sandwich structure on the substrate, and a passivation layer over the substrate and the sandwich structure. The sandwich structure has a bottom electrode formed from noble metal, a piezoelectric layer, and a top electrode formed from noble metal. The microactuator further has one or both of a bottom adhesion layer present between the bottom electrode and the passivation layer, and a top adhesion layer present between the top electrode and the passivation layer. That is, the microactuator may have only the bottom adhesion layer, only the top adhesion layer, or both the bottom adhesion layer and the top adhesion layer.

Abstract translation: 例如用于盘驱动器的微致动器，包括衬底，衬底上的夹层结构以及衬底上的钝化层和夹层结构。 夹心结构具有由贵金属形成的底部电极，压电层和由贵金属形成的顶部电极。 微致动器还具有存在于底部电极和钝化层之间的底部粘附层中的一个或两个，以及存在于顶部电极和钝化层之间的顶部粘合层。 也就是说，微致动器可以仅具有底部粘附层，仅具有顶部粘附层，或者仅具有底部粘合层和顶部粘合层。