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    SEMICONDUCTOR DEVICE AND DRIVING METHOD THEREOF
    11.
    发明申请
    SEMICONDUCTOR DEVICE AND DRIVING METHOD THEREOF 有权
    半导体器件及其驱动方法

    公开(公告)号：US20140328124A1

    公开(公告)日：2014-11-06

    申请号：US14333576

    申请日：2014-07-17

    Applicant: Semiconductor Energy Laboratory Co., Ltd.

    Inventor： Takuro Ohmaru

    IPC: G11C14/00 ,  G11C11/404

    CPC classification number: G11C14/0018 ,  G11C11/24 ,  G11C11/404 ,  G11C16/0416 ,  H01L21/84 ,  H01L27/0688 ,  H01L27/1052 ,  H01L27/10873 ,  H01L27/10894 ,  H01L27/10897 ,  H01L27/115 ,  H01L27/1156 ,  H01L27/1203 ,  H01L29/7869

    Abstract: The storage device includes a volatile first memory circuit and a nonvolatile second memory circuit which includes a transistor whose channel is formed in an oxide semiconductor layer. In the case of high-frequency driving, during a period when source voltage is applied, a data signal is input to and output from the first memory circuit, and during a part of a period when source voltage is supplied, which is before the supply of the source voltage is stopped, a data signal is input to the second memory circuit. In the case of low-frequency driving, during a period when source voltage is applied, a data signal is input to the second memory circuit, the data signal input to the second memory circuit is input to the first memory circuit, and the data signal input to the first memory circuit is output.

    Abstract translation: 存储装置包括易失性第一存储器电路和非易失性第二存储器电路，其包括其通道形成在氧化物半导体层中的晶体管。 在高频驱动的情况下，在施加电源电压的期间，数据信号被输入到第一存储电路并从第一存储电路输出，并且在供给源电压的期间的一部分期间 的源电压停止，数据信号被输入到第二存储电路。 在低频驱动的情况下，在施加电源电压的期间，将数据信号输入到第二存储电路，输入到第二存储电路的数据信号输入到第一存储电路，数据信号 输出到第一存储器电路的输入。

    SEMICONDUCTOR DEVICE
    12.
    发明申请
    SEMICONDUCTOR DEVICE 有权
    半导体器件

    公开(公告)号：US20140293711A1

    公开(公告)日：2014-10-02

    申请号：US14223071

    申请日：2014-03-24

    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

    Inventor： Kiyoshi Kato ,  Takuro Ohmaru ,  Yasuyuki Takahashi

    IPC: G11C7/12

    CPC classification number: G11C11/4091 ,  G11C11/401 ,  G11C11/4074

    Abstract: The first circuit has a function of retaining data in a first period during which a power supply voltage is supplied. The second circuit has functions of saving the data retained in the first circuit in the first period and retaining the data saved from the first circuit in a second period during which application of the power supply voltage is stopped. The third circuit has functions of saving the data retained in the second circuit in the second period and retaining the data saved from the second circuit in a third period during which application of the power supply voltage is stopped. The second circuit is capable of being written with the data for a shorter time than the third circuit. The third circuit is capable of maintaining the data for a longer time than the second circuit.

    Abstract translation: 第一电路具有在提供电源电压的第一时段中保持数据的功能。 第二电路具有在第一时间段内保存保留在第一电路中的数据的功能，并且在停止施加电源电压的第二周期中保持从第一电路保存的数据。 第三电路具有在第二时段中保存保留在第二电路中的数据的功能，并且在停止施加电源电压的第三周期中保留从第二电路保存的数据。 第二电路能够以比第三电路更短的时间写入数据。 第三电路能够保持数据比第二电路更长的时间。

    MEMORY DEVICE AND SEMICONDUCTOR DEVICE
    13.
    发明申请
    MEMORY DEVICE AND SEMICONDUCTOR DEVICE 有权
    存储器件和半导体器件

    公开(公告)号：US20140269013A1

    公开(公告)日：2014-09-18

    申请号：US14208428

    申请日：2014-03-13

    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

    Inventor： Naoaki Tsutsui ,  Atsuo Isobe ,  Wataru Uesugi ,  Takuro Ohmaru

    IPC: G11C11/24

    CPC classification number: G11C11/4093 ,  G11C11/24 ,  G11C11/401 ,  G11C11/403

    Abstract: A memory device includes a first memory circuit including a silicon transistor, a selection circuit including a silicon transistor, and a second memory circuit including oxide semiconductor transistors and a storage capacitor, in which one terminal of the storage capacitor is connected to a portion where two oxide semiconductor transistors are connected in series, an output of the second memory circuit is connected to a second input terminal of the selection circuit, and an input of the second memory circuit is connected to a first input terminal of the selection circuit or an output terminal of the first memory circuit.

    Abstract translation: 存储器件包括：第一存储器电路，包括硅晶体管，包括硅晶体管的选择电路和包括氧化物半导体晶体管和存储电容器的第二存储器电路，其中存储电容器的一个端子连接到两个 氧化物半导体晶体管串联连接，第二存储电路的输出连接到选择电路的第二输入端，第二存储电路的输入端连接到选择电路的第一输入端或输出端 的第一存储器电路。

    INTEGRATED CIRCUIT, METHOD FOR DRIVING THE SAME, AND SEMICONDUCTOR DEVICE
    14.
    发明申请
    INTEGRATED CIRCUIT, METHOD FOR DRIVING THE SAME, AND SEMICONDUCTOR DEVICE 有权
    集成电路，驱动它们的方法和半导体器件

    公开(公告)号：US20140226394A1

    公开(公告)日：2014-08-14

    申请号：US14257050

    申请日：2014-04-21

    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

    Inventor： Masami Endo ,  Takuro Ohmaru

    IPC: H03K3/356 ,  H03K21/40 ,  H03K21/02

    CPC classification number: H03K3/356008 ,  H03K3/012 ,  H03K21/023 ,  H03K21/403

    Abstract: An integrated circuit which can be switched to a resting state and can be returned from the resting state rapidly is provided. An integrated circuit whose power consumption can be reduced without the decrease in operation speed is provided. A method for driving the integrated circuit is provided. The integrated circuit includes a first flip-flop and a second flip-flop including a nonvolatile memory circuit. In an operating state in which power is supplied, the first flip-flop retains data. In a resting state in which supply of power is stopped, the second flip-flop retains data. On transition from the operating state into the resting state, the data is transferred from the first flip-flop to the second flip-flop. On return from the resting state to the operating state, the data is transferred from the second flip-flop to the first flip-flop.

    Abstract translation: 提供一种可以切换到静止状态并且可以从静止状态快速返回的集成电路。 提供一种能够在不降低运行速度的情况下降低功耗的集成电路。 提供了一种用于驱动集成电路的方法。 集成电路包括第一触发器和包括非易失性存储器电路的第二触发器。 在提供电力的操作状态下，第一触发器保持数据。 在停止供电的静止状态下，第二触发器保持数据。 在从操作状态转变到静止状态时，数据从第一触发器传送到第二触发器。 从静止状态返回到工作状态时，数据从第二触发器传送到第一触发器。

    MEMORY DEVICE AND SEMICONDUCTOR DEVICE
    15.
    发明申请
    MEMORY DEVICE AND SEMICONDUCTOR DEVICE 有权
    存储器件和半导体器件

    公开(公告)号：US20140204696A1

    公开(公告)日：2014-07-24

    申请号：US14160800

    申请日：2014-01-22

    Applicant: Semiconductor Energy Laboratory Co., Ltd.

    Inventor： Kiyoshi Kato ,  Takuro Ohmaru ,  Yasuyuki Takahashi

    IPC: G11C5/14

    CPC classification number: G11C11/22 ,  G11C11/24

    Abstract: Provided is a memory device with reduced overhead power. A memory device includes a first circuit retaining data in a first period during which a power supply voltage is supplied; a second circuit saving the data retained in the first circuit in the first period and retaining the data saved from the first circuit in a second period during which the power supply voltage is not supplied; and a third circuit saving the data retained in the second circuit in the second period and retaining the data saved from the second circuit in a third period during which the power supply voltage is not supplied. The third circuit includes a transistor in which a channel formation region is provided in an oxide semiconductor film and a capacitor to which a potential corresponding to the data is supplied through the transistor.

    Abstract translation: 提供了具有降低的架空功率的存储器件。 一种存储装置，包括：第一电路，在供给电源电压的第一期间保持数据; 第二电路在第一时段中保存保留在第一电路中的数据，并且在不提供电源电压的第二周期内保留从第一电路保存的数据; 以及第三电路，在第二时段中保存保留在第二电路中的数据，并且在不提供电源电压的第三周期内保持从第二电路保存的数据。 第三电路包括其中沟道形成区域设置在氧化物半导体膜中的晶体管和通过晶体管提供对应于数据的电位的电容器。

    Imaging device, module, electronic device, and method of operating the imaging device
    18.
    发明授权
    Imaging device, module, electronic device, and method of operating the imaging device 有权

    公开(公告)号：US10033952B2

    公开(公告)日：2018-07-24

    申请号：US15258011

    申请日：2016-09-07

    Applicant: Semiconductor Energy Laboratory Co., Ltd.

    Inventor： Takuro Ohmaru

    IPC: H04N5/335 ,  H04N5/378 ,  H01L27/146 ,  H04N5/359 ,  H04N5/369

    Abstract: An imaging device whose dynamic range can be wide with a simple structure is provided. In a circuit configuration and an operation method of the imaging device, whether a charge detection portion provided in a pixel is saturated with electrons is determined and an operation mode is changed depending on the determination result. First imaging data is captured first, and is read out in the case where the charge detection portion is not saturated with electrons. In the case where the charge detection portion is saturated with electrons, the saturation of the charge detection portion is eliminated and second imaging data is captured and read out.

    Imaging device, monitoring device, and electronic device
    19.
    发明授权
    Imaging device, monitoring device, and electronic device 有权

    公开(公告)号：US10021329B2

    公开(公告)日：2018-07-10

    申请号：US14806876

    申请日：2015-07-23

    Applicant: Semiconductor Energy Laboratory Co., Ltd.

    Inventor： Takuro Ohmaru

    IPC: H04N5/378 ,  H04N5/369 ,  H04N5/232 ,  H04N5/32 ,  H04N5/33

    CPC classification number: H04N5/3698 ,  H04N5/23241 ,  H04N5/32 ,  H04N5/332 ,  H04N5/369 ,  H04N5/378

    Abstract: An imaging device includes a pixel; a digital circuit; and an analog processing circuit including a constant current circuit, a current comparison circuit, and a control circuit. The pixel is capable of outputting differential data. The constant current circuit is capable of supplying a first current corresponding to the differential data, in accordance with a first control signal. The current comparison circuit is capable of supplying a second current that flows through the constant current circuit in accordance with a change in the differential data. The current comparison circuit has a function of setting a determination signal active depending on whether to supply the second current to the constant current circuit. The control circuit has a function of controlling the constant current circuit and the current comparison circuit to stop their functions as the determination signal becomes active. The digital circuit operates as the determination signal becomes active.

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