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    LTPS TFT having dual gate structure and method for forming LTPS TFT
    11.
    发明授权
    LTPS TFT having dual gate structure and method for forming LTPS TFT 有权
    具有双栅极结构的LTPS TFT和用于形成LTPS TFT的方法

    公开(公告)号：US09437435B2

    公开(公告)日：2016-09-06

    申请号：US14415607

    申请日：2014-11-14

    Applicant: SHENZHEN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD

    Inventor： Xiaoxiao Wang ,  Hsiang Chih Hsiao ,  Peng Du ,  Chang-I Su ,  Hongyuan Xu ,  Bo Sun

    IPC: H01L21/28 ,  H01L27/12 ,  H01L29/786 ,  H01L29/66 ,  H01L29/49 ,  H01L29/423

    CPC classification number: H01L21/28114 ,  H01L21/28035 ,  H01L27/1222 ,  H01L27/1288 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/6675 ,  H01L29/78603 ,  H01L29/78648 ,  H01L29/78672

    Abstract: The present invention proposes a low temperature poly-silicon thin-film transistor having a dual-gate structure and a method for forming the low temperature poly-silicon thin-film transistor. The low temperature poly-silicon thin-film transistor includes: a substrate, one or more patterned amorphous silicon (a-Si) layers, disposed in a barrier layer on the substrate, for forming a bottom gate, an NMOS disposed on the barrier layer, and a PMOS disposed on the barrier layer. The NMOS comprises a patterned gate electrode (GE) layer as a top gate, and the patterned GE layer and the bottom gate formed by the one or more patterned a-Si layers form a dual-gate structure. The present invention proposes a low temperature poly-silicon thin-film transistor with a more stabilized I-V characteristic, better driving ability, low power consumption, and higher production yield.

    Abstract translation: 本发明提出了一种具有双栅极结构的低温多晶硅薄膜晶体管和形成低温多晶硅薄膜晶体管的方法。 低温多晶硅薄膜晶体管包括：基板，设置在基板上的阻挡层中的一个或多个图案化非晶硅（a-Si）层，用于形成底栅，设置在势垒层上的NMOS 和设置在阻挡层上的PMOS。 NMOS包括作为顶栅的图案化栅电极（GE）层，并且由一个或多个图案化a-Si层形成的图案化GE层和底栅形成双栅结构。 本发明提出了具有更稳定的I-V特性，更好的驱动能力，低功耗和更高的产量的低温多晶硅薄膜晶体管。

    SUB-PIXEL STRUCTURE, LIQUID CRYSTAL DISPLAY DEVICE AND METHOD FOR REDUCING COLOUR SHIFT
    12.
    发明申请
    SUB-PIXEL STRUCTURE, LIQUID CRYSTAL DISPLAY DEVICE AND METHOD FOR REDUCING COLOUR SHIFT 有权
    子像素结构，液晶显示装置和减少颜色转换的方法

    公开(公告)号：US20150205177A1

    公开(公告)日：2015-07-23

    申请号：US14351157

    申请日：2014-02-19

    Applicant: SHENZHEN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.

    Inventor： Hongyuan Xu

    IPC: G02F1/1362 ,  G02F1/1343 ,  G02F1/1368

    CPC classification number: G02F1/136213 ,  G02F1/134309 ,  G02F1/13624 ,  G02F1/1368 ,  G02F2001/134345 ,  G09G3/3607 ,  G09G2320/0242 ,  G09G2320/028

    Abstract: The present application relates to a sub-pixel structure, a liquid crystal display device and a method for reducing color shift, the sub-pixel structure comprises a main area, a sub area and a signal wire, and the sub-pixel structure further comprises a first voltage dividing unit, the signal wire is connected to the main area and is connected to the sub area via the voltage dividing unit; the signal wire respectively provides different driving voltages for the main area and the sub area for reducing color shift in a liquid crystal display device. The present application has advantages on solving the color shift in relation to viewing angle in LCDs and greatly reducing cost.

    Abstract translation: 本发明涉及一种子像素结构，液晶显示装置和减少色移的方法，该子像素结构包括主区域，子区域和信号线，子像素结构还包括 第一分压单元，信号线连接到主区域，并经由分压单元连接到子区域; 信号线分别为主区域和子区域提供不同的驱动电压，以减少液晶显示装置中的色移。 本申请在解决与LCD中的视角相关的色移方面具有优点，并且大大降低了成本。

    Array substrate and manufacturing method for the same
    13.
    发明授权
    Array substrate and manufacturing method for the same 有权

    公开(公告)号：US10020301B2

    公开(公告)日：2018-07-10

    申请号：US15111442

    申请日：2016-06-12

    Applicant: Shenzhen China Star Optoelectronics Technology Co., Ltd.

    Inventor： Hongyuan Xu

    IPC: H01L21/70 ,  H01L27/088 ,  H01L27/32 ,  H01L29/40 ,  H01L29/423 ,  H01L29/45

    CPC classification number: H01L27/088 ,  H01L27/1288 ,  H01L27/3244 ,  H01L27/3248 ,  H01L29/401 ,  H01L29/4232 ,  H01L29/45

    Abstract: A manufacturing method for an array substrate is disclosed. The method includes: forming a gate electrode on a substrate; depositing a gate insulation layer, a semiconductor layer, a source-drain metal layer and a passivation layer on the gate electrode and the substrate, and through a mask process to perform a patterning process to the semiconductor layer, the source-drain metal layer and the passivation layer in order to form a semiconductor pattern, a source-drain pattern and a contact hole pattern; and forming an ITO pixel electrode on the passivation layer and the contact hole pattern. An array substrate is also disclosed. The present invention adopts one mask process to form the semiconductor pattern, the source-drain pattern and the contact hole pattern such that the process of the array substrate is reduced to three masks in order to reduce the manufacturing cost, reduce the operation time and increase the production efficiency.

    Array substrate and method of fabricating the same
    14.
    发明授权
    Array substrate and method of fabricating the same 有权

    公开(公告)号：US09899452B2

    公开(公告)日：2018-02-20

    申请号：US14904489

    申请日：2015-12-25

    Applicant: Shenzhen China Star Optoelectronics Technology Co. Ltd.

    Inventor： Hongyuan Xu

    IPC: H01L27/28 ,  H01L29/786

    CPC classification number: H01L27/286 ,  H01L27/12 ,  H01L27/283 ,  H01L29/00 ,  H01L29/7869

    Abstract: The present invention proposes an array substrate and a method for fabricating the same. According to the array substrate and the method of fabricating the array substrate in the present invention, the IGZO pattern and the first electrode strip, the first channel, and the second metallic layer in the corresponding section form the first transistor of the CMOS inverter, and the OSC pattern and the second electrode strip, the second channel, and the second metallic layer in the corresponding section form the second transistor of the CMOS inverter. In this way, the CMOS inverter or the CMOS ring oscillator is fabricated based on IGZO and OSC.

    PIXEL CELL CIRCUITS OF COMPENSATION FEEDBACK VOLTAGE
    17.
    发明申请
    PIXEL CELL CIRCUITS OF COMPENSATION FEEDBACK VOLTAGE 有权
    补偿反馈电压的像素电路电路

    公开(公告)号：US20170018246A1

    公开(公告)日：2017-01-19

    申请号：US14778088

    申请日：2015-08-21

    Applicant: Shenzhen China Star Optoelectronics Technology Co. Ltd.

    Inventor： Hongyuan Xu

    IPC: G09G3/36 ,  H01L27/12 ,  G02F1/1362 ,  G02F1/1343 ,  G02F1/1368

    CPC classification number: H01L27/124 ,  G09G3/3677 ,  G09G2300/0426 ,  G09G2300/043 ,  G09G2320/0219 ,  G09G2320/0223 ,  G09G2320/0247

    Abstract: The present disclosure relates to a pixel cell circuit of compensation feedback voltage. The pixel cell circuit is provided with the compensation capacitance (C_co), one end of the compensation capacitance (C_co) electrically connects to the compensation level wirings G(m)_co, and the other end of the compensation capacitance (C_co) electrically connects to the drain of the TFT (T1) and the pixel electrode (P). A level of the compensation signals transmitted by the compensation level wirings G(m)_co is opposite to the level of the scanning signals transmitted by the scanning lines G(m). When the pixel electrode has been fully charged, the compensation capacitance generates a pull-up feedback voltage for compensating the pull-down voltage caused by the parasitic capacitance so as to eliminate the effects toward the pixel electrodes caused by the scanning signals transmitted by the scanning lines. This configuration not only decreases the flickers, but also the image sticking. In brief, the display uniformity and the display performance are enhanced.

    Abstract translation: 本公开涉及补偿反馈电压的像素单元电路。 像素单元电路具有补偿电容（C_co），补偿电容（C_co）的一端电连接到补偿电平布线G（m）_co，补偿电容（C_co）的另一端电连接到 TFT（T1）和像素电极（P）的漏极。 由补偿电平布线G（m）_co发送的补偿信号的电平与由扫描线G（m）发送的扫描信号的电平相反。 当像素电极已经完全充电时，补偿电容产生用于补偿由寄生电容引起的下拉电压的上拉反馈电压，从而消除由扫描发射的扫描信号引起的对像素电极的影响 线条。 该配置不仅减少了闪烁，还减少了图像残留。 简而言之，显示均匀性和显示性能得到提高。

    TFT SUBSTRATE AND LIQUID CRYSTAL DISPLAY PANEL USING SAME
    18.
    发明申请
    TFT SUBSTRATE AND LIQUID CRYSTAL DISPLAY PANEL USING SAME 审中-公开
    TFT基板和液晶显示面板使用相同

    公开(公告)号：US20150185548A1

    公开(公告)日：2015-07-02

    申请号：US14241075

    申请日：2014-01-21

    Applicant: Shenzhen China Star Optoelectronics Technology Co. Ltd.

    Inventor： Hongyuan Xu ,  Hsiangchih Hsiao ,  Changi Su ,  Mian Zeng ,  Xiaoxiao Wang

    IPC: G02F1/1335 ,  H01L29/786 ,  H01L27/12

    CPC classification number: G02F1/133514 ,  G02F1/136213 ,  G02F1/13624 ,  H01L27/124 ,  H01L27/1255 ,  H01L29/78669

    Abstract: The present invention provides a TFT substrate and a liquid crystal display panel using the TFT substrate. The TFT substrate includes: first and second sharing capacitors (2, 4) that are connected in parallel. The first sharing capacitor (2) includes a first upper substrate (22), a first lower substrate (24) opposite to the first upper substrate (22), and a first semiconductor layer (26) arranged between the first upper substrate (22) and the first lower substrate (24). The second sharing capacitor (4) includes a second upper substrate (42), a second lower substrate (44) opposite to the second upper substrate (42), and a second semiconductor layer (46) arranged between the second upper substrate (42) and the second lower substrate (44). The first upper substrate (22) of the first sharing capacitor (2) and the second lower substrate (44) of the second sharing capacitor (4) are electrically connected to the pixel electrode (6). The second upper substrate (42) of the second sharing capacitor (4) is electrically connected to the Com trace (8).

    Abstract translation: 本发明提供一种TFT基板和使用该TFT基板的液晶显示面板。 TFT基板包括：并联连接的第一和第二共享电容器（2,4）。 第一共享电容器（2）包括第一上基板（22），与第一上基板（22）相对的第一下基板（24）和布置在第一上基板（22）之间的第一半导体层（26） 和第一下基板（24）。 第二共享电容器（4）包括第二上基板（42），与第二上基板（42）相对的第二下基板（44）和布置在第二上基板（42）之间的第二半导体层（46） 和第二下基板（44）。 第一共享电容器（2）的第一上基板（22）和第二共享电容器（4）的第二下基板（44）电连接到像素电极（6）。 第二共享电容器（4）的第二上基板（42）电连接到Com迹线（8）。

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