公开(公告)号：US20140167040A1

公开(公告)日：2014-06-19

申请号：US14184361

申请日：2014-02-19

Applicant: Samsung Display Co., Ltd.

Inventor： Yong Su Lee ,  Yoon Ho Khang ,  Dong Jo Kim ,  Hyun Jae Na ,  Sang Ho Park ,  Se Hwan Yu ,  Chong Sup Chang ,  Dae Ho Kim ,  Jae Neung Kim ,  Myoung Geun Cha ,  Sang Gab Kim ,  Yu-Gwang Jeong

IPC: H01L29/786 ,  H01L29/66

CPC classification number: H01L29/78633 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/1288 ,  H01L27/3262 ,  H01L29/41733 ,  H01L29/66969 ,  H01L29/78618 ,  H01L29/7869 ,  H01L29/78696

Abstract: A thin film transistor according to an exemplary embodiment of the present invention includes an oxide semiconductor. A source electrode and a drain electrode face each other. The source electrode and the drain electrode are positioned at two opposite sides, respectively, of the oxide semiconductor. A low conductive region is positioned between the source electrode or the drain electrode and the oxide semiconductor. An insulating layer is positioned on the oxide semiconductor and the low conductive region. A gate electrode is positioned on the insulating layer. The insulating layer covers the oxide semiconductor and the low conductive region. A carrier concentration of the low conductive region is lower than a carrier concentration of the source electrode or the drain electrode.

Abstract translation: 根据本发明的示例性实施例的薄膜晶体管包括氧化物半导体。 源电极和漏电极彼此面对。 源电极和漏电极分别位于氧化物半导体的两个相对侧。 低导电区域位于源电极或漏电极与氧化物半导体之间。 绝缘层位于氧化物半导体和低导电区域上。 栅电极位于绝缘层上。 绝缘层覆盖氧化物半导体和低导电区域。 低导电区域的载流子浓度低于源电极或漏电极的载流子浓度。

公开(公告)号：US11798954B2

公开(公告)日：2023-10-24

申请号：US17020579

申请日：2020-09-14

Applicant: Samsung Display Co., Ltd.

Inventor： Chong Sup Chang ,  Eui Kang Heo ,  Young Seok Baek ,  Ha Na Seo

IPC: H01L27/12

CPC classification number: H01L27/124

Abstract: A display includes a substrate, a first electrode base layer and a second electrode base layer spaced from each other on the substrate, a first electrode on the first electrode base layer and a second electrode on the second electrode base layer, a first inner bank between the first electrode base layer and the first electrode and a second inner bank between the second electrode base layer and the second electrode, and a light emitting element between the first electrode and the second electrode, at least one end portion of the light emitting element being electrically connected to the first electrode or the second electrode, wherein a side surface of one end portion of each of the first and second electrode base layers is at the same line as a side surface of an end portion of a corresponding one of the first and second electrodes.

公开(公告)号：US10861978B2

公开(公告)日：2020-12-08

申请号：US16231781

申请日：2018-12-24

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Yong Su Lee ,  Yoon Ho Khang ,  Dong Jo Kim ,  Hyun Jae Na ,  Sang Ho Park ,  Se Hwan Yu ,  Chong Sup Chang ,  Dae Ho Kim ,  Jae Neung Kim ,  Myoung Geun Cha ,  Sang Gab Kim ,  Yu-Gwang Jeong

IPC: H01L27/00 ,  H01L29/00 ,  H01L29/786 ,  H01L27/12 ,  H01L29/66 ,  H01L29/417 ,  H01L27/32

Abstract: A thin film transistor according to an exemplary embodiment of the present invention includes an oxide semiconductor. A source electrode and a drain electrode face each other. The source electrode and the drain electrode are positioned at two opposite sides, respectively, of the oxide semiconductor. A low conductive region is positioned between the source electrode or the drain electrode and the oxide semiconductor. An insulating layer is positioned on the oxide semiconductor and the low conductive region. A gate electrode is positioned on the insulating layer. The insulating layer covers the oxide semiconductor and the low conductive region. A carrier concentration of the low conductive region is lower than a carrier concentration of the source electrode or the drain electrode.

公开(公告)号：US20190312147A1

公开(公告)日：2019-10-10

申请号：US16231781

申请日：2018-12-24

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Yong Su Lee ,  Yoon Ho Khang ,  Dong Jo Kim ,  Hyun Jae Na ,  Sang Ho Park ,  Se Hwan Yu ,  Chong Sup Chang ,  Dae Ho Kim ,  Jae Neung Kim ,  Myoung Geun Cha ,  Sang Gab Kim ,  Yu-Gwang Jeong

IPC: H01L29/786 ,  H01L27/12 ,  H01L29/417 ,  H01L29/66

Abstract: A thin film transistor according to an exemplary embodiment of the present invention includes an oxide semiconductor. A source electrode and a drain electrode face each other. The source electrode and the drain electrode are positioned at two opposite sides, respectively, of the oxide semiconductor. A low conductive region is positioned between the source electrode or the drain electrode and the oxide semiconductor. An insulating layer is positioned on the oxide semiconductor and the low conductive region. A gate electrode is positioned on the insulating layer. The insulating layer covers the oxide semiconductor and the low conductive region. A carrier concentration of the low conductive region is lower than a carrier concentration of the source electrode or the drain electrode.

公开(公告)号：US09263467B2

公开(公告)日：2016-02-16

申请号：US14466665

申请日：2014-08-22

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Sang Ho Park ,  Yoon Ho Khang ,  Se Hwan Yu ,  Yong Su Lee ,  Chong Sup Chang ,  Myoung Geun Cha ,  Hyun Jae Na

IPC: H01L29/04 ,  H01L31/036 ,  H01L31/0376 ,  H01L31/20 ,  H01L27/12 ,  H01L29/786 ,  H01L29/417 ,  H01L29/45

CPC classification number: H01L27/124 ,  H01L27/1214 ,  H01L29/41758 ,  H01L29/458 ,  H01L29/78642 ,  H01L29/78669 ,  H01L29/78678

Abstract: A thin film transistor array panel according to an exemplary embodiment of the present disclosure includes: an insulating substrate; a gate electrode disposed on the insulating substrate; a gate insulating layer disposed on the gate electrode; a semiconductor disposed on the gate insulating layer; a source electrode and a drain electrode disposed on the semiconductor; an ohmic contact layer disposed at an interface between at least one of the source and drain electrodes and the semiconductor. Surface heights of the source and drain electrodes different, while surface heights of the semiconductor and the ohmic contact layer are the same. The ohmic contact layer is made of a silicide of a metal used for the source and drain electrodes.

Abstract translation: 根据本公开的示例性实施例的薄膜晶体管阵列面板包括：绝缘基板; 设置在所述绝缘基板上的栅电极; 设置在栅电极上的栅极绝缘层; 设置在所述栅极绝缘层上的半导体; 设置在半导体上的源电极和漏电极; 欧姆接触层设置在源电极和漏电极中的至少一个与半导体之间的界面处。 源极和漏极的表面高度不同，而半导体和欧姆接触层的表面高度相同。 欧姆接触层由用于源极和漏极的金属的硅化物制成。

公开(公告)号：US20140138684A1

公开(公告)日：2014-05-22

申请号：US14166183

申请日：2014-01-28

Applicant: Samsung Display Co., Ltd.

Inventor： YONG SU LEE ,  Yoon Ho Khang ,  Dong Jo Kim ,  Hyun Jae Na ,  Sang Ho Park ,  Se Hwan Yu ,  Chong Sup Chang

IPC: H01L27/12

CPC classification number: H01L29/7869 ,  H01L21/0262 ,  H01L21/385 ,  H01L21/441 ,  H01L27/1214 ,  H01L27/1225 ,  H01L27/1259 ,  H01L27/1288 ,  H01L29/41733 ,  H01L29/66969 ,  H01L29/786 ,  H01L29/78633 ,  H01L29/78696

Abstract: A thin film transistor, a thin film transistor array panel including the same, and a method of manufacturing the same are provided, wherein the thin film transistor includes a channel region including an oxide semiconductor, a source region and a drain region connected to the channel region and facing each other at both sides with respect to the channel region, an insulating layer positioned on the channel region, and a gate electrode positioned on the insulating layer, wherein an edge boundary of the gate electrode and an edge boundary of the channel region are substantially aligned.

Abstract translation: 提供一种薄膜晶体管，包括该薄膜晶体管的薄膜晶体管阵列面板及其制造方法，其中薄膜晶体管包括沟道区，该沟道区包括氧化物半导体，源极区和连接到沟道的漏极区 区域，并且相对于沟道区域在两侧面对，位于沟道区域上的绝缘层和位于绝缘层上的栅电极，其中栅电极的边缘边界和沟道区域的边缘边界 基本对齐。

公开(公告)号：US12218113B2

公开(公告)日：2025-02-04

申请号：US17445686

申请日：2021-08-23

Applicant: Samsung Display Co., Ltd.

Inventor： In Kyung Yoo ,  Hee Na Kim ,  Chong Sup Chang ,  Cha Dong Kim ,  Sang Jin Lee

IPC: H01L25/16 ,  H01L33/62

Abstract: A display device includes a substrate, a data conductive layer on the substrate and including a first voltage line, a via layer on the data conductive layer, a light emitting element on the via layer, a first contact electrode on the light emitting element and contacting a first end of the light emitting element, and a second contact electrode on the light emitting element and contacting a second end of the light emitting element, wherein the second contact electrode is electrically connected to the first voltage line through a first contact hole penetrating the via layer.

公开(公告)号：US11749709B2

公开(公告)日：2023-09-05

申请号：US17718035

申请日：2022-04-11

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Eui Kang Heo ,  Chong Sup Chang

IPC: H01L27/15 ,  H01L33/38 ,  H01L33/48 ,  H01L33/62 ,  H10K59/122 ,  H10K59/131

CPC classification number: H01L27/156 ,  H01L33/387 ,  H01L33/486 ,  H01L33/62 ,  H10K59/122 ,  H10K59/131

Abstract: A display device includes a substrate, a first inner bank and a second inner bank on the substrate and spaced apart from each other, a first electrode on the first inner bank and a second electrode on the second inner bank, and a light emitting element between the first inner bank and the second inner bank, the light emitting element being electrically coupled to the first electrode and the second electrode, wherein the first inner bank comprises a first side surface facing the second inner bank, the second inner bank comprises a second side surface facing the first side surface, and the first side surface and the second side surface are respectively recessed into the first inner bank and the second inner bank, to have a curved shape.

公开(公告)号：US11594639B2

公开(公告)日：2023-02-28

申请号：US17115470

申请日：2020-12-08

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Yong Su Lee ,  Yoon Ho Khang ,  Dong Jo Kim ,  Hyun Jae Na ,  Sang Ho Park ,  Se Hwan Yu ,  Chong Sup Chang ,  Dae Ho Kim ,  Jae Neung Kim ,  Myoung Geun Cha ,  Sang Gap Kim ,  Yu-Gwang Jeong

IPC: H01L27/00 ,  H01L29/00 ,  H01L29/786 ,  H01L27/12 ,  H01L29/66 ,  H01L29/417 ,  H01L27/32

Abstract: A thin film transistor according to an exemplary embodiment of the present invention includes an oxide semiconductor. A source electrode and a drain electrode face each other. The source electrode and the drain electrode are positioned at two opposite sides, respectively, of the oxide semiconductor. A low conductive region is positioned between the source electrode or the drain electrode and the oxide semiconductor. An insulating layer is positioned on the oxide semiconductor and the low conductive region. A gate electrode is positioned on the insulating layer. The insulating layer covers the oxide semiconductor and the low conductive region. A carrier concentration of the low conductive region is lower than a carrier concentration of the source electrode or the drain electrode.

公开(公告)号：US11450268B2

公开(公告)日：2022-09-20

申请号：US16998183

申请日：2020-08-20

Applicant: Samsung Display Co., Ltd.

Inventor： Chong Sup Chang ,  Eui Kang Heo ,  Young Seok Baek ,  Ha Na Seo

IPC: G09G3/3225 ,  H01L25/075 ,  H01L25/16 ,  H01L21/66 ,  H01L23/00

Abstract: A display device includes a substrate including a display area and a non-display area around the display area; and a display element layer on the substrate. The display element layer may include first and second electrodes extending in a first direction and spaced apart from each other in a second direction that is different from the first direction; a first light emitting element electrically coupled to the first and second electrodes; a first dummy electrode extending in the first direction and spaced apart from the first and second electrodes; second dummy electrodes spaced apart from each other in the first direction and spaced apart from the first electrode, the second electrode, and the first dummy electrode; and a second light emitting element electrically coupled to the first dummy electrode and the second dummy electrodes.