DISPLAY DEVICE AND MANUFACTURING METHOD THEREOF
    12.
    发明申请
    DISPLAY DEVICE AND MANUFACTURING METHOD THEREOF 审中-公开
    显示装置及其制造方法

    公开(公告)号:US20170025447A1

    公开(公告)日:2017-01-26

    申请号:US14995675

    申请日:2016-01-14

    Abstract: A display device includes a substrate, a thin film transistor, a storage electrode, a pixel electrode, and a common electrode. The thin film transistor is disposed on the substrate and includes a drain electrode and a semiconductor layer. The storage electrode is disposed at a same layer as the semiconductor layer. The pixel electrode is disposed on the substrate and is electrically connected to the drain electrode. The common electrode is disposed on the substrate.

    Abstract translation: 显示装置包括基板,薄膜晶体管,存储电极,像素电极和公共电极。 薄膜晶体管设置在基板上,并且包括漏电极和半导体层。 存储电极设置在与半导体层相同的层。 像素电极设置在基板上并与漏电极电连接。 公共电极设置在基板上。

    LIQUID CRYSTAL DISPLAY
    13.
    发明申请
    LIQUID CRYSTAL DISPLAY 有权
    液晶显示器

    公开(公告)号:US20160223873A1

    公开(公告)日:2016-08-04

    申请号:US15000633

    申请日:2016-01-19

    Abstract: A liquid crystal display including: a first substrate; a gate line and a data line formed or otherwise disposed on the first substrate; a drain electrode disposed on the first substrate; a first insulating layer disposed on the gate line and the data line; a first electrode disposed on the first insulating layer; a second insulating layer disposed on the first electrode; and a second electrode disposed on the second insulating layer. The first insulating layer and the second insulating layer have a first contact hole exposing a portion of the drain electrode. The contact portion of the second electrode is connected to the drain electrode through the first contact hole, and the contact portion overlaps the first electrode adjacent the first contact hole. The overlap increases capacitance of the display panel so as to decrease kickback voltage and reduce flicker.

    Abstract translation: 一种液晶显示器,包括:第一基板; 形成或以其他方式设置在第一基板上的栅极线和数据线; 设置在所述第一基板上的漏电极; 设置在栅极线和数据线上的第一绝缘层; 设置在所述第一绝缘层上的第一电极; 设置在所述第一电极上的第二绝缘层; 以及设置在所述第二绝缘层上的第二电极。 第一绝缘层和第二绝缘层具有暴露漏电极的一部分的第一接触孔。 第二电极的接触部分通过第一接触孔连接到漏电极,接触部分与第一接触孔相邻的第一电极重叠。 重叠增加了显示面板的电容,从而降低反冲电压并减少闪烁。

    DISPLAY DEVICE AND DRIVING METHOD THEREOF
    14.
    发明申请
    DISPLAY DEVICE AND DRIVING METHOD THEREOF 有权
    显示装置及其驱动方法

    公开(公告)号:US20140055501A1

    公开(公告)日:2014-02-27

    申请号:US13728444

    申请日:2012-12-27

    CPC classification number: G09G5/10 G09G3/3406 G09G2320/062 G09G2320/0646

    Abstract: A method of driving a display device includes driving a light source unit with a first driving ratio and outputting received image data to a display panel of the display device, storing the received image data upon receipt of a signal indicating a still image is displayed, calculating a second driving ratio of the light source unit from a representative value of the stored image data, compensating the stored image data according to the second driving ratio, driving the light source unit with the second driving ratio that is lower than the first driving ratio, and outputting the compensated image data to the display panel.

    Abstract translation: 驱动显示装置的方法包括驱动具有第一驱动比率的光源单元并将接收到的图像数据输出到显示装置的显示面板,在接收到表示静止图像的信号的显示时存储接收到的图像数据,计算 根据所存储的图像数据的代表值对光源单元的第二驱动比,根据第二驱动比补偿存储的图像数据,以低于第一驱动比的第二驱动比驱动光源单元, 并将补偿后的图像数据输出到显示面板。

    STAGE AND ORGANIC LIGHT EMITTING DISPLAY DEVICE USING THE SAME

    公开(公告)号:US20180005573A1

    公开(公告)日:2018-01-04

    申请号:US15626305

    申请日:2017-06-19

    Abstract: A stage includes first, second, and third outputs and first and second signal processors. The first output supplies a scan signal to a first output terminal based on signals to first and second input terminals and the voltage of a first node. The second output is connected to a first power source and supplies an emission control signal to a second output terminal based on signals to the first input terminal, the first output terminal, and a third input terminal. The third output is connected to the first power source and supplies an inverted emission control signal to a third output terminal based on signals to the first input terminal and second output terminal. The first signal processor controls the first node voltage based on a signal to a fourth input terminal. The second signal processor controls the first node voltage based on the signal to the second input terminal.

    SCAN DRIVER
    16.
    发明申请
    SCAN DRIVER 有权
    扫描驱动器

    公开(公告)号:US20170061914A1

    公开(公告)日:2017-03-02

    申请号:US15092466

    申请日:2016-04-06

    CPC classification number: G09G3/20 G09G2310/0267 G09G2310/0286

    Abstract: In a scan driver including a plurality of stages configured to supply scan signals to scan lines, the scan driver includes: an i−1th stage configured to supply an i−1th scan signal to an i−1th scan line while controlling a node Qi−1 (i is a natural number) in response to a first clock signal, a third clock signal, and a control voltage; an ith stage configured to supply an ith scan signal to an ith scan line while controlling a node Qi in response to a second clock signal, a fourth clock signal, and the control voltage; and a controller connected to the i−1th stage and the ith stage, and configured to supply the control voltage.

    Abstract translation: 在包括被配置为向扫描线提供扫描信号的多个级的扫描驱动器中,扫描驱动器包括:第i级,被配置为将第i-1扫描信号提供给第i-1条扫描线,同时控制节点Qi- 1(i是自然数),响应于第一时钟信号,第三时钟信号和控制电压; 第i级,被配置为响应于第二时钟信号,第四时钟信号和控制电压控制节点Qi,将第i扫描信号提供给第i扫描线; 以及连接到第i级和第i级的控制器,并且被配置为提供控制电压。

    THIN FILM TRANSISTOR ARRAY PANEL AND MANUFACTURING METHOD THEREOF
    17.
    发明申请
    THIN FILM TRANSISTOR ARRAY PANEL AND MANUFACTURING METHOD THEREOF 有权
    薄膜晶体管阵列及其制造方法

    公开(公告)号:US20160322470A1

    公开(公告)日:2016-11-03

    申请号:US15069239

    申请日:2016-03-14

    Abstract: Disclosed herein is a thin film transistor array panel, including: an insulating substrate; a gate electrode formed on the insulating substrate; a gate insulating layer formed on the gate electrode; a semiconductor layer formed on the gate insulating layer; a source electrode and a drain electrode formed on the semiconductor layer and the gate insulating layer and facing each other; and a pixel electrode connected to the drain electrode and applied with a voltage from the drain electrode, wherein a thickness of the gate insulating layer which overlaps the drain electrode but does not overlap the semiconductor layer is formed to be thinner than that which overlaps the semiconductor.

    Abstract translation: 本文公开了一种薄膜晶体管阵列面板,包括:绝缘基板; 形成在所述绝缘基板上的栅电极; 形成在所述栅电极上的栅极绝缘层; 形成在所述栅极绝缘层上的半导体层; 形成在所述半导体层和所述栅极绝缘层上并且彼此面对的源电极和漏电极; 以及与漏电极连接并施加来自漏电极的电压的像素电极,其中与漏电极重叠但不与半导体层重叠的栅极绝缘层的厚度形成为比与半导体层重叠的栅极绝缘层的厚度更薄 。

    STAGE CIRCUIT AND SCAN DRIVER USING THE SAME
    18.
    发明申请
    STAGE CIRCUIT AND SCAN DRIVER USING THE SAME 审中-公开
    阶段电路和扫描驱动器使用它

    公开(公告)号:US20160307537A1

    公开(公告)日:2016-10-20

    申请号:US15042029

    申请日:2016-02-11

    Abstract: There is provided a stage circuit capable of minimizing a mounting area. The stage circuit includes: an output unit configured to supply a voltage of a first node, an i-th (i is a natural number) carry signal, and to supply an i-th scan signal in response to the voltage of the first node, a voltage of a second node, and a first clock signal, a controller configured to control the voltage of the second node in response to the first clock signal; a pull-up unit configured to control the voltage of the first node in response to a carry signal of a previous stage and a voltage of a first node of the previous stage, and a pull-down unit configured to control the voltage of the first node in response to the voltage of the second node and a carry signal of a next stage.

    Abstract translation: 提供能够最小化安装面积的平台电路。 舞台电路包括:输出单元,被配置为提供第一节点的电压,第i(i是自然数)进位信号,并且响应于第一节点的电压提供第i个扫描信号 ,第二节点的电压和第一时钟信号,被配置为响应于第一时钟信号来控制第二节点的电压的控制器; 上拉单元,被配置为响应于前一级的进位信号和前一级的第一节点的电压来控制第一节点的电压;以及下拉单元,被配置为控制第一节点的电压 响应于第二节点的电压和下一级的进位信号。

    GATE DRIVING CIRCUIT, DRIVING METOHD FOR GATE DRIVING CIRCUIT AND DISPLAY PANEL USING THE SAME
    19.
    发明申请
    GATE DRIVING CIRCUIT, DRIVING METOHD FOR GATE DRIVING CIRCUIT AND DISPLAY PANEL USING THE SAME 有权
    闸门驱动电路,用于门驱动电路的驱动电极和使用其的显示面板

    公开(公告)号:US20150287392A1

    公开(公告)日:2015-10-08

    申请号:US14456926

    申请日:2014-08-11

    CPC classification number: H03K17/693 G09G3/3677 G09G2310/0286 G09G2310/06

    Abstract: A stage includes a first transistor including an input terminal to which a clock signal is applied and a control terminal connected to a first node; a first capacitor including terminals respectively connected to the first node and an output terminal of the first transistor; a second transistor including an input terminal connected to the output terminal of the first transistor, a control terminal connected to a second node, and an output terminal to which a low voltage is applied; a third transistor including an output terminal connected to the second node, a control terminal connected to the first node, and an input terminal to which the low voltage is applied; and a fourth transistor including an input terminal connected to the first node and an output terminal to which the low voltage is applied, wherein the fourth transistor is switched according to an output signal of a next stage.

    Abstract translation: 舞台包括:第一晶体管,包括施加时钟信号的输入端子和连接到第一节点的控制端子; 第一电容器,包括分别连接到第一节点的端子和第一晶体管的输出端子; 第二晶体管,包括连接到第一晶体管的输出端子的输入端子,连接到第二节点的控制端子和施加低电压的输出端子; 第三晶体管,包括连接到第二节点的输出端子,连接到第一节点的控制端子和施加低电压的输入端子; 以及第四晶体管,其包括连接到所述第一节点的输入端子和施加所述低电压的输出端子,其中所述第四晶体管根据下一级的输出信号被切换。

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