公开(公告)号：US09034691B2

公开(公告)日：2015-05-19

申请号：US14468472

申请日：2014-08-26

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Yong Su Lee ,  Yoon Ho Khang ,  Dong Jo Kim ,  Hyun Jae Na ,  Sang Ho Park ,  Se Hwan Yu ,  Chong Sup Chang

IPC: H01L21/02 ,  H01L29/66 ,  H01L27/12 ,  H01L29/786 ,  H01L21/385 ,  H01L21/441

CPC classification number: H01L29/7869 ,  H01L21/0262 ,  H01L21/385 ,  H01L21/441 ,  H01L27/1214 ,  H01L27/1225 ,  H01L27/1259 ,  H01L27/1288 ,  H01L29/41733 ,  H01L29/66969 ,  H01L29/786 ,  H01L29/78633 ,  H01L29/78696

Abstract: A thin film transistor, a thin film transistor array panel including the same, and a method of manufacturing the same are provided, wherein the thin film transistor includes a channel region including an oxide semiconductor, a source region and a drain region connected to the channel region and facing each other at both sides with respect to the channel region, an insulating layer positioned on the channel region, and a gate electrode positioned on the insulating layer, wherein an edge boundary of the gate electrode and an edge boundary of the channel region are substantially aligned.

Abstract translation: 提供一种薄膜晶体管，包括该薄膜晶体管的薄膜晶体管阵列面板及其制造方法，其中薄膜晶体管包括沟道区，该沟道区包括氧化物半导体，源极区和连接到沟道的漏极区 区域，并且相对于沟道区域在两侧面对，位于沟道区域上的绝缘层和位于绝缘层上的栅电极，其中栅电极的边缘边界和沟道区域的边缘边界 基本对齐。

公开(公告)号：US20140167040A1

公开(公告)日：2014-06-19

申请号：US14184361

申请日：2014-02-19

Applicant: Samsung Display Co., Ltd.

Inventor： Yong Su Lee ,  Yoon Ho Khang ,  Dong Jo Kim ,  Hyun Jae Na ,  Sang Ho Park ,  Se Hwan Yu ,  Chong Sup Chang ,  Dae Ho Kim ,  Jae Neung Kim ,  Myoung Geun Cha ,  Sang Gab Kim ,  Yu-Gwang Jeong

IPC: H01L29/786 ,  H01L29/66

CPC classification number: H01L29/78633 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/1288 ,  H01L27/3262 ,  H01L29/41733 ,  H01L29/66969 ,  H01L29/78618 ,  H01L29/7869 ,  H01L29/78696

Abstract: A thin film transistor according to an exemplary embodiment of the present invention includes an oxide semiconductor. A source electrode and a drain electrode face each other. The source electrode and the drain electrode are positioned at two opposite sides, respectively, of the oxide semiconductor. A low conductive region is positioned between the source electrode or the drain electrode and the oxide semiconductor. An insulating layer is positioned on the oxide semiconductor and the low conductive region. A gate electrode is positioned on the insulating layer. The insulating layer covers the oxide semiconductor and the low conductive region. A carrier concentration of the low conductive region is lower than a carrier concentration of the source electrode or the drain electrode.

Abstract translation: 根据本发明的示例性实施例的薄膜晶体管包括氧化物半导体。 源电极和漏电极彼此面对。 源电极和漏电极分别位于氧化物半导体的两个相对侧。 低导电区域位于源电极或漏电极与氧化物半导体之间。 绝缘层位于氧化物半导体和低导电区域上。 栅电极位于绝缘层上。 绝缘层覆盖氧化物半导体和低导电区域。 低导电区域的载流子浓度低于源电极或漏电极的载流子浓度。

公开(公告)号：US20140151683A1

公开(公告)日：2014-06-05

申请号：US13873426

申请日：2013-04-30

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Sang Ho Park ,  Su-Hyoung Kang ,  Yoon Ho Khang ,  Dong Jo Kim ,  Joon Yong Park ,  Sang Won Shin ,  Dong Hwan Shim

IPC: H01L29/786

CPC classification number: H01L29/7869

Abstract: A thin film transistor includes an oxide semiconductor, in which an oxygen defect content of the oxide semiconductor is no greater than about 0.15 based on an entire oxygen content included in the oxide semiconductor.

Abstract translation: 薄膜晶体管包括氧化物半导体，其中氧化物半导体的氧缺陷含量基于氧化物半导体中包含的全部氧含量不大于约0.15。

公开(公告)号：US10861978B2

公开(公告)日：2020-12-08

申请号：US16231781

申请日：2018-12-24

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Yong Su Lee ,  Yoon Ho Khang ,  Dong Jo Kim ,  Hyun Jae Na ,  Sang Ho Park ,  Se Hwan Yu ,  Chong Sup Chang ,  Dae Ho Kim ,  Jae Neung Kim ,  Myoung Geun Cha ,  Sang Gab Kim ,  Yu-Gwang Jeong

IPC: H01L27/00 ,  H01L29/00 ,  H01L29/786 ,  H01L27/12 ,  H01L29/66 ,  H01L29/417 ,  H01L27/32

Abstract: A thin film transistor according to an exemplary embodiment of the present invention includes an oxide semiconductor. A source electrode and a drain electrode face each other. The source electrode and the drain electrode are positioned at two opposite sides, respectively, of the oxide semiconductor. A low conductive region is positioned between the source electrode or the drain electrode and the oxide semiconductor. An insulating layer is positioned on the oxide semiconductor and the low conductive region. A gate electrode is positioned on the insulating layer. The insulating layer covers the oxide semiconductor and the low conductive region. A carrier concentration of the low conductive region is lower than a carrier concentration of the source electrode or the drain electrode.

公开(公告)号：US10741797B2

公开(公告)日：2020-08-11

申请号：US15867600

申请日：2018-01-10

Applicant: Samsung Display Co., Ltd.

Inventor： Myoung Geun Cha ,  Jin Goo Jung ,  Yoon Ho Khang ,  Se Mi Kim

IPC: H01L51/56 ,  H01L27/12 ,  H01L27/32

Abstract: An OLED display and a method of manufacturing thereof are disclosed. In one aspect, the display includes a scan line formed over a substrate and configured to transfer a scan signal, a data line and a driving voltage line crossing the scan line and respectively configured to transfer a data voltage and a driving voltage, and a switching transistor electrically connected to the scan line and the data line and including a switching drain electrode configured to output the data voltage. The display also includes a driving transistor including a driving gate electrode, a driving drain electrode, and a driving source electrode electrically connected to the switching drain electrode. The display further includes a storage capacitor including a first storage electrode electrically connected to the driving gate electrode and a second storage electrode formed on the same layer as the driving voltage line.

公开(公告)号：US20190312147A1

公开(公告)日：2019-10-10

申请号：US16231781

申请日：2018-12-24

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Yong Su Lee ,  Yoon Ho Khang ,  Dong Jo Kim ,  Hyun Jae Na ,  Sang Ho Park ,  Se Hwan Yu ,  Chong Sup Chang ,  Dae Ho Kim ,  Jae Neung Kim ,  Myoung Geun Cha ,  Sang Gab Kim ,  Yu-Gwang Jeong

IPC: H01L29/786 ,  H01L27/12 ,  H01L29/417 ,  H01L29/66

Abstract: A thin film transistor according to an exemplary embodiment of the present invention includes an oxide semiconductor. A source electrode and a drain electrode face each other. The source electrode and the drain electrode are positioned at two opposite sides, respectively, of the oxide semiconductor. A low conductive region is positioned between the source electrode or the drain electrode and the oxide semiconductor. An insulating layer is positioned on the oxide semiconductor and the low conductive region. A gate electrode is positioned on the insulating layer. The insulating layer covers the oxide semiconductor and the low conductive region. A carrier concentration of the low conductive region is lower than a carrier concentration of the source electrode or the drain electrode.

公开(公告)号：US10388794B2

公开(公告)日：2019-08-20

申请号：US15018058

申请日：2016-02-08

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Jong Chan Lee ,  Woong Hee Jeong ,  Dae Ho Kim ,  Young Ki Shin ,  Yoon Ho Khang ,  Myoung Geun Cha

IPC: H01L27/12 ,  G09G3/3233 ,  H01L29/786

Abstract: A display device according to an exemplary embodiment of the present invention includes: a substrate; a plurality of transistors formed on the substrate; and a light-emitting device connected to the plurality of transistors, wherein the transistor includes a gate electrode, the plurality of transistors include a first transistor and a second transistor of which lateral wall slope angles of the gate electrode are different from each other, and the first transistor further includes a doping control member formed on a lateral wall of the gate electrode.

公开(公告)号：US09263467B2

公开(公告)日：2016-02-16

申请号：US14466665

申请日：2014-08-22

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Sang Ho Park ,  Yoon Ho Khang ,  Se Hwan Yu ,  Yong Su Lee ,  Chong Sup Chang ,  Myoung Geun Cha ,  Hyun Jae Na

IPC: H01L29/04 ,  H01L31/036 ,  H01L31/0376 ,  H01L31/20 ,  H01L27/12 ,  H01L29/786 ,  H01L29/417 ,  H01L29/45

CPC classification number: H01L27/124 ,  H01L27/1214 ,  H01L29/41758 ,  H01L29/458 ,  H01L29/78642 ,  H01L29/78669 ,  H01L29/78678

Abstract: A thin film transistor array panel according to an exemplary embodiment of the present disclosure includes: an insulating substrate; a gate electrode disposed on the insulating substrate; a gate insulating layer disposed on the gate electrode; a semiconductor disposed on the gate insulating layer; a source electrode and a drain electrode disposed on the semiconductor; an ohmic contact layer disposed at an interface between at least one of the source and drain electrodes and the semiconductor. Surface heights of the source and drain electrodes different, while surface heights of the semiconductor and the ohmic contact layer are the same. The ohmic contact layer is made of a silicide of a metal used for the source and drain electrodes.

Abstract translation: 根据本公开的示例性实施例的薄膜晶体管阵列面板包括：绝缘基板; 设置在所述绝缘基板上的栅电极; 设置在栅电极上的栅极绝缘层; 设置在所述栅极绝缘层上的半导体; 设置在半导体上的源电极和漏电极; 欧姆接触层设置在源电极和漏电极中的至少一个与半导体之间的界面处。 源极和漏极的表面高度不同，而半导体和欧姆接触层的表面高度相同。 欧姆接触层由用于源极和漏极的金属的硅化物制成。

公开(公告)号：US20150084035A1

公开(公告)日：2015-03-26

申请号：US14261935

申请日：2014-04-25

Applicant: Samsung Display Co., Ltd.

Inventor： Dong Jo Kim ,  Ji Seon Lee ,  Deuk Myung Ji ,  Yoon Ho Khang ,  Kyung Seop Kim ,  Byeong-Beom Kim ,  Joon Yong Park

IPC: H01L29/786 ,  H01L29/51 ,  H01L29/66

CPC classification number: H01L29/78606 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518 ,  H01L29/66969 ,  H01L29/7869

Abstract: A thin film transistor includes: a substrate; an oxide semiconductor layer disposed on the substrate; a source electrode and a drain electrode each connected to the oxide semiconductor layer and facing each other with respect to the oxide semiconductor layer; an insulating layer disposed on the oxide semiconductor layer; and a gate electrode disposed on the insulating layer. The insulating layer includes a first layer that includes silicon oxide (SiOx), a second layer that is a hydrogen blocking layer, and a third layer that includes silicon nitride (SiNx). The first, second and third layers are sequentially stacked.

Abstract translation: 薄膜晶体管包括：基板; 设置在所述基板上的氧化物半导体层; 源电极和漏电极，各自连接到氧化物半导体层并且相对于氧化物半导体层彼此面对; 设置在所述氧化物半导体层上的绝缘层; 以及设置在所述绝缘层上的栅电极。 绝缘层包括包含氧化硅（SiOx）的第一层，作为氢阻挡层的第二层和包括氮化硅（SiNx）的第三层。 顺序堆叠第一层，第二层和第三层。

公开(公告)号：US20150069399A1

公开(公告)日：2015-03-12

申请号：US14249329

申请日：2014-04-09

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Seung-Hwan Cho ,  Young Ki Shin ,  Dong Hwan Shim ,  Yoon Ho Khang ,  Hyun Jae Na

IPC: H01L29/786 ,  H01L29/66

CPC classification number: H01L29/7869 ,  H01L29/66969 ,  H01L29/78696

Abstract: A thin film transistor includes: a first semiconductor layer; a second semiconductor layer disposed on the first semiconductor layer; and a pair of source region and drain region formed by doping both sides of the first semiconductor layer and the second semiconductor layer with impurities, and the source region includes a first source layer on the same plane as the first semiconductor layer and a second source layer on the same plane as the second semiconductor layer, and the drain region includes a first drain layer on the same plane as the first semiconductor layer and a second drain layer on the same plane as the second semiconductor layer, and only one of the first semiconductor layer and the second semiconductor layer is a transistor channel layer.

Abstract translation: 薄膜晶体管包括：第一半导体层; 设置在所述第一半导体层上的第二半导体层; 以及通过用杂质掺杂第一半导体层和第二半导体层的两侧而形成的一对源区和漏区，源极区包括与第一半导体层在同一平面上的第一源极层和第二源极层 在与第二半导体层相同的平面上，漏区包括与第一半导体层相同的平面上的第一漏极层和与第二半导体层在同一平面上的第二漏极层，并且仅第一半导体 层，第二半导体层是晶体管沟道层。