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11.发明授权公开(公告)号：US11669395B2
公开(公告)日：2023-06-06
申请号：US17499499
申请日：2021-10-12
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Dong-Min Shin , Hong-Rak Son
CPC classification number: G06F11/1068 , G06F7/58 , G06F13/1668 , G11C11/409 , G11C29/52 , H03M13/095 , H03M13/1105
Abstract: A memory system includes; a memory device, a memory controller including a first interface, a second interface, and a first data processor having a first error correction code (ECC) engine, and a field programmable gate array (FPGA) including a third interface connected to the first interface, a fourth interface connected to the second interface, a fifth interface connected to an external host, and a second data processor having a second ECC engine. The memory controller may configure a normal write operation path or highly reliable write operation path.
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公开(公告)号：US09819361B2
公开(公告)日：2017-11-14
申请号：US14645073
申请日：2015-03-11
Applicant: Samsung Electronics Co., Ltd.
Inventor： Dong-Min Shin , Jun-jin Kong , Ki-Jun Lee , Myung-Kyu Lee , Kyeong-Cheol Yang , Seung-Chan Lim
CPC classification number: H03M13/13 , H03M13/134
Abstract: A list decoding method for a polar code includes generating a tree-type decoding graph for input codeword symbols; the generating a tree-type decoding graph including, generating a decoding path list to which a decoding edge is added based on a reliability of a decoding path, the decoding path list being generated such that, among decoding paths generated based on the decoding edge, decoding paths within a threshold number of critical paths survive within the decoding path list in an order of high likelihood probability, and determining an estimation value, which corresponds to a decoding path having a maximum likelihood probability from among decoding paths of the decoding path list, as an information word.
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13.发明授权Method of estimating deterioration state of memory device and related method of wear leveling 有权估计存储器件劣化状态的方法及相关的磨损均衡方法公开(公告)号：US09324420B2
公开(公告)日：2016-04-26
申请号：US14446347
申请日：2014-07-30
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Beom-Kyu Shin , Ung-Hwan Kim , Jun-Jin Kong , Eun-Cheol Kim , Dong-Min Shin , Myung-Kyu Lee
CPC classification number: G11C11/5642 , G06F12/00 , G11C16/0483 , G11C16/26 , G11C16/3495
Abstract: A method of estimating a deterioration state of a memory device comprises reading data from selected memory cells connected to a selected wordline of a memory cell array by applying to the selected wordline a plurality of distinct read voltages having values corresponding to at least one valley of threshold voltage distributions of the selected memory cells, generating quality estimation information indicating states of the threshold voltage distributions using the data read from the selected memory cells, and determining a deterioration state of a storage area including the selected memory cells based on the generated quality estimation information.
Abstract translation: 一种估计存储器件劣化状态的方法包括通过向所选择的字线应用具有对应于至少一个阈值谷值的多个不同读取电压来从连接到存储器单元阵列的选定字线的选定存储单元读取数据 选择的存储单元的电压分布，使用从选择的存储单元读取的数据生成指示阈值电压分布的状态的质量估计信息，并且基于生成的质量估计信息来确定包括所选存储单元的存储区域的劣化状态 。
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公开(公告)号：US11675530B2
公开(公告)日：2023-06-13
申请号：US17237136
申请日：2021-04-22
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Wi Jik Lee , Dong-Min Shin , Young Jun Hwang , Hong Rak Son
CPC classification number: G06F3/0655 , G06F3/0604 , G06F3/0679
Abstract: Provided is an operating method of a memory controller which comprises receiving first decision data of M bits from a memory device, where M is a natural number; converting the M-bit first decision data into second decision data of N bits, where N is a natural number less than M; and attempting a first decoding using the second decision data.
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Patent Agency Ranking
公开(公告)号：US11216338B2
公开(公告)日：2022-01-04
申请号：US16835721
申请日：2020-03-31
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Youngjun Hwang , Dong-Min Shin , Changkyu Seol , Jaeyong Son , Hong Rak Son
Abstract: A storage device includes a nonvolatile memory device that includes a plurality of pages, each of which includes a plurality of memory cells, and a controller that receives first write data expressed by 2m states (m being an integer greater than 1) from an external host device. The controller in a first operating mode shapes the first write data to second write data, which are expressed by “k” states (k being an integer greater than 2) smaller in number than the 2m states, performs first error correction encoding on the second write data to generate third write data expressed by the “k” states, and transmits the third write data to the nonvolatile memory device for writing at a selected page from the plurality of pages.
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公开(公告)号：US11031957B2
公开(公告)日：2021-06-08
申请号：US15956960
申请日：2018-04-19
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Jae Hun Jang , Dong-Min Shin , Heon Hwa Cheong , Jun Jin Kong , Hong Rak Son , Se Jin Lim
Abstract: A decoder including a main memory, a flag memory and a decoding logic is provided. The flag memory is configured to store flag data and the decoding logic configured to perform an iteration. Further, the decoding logic is configured to: perform an ith operation using first data, wherein i is a natural number, flag-encode second data that is results obtained by performing the ith operation on the first data, store results obtained by performing the flag encoding on the second data in the flag memory as first flag data if the flag encoding succeeds, and store predetermined second flag data that is different from the first flag data of the second data in the flag memory if the flag encoding fails.
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公开(公告)号：US10374630B2
公开(公告)日：2019-08-06
申请号：US15652260
申请日：2017-07-18
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Jiyoup Kim , Dong-Min Shin , Beomkyu Shin , Junjin Kong , Hong Rak Son
Abstract: A low-density parity check (LDPC) decoder may include a variable node processing unit and a check node processing unit. The check node processing unit includes memory elements storing a check node value. The memory elements are interconnected through two or more paths, and each of the paths may include a total or partial cyclic permutation of the memory elements to transmit the check node value.
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18.发明授权Controllers that generate output bits for storage in non-volatile memory devices by puncturing code word bits and methods for operating the same 有权通过对代码字位进行删截而产生用于存储在非易失性存储器件中的输出位的控制器和用于操作它们的方法公开(公告)号：US09239778B2
公开(公告)日：2016-01-19
申请号：US14054964
申请日：2013-10-16
Applicant: Samsung Electronics Co., Ltd.
Inventor： Kijun Lee , Junjin Kong , Dong-Min Shin , Kyeongcheol Yang , Seung-Chan Lim
CPC classification number: G06F12/00 , H03M13/1111 , H03M13/1191 , H03M13/13 , H03M13/6362 , H04L1/0009
Abstract: An operating method of a controller includes selecting bits of code word to be punctured; detecting locations of incapable bits of an input word based on locations of the bits to be punctured and a structure of a generation matrix calculation unit; refreezing the input word such that frozen bits and incapable bits of the input word overlap; generating input word bits by replacing information word bits with frozen bits based on the refreezing result; generating the code word by performing generation matrix calculation on the input word bits; generating output bits by puncturing the code word based on locations of the bits to be punctured; and transmitting the output bits to a nonvolatile memory device.
Abstract translation: 控制器的操作方法包括选择要被穿孔的代码字的位; 基于要被删截的位的位置检测输入字的不能位的位置和生成矩阵计算单元的结构; 重新冻结输入字，使得输入字的冻结位和无效位重叠; 通过基于重新冻结结果将具有冻结位的信息字位替换来产生输入字位; 通过对输入字位执行生成矩阵计算来生成码字; 通过基于要被穿孔的比特的位置来对码字进行删截来产生输出比特; 并将输出比特发送到非易失性存储器件。
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19.发明授权Operating method of controller controlling nonvolatile memory device and mapping pattern selecting method of selecting mapping pattern mapping polar coded code word with multi bit data of nonvolatile memory device 有权非易失性存储器件的控制器控制操作方法和选择映射模式映射的映射模式选择方法极性编码码字与非易失性存储器件的多位数据公开(公告)号：US09164835B2
公开(公告)日：2015-10-20
申请号：US13801297
申请日：2013-03-13
Inventor： Kijun Lee , Dong-Min Shin , Kyeongcheol Yang , Seung-Chan Lim , Junjin Kong , Myungkyu Lee
CPC classification number: G06F11/1068 , G06F11/1072 , G11C7/1006 , G11C11/5628 , G11C16/0483 , G11C29/56004 , G11C29/56008 , G11C2211/5641 , H03M13/13
Abstract: An operating method of a nonvolatile memory device controller includes generating a code word through polar encoding of information bits, reading a mapping pattern, generating a repeated mapping pattern through iteration of the mapping pattern, and mapping each bit of the code word onto a specific bit of multi-bit data of the nonvolatile memory device, based upon the repeated mapping pattern.
Abstract translation: 非易失性存储器件控制器的操作方法包括通过信息位的极性编码产生代码字，读取映射模式，通过迭代映射模式生成重复映射模式，并将代码字的每一位映射到特定位 的非易失性存储器件的多位数据。
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