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    Integrated circuit device
    14.
    发明授权
    Integrated circuit device 有权

    公开(公告)号：US11631674B2

    公开(公告)日：2023-04-18

    申请号：US17231114

    申请日：2021-04-15

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Minhee Choi ,  Keunhwi Cho ,  Myunggil Kang ,  Seokhoon Kim ,  Dongwon Kim ,  Pankwi Park ,  Dongsuk Shin

    IPC: H01L27/092 ,  H01L29/06 ,  H01L29/66 ,  H01L29/78

    Abstract: An integrated circuit device includes a fin-type active area along a first horizontal direction on a substrate, a device isolation layer on opposite sidewalls of the fin-type active area, a gate structure along a second horizontal direction crossing the first horizontal direction, the gate structure being on the fin-type active area and on the device isolation layer, and a source/drain area on the fin-type active area, the source/drain area being adjacent to the gate structure, and including an outer blocking layer, an inner blocking layer, and a main body layer sequentially stacked on the fin-type active area, and each of the outer blocking layer and the main body layer including a Si1-xGex layer, where x≠0, and the inner blocking layer including a Si layer.

    SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME
    17.
    发明申请
    SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME 有权

    公开(公告)号：US20250015157A1

    公开(公告)日：2025-01-09

    申请号：US18599943

    申请日：2024-03-08

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Beomjin Park ,  Myung Gil Kang ,  Dongwon Kim ,  Younggwon Kim ,  Jongsu Kim ,  Hyumin Yoo ,  Soojin Jeong

    IPC: H01L29/423 ,  H01L27/088 ,  H01L29/06 ,  H01L29/417 ,  H01L29/775 ,  H01L29/786

    Abstract: The present disclosure relates to semiconductor devices and their fabrication methods. An example semiconductor device comprises a substrate including an active pattern, a channel pattern including semiconductor patterns, a source/drain pattern connected to the semiconductor patterns, an inner gate electrode between two neighboring semiconductor patterns, an inner gate dielectric layer, and an inner high-k dielectric layer between the inner gate electrode and the inner gate dielectric layer. The inner gate dielectric layer includes an upper dielectric layer, a lower dielectric layer, and an inner spacer. A first thickness of the inner spacer is greater than a second thickness of the upper or lower dielectric layer. The first thickness is greater than a third thickness of the inner high-k dielectric layer.

    Semiconductor devices
    18.
    发明授权
    Semiconductor devices 有权

    公开(公告)号：US11855165B2

    公开(公告)日：2023-12-26

    申请号：US18051034

    申请日：2022-10-31

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Keun Hwi Cho ,  Soonmoon Jung ,  Dongwon Kim ,  Myung Gil Kang

    IPC: H01L29/423 ,  H01L23/528 ,  H01L27/092 ,  H01L29/417

    CPC classification number: H01L29/42356 ,  H01L23/5286 ,  H01L27/092 ,  H01L29/41775 ,  H01L29/42376

    Abstract: Semiconductor devices and methods of forming the same are disclosed. The semiconductor devices may include a substrate including a first region and a second region, which are spaced apart from each other with a device isolation layer interposed therebetween, a first gate electrode and a second gate electrode on the first and second regions, respectively, an insulating separation pattern separating the first gate electrode and the second gate electrode from each other and extending in a second direction that traverses the first direction, a connection structure electrically connecting the first gate electrode to the second gate electrode, and a first signal line electrically connected to the connection structure. The first and second gate electrodes are extended in a first direction and are aligned to each other in the first direction. The first signal line may extend in the second direction and may vertically overlap the insulating separation pattern.

    SEMICONDUCTOR DEVICES
    19.
    发明申请
    SEMICONDUCTOR DEVICES 有权

    公开(公告)号：US20220406919A1

    公开(公告)日：2022-12-22

    申请号：US17575856

    申请日：2022-01-14

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Beomjin PARK ,  Myunggil Kang ,  Dongwon Kim ,  Keunhwi Cho

    IPC: H01L29/66 ,  H01L29/78

    Abstract: A semiconductor device includes: an active region extending on a substrate in a first direction; a plurality of semiconductor layers spaced apart from each other vertically on the active region, including a lower semiconductor layer and an uppermost semiconductor layer disposed above the lower semiconductor layer and having a thickness greater than that of the lower semiconductor layer; a gate structure extending on the substrate in a second direction, perpendicular to the first direction, and including a gate electrode at least partially surrounding each of the plurality of semiconductor layers; a spacer structure disposed on both sidewalls of the gate structure; and source/drain regions disposed on the active region on both sides of the gate structure and contacting the plurality of semiconductor layers.

    Semiconductor devices
    20.
    发明授权
    Semiconductor devices 有权

    公开(公告)号：US11489055B2

    公开(公告)日：2022-11-01

    申请号：US17192959

    申请日：2021-03-05

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Keun Hwi Cho ,  Soonmoon Jung ,  Dongwon Kim ,  Myung Gil Kang

    IPC: H01L29/423 ,  H01L27/092 ,  H01L23/528 ,  H01L29/417

    Abstract: Semiconductor devices and methods of forming the same are disclosed. The semiconductor devices may include a substrate including a first region and a second region, which are spaced apart from each other with a device isolation layer interposed therebetween, a first gate electrode and a second gate electrode on the first and second regions, respectively, an insulating separation pattern separating the first gate electrode and the second gate electrode from each other and extending in a second direction that traverses the first direction, a connection structure electrically connecting the first gate electrode to the second gate electrode, and a first signal line electrically connected to the connection structure. The first and second gate electrodes are extended in a first direction and are aligned to each other in the first direction. The first signal line may extend in the second direction and may vertically overlap the insulating separation pattern.

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