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11.发明申请公开(公告)号：US20180175024A1
公开(公告)日：2018-06-21
申请号：US15686795
申请日：2017-08-25
Applicant: Samsung Electronics Co., Ltd.
Inventor： Jung-ho DO , Sang-hoon Baek , Tae-joong Song , Jong-hoon Jung , Seung-young Lee
IPC: H01L27/088 , H01L23/528 , H01L29/78 , H01L27/07 , H01L27/02 , H01L29/417 , H01L23/522
CPC classification number: H01L27/088 , H01L21/823487 , H01L21/823885 , H01L23/5226 , H01L23/528 , H01L27/0207 , H01L27/0705 , H01L27/092 , H01L29/0847 , H01L29/1037 , H01L29/41741 , H01L29/7827
Abstract: An integrated circuit having a vertical transistor includes first through fourth gate lines extending in a first direction and sequentially arranged in parallel with each other, a first top active region over the first through third gate lines and insulated from the second gate line, and a second top active region. The first top active region forms first and third transistors with the first and third gate lines respectively. The second top active region is over the second through fourth gate lines and insulated from the third gate line. The second top active region forms second and fourth transistors with the second and fourth gate lines respectively.
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公开(公告)号：US09733515B2
公开(公告)日：2017-08-15
申请号：US14935587
申请日：2015-11-09
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Kyung-hoon Cha , Seung-jun Jeong , Jong-hoon Jung
IPC: G02F1/1335
CPC classification number: G02F1/133603 , G02F2001/133601
Abstract: A backlight unit is provided. The backlight unit includes: a first surface light source array; a second surface light source array disposed on an upper portion of the first surface light source array and arranged such that a light emitting surface of the second surface light source array is parallel with a light emitting surface of the first surface light source array; and a reflection plate disposed on a lower portion of the first surface light source array and arranged such that a reflective surface of the reflection plate is parallel with the light emitting surface of the first surface light source array, wherein the second surface light source array is stacked on the first surface light source array such that the first and second surface light source arrays are offset from each other in a plane parallel to the light emitting surfaces.
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公开(公告)号：US11239151B2
公开(公告)日：2022-02-01
申请号：US16886020
申请日：2020-05-28
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： In-gyum Kim , Ha-young Kim , Tae-joong Song , Jong-hoon Jung , Gi-young Yang , Jin-young Lim
IPC: H01L23/50 , H01L29/788 , H01L23/528 , H01L27/02 , H01L27/118 , H01L23/498
Abstract: A standard cell of an IC includes a cell area including a transistor configured to determine a function of the standard cell; a first dummy area and a second dummy area respectively adjacent to two sides of the cell area in a first direction; and an active area extending in the first direction across the cell area, the first dummy area, and the second dummy area. The active area includes a first active area and a second active area spaced apart from each other in a second direction perpendicular to the first direction and extend parallel to each other in the first direction. At least one of the first active area and the second active area provided in the first dummy area is biased, and at least one of the first active area and the second active area provided in the second dummy area is biased.
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14.发明授权公开(公告)号：US11164863B2
公开(公告)日：2021-11-02
申请号：US16732670
申请日：2020-01-02
Applicant: Samsung Electronics Co., Ltd.
Inventor： Jung-ho Do , Sang-hoon Baek , Tae-joong Song , Jong-hoon Jung , Seung-young Lee
IPC: H01L27/088 , H01L23/528 , H01L29/78 , H01L27/07 , H01L27/02 , H01L29/417 , H01L23/522 , H01L27/092 , H01L29/08 , H01L29/10 , H01L21/8238 , H01L21/8234
Abstract: An integrated circuit having a vertical transistor includes first through fourth gate lines extending in a first direction and sequentially arranged in parallel with each other, a first top active region over the first through third gate lines and insulated from the second gate line, and a second top active region. The first top active region forms first and third transistors with the first and third gate lines respectively. The second top active region is over the second through fourth gate lines and insulated from the third gate line. The second top active region forms second and fourth transistors with the second and fourth gate lines respectively.
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公开(公告)号：US11152392B2
公开(公告)日：2021-10-19
申请号：US17034602
申请日：2020-09-28
Applicant: Samsung Electronics Co., Ltd.
Inventor： Jung-ho Do , Ji-Su Yu , Hyeon-gyu You , Seung-Young Lee , Jae-boong Lee , Jong-hoon Jung
IPC: H01L23/52 , H01L27/118 , H01L27/02
Abstract: An integrated circuit includes a standard cell. The standard cell may include a plurality of gate lines and a plurality of first wirings. The plurality of first wirings may include a clubfoot structure conductive pattern that includes a first conductive pattern and a second conductive pattern spaced apart from each other. Each of the first conductive pattern and the second conductive pattern may include a first line pattern extending in a first direction and a second line pattern protruding from one end of the first line pattern in a direction perpendicular to the first direction. The plurality of gate lines may be spaced apart from each other by a first pitch in the first direction, and the plurality of second wirings may be spaced apart from each other by a second pitch in the first direction. The first pitch may be greater than the second pitch.
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Patent Agency Ranking
公开(公告)号：US10354947B2
公开(公告)日：2019-07-16
申请号：US15871206
申请日：2018-01-15
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： In-gyum Kim , Ha-young Kim , Tae-joong Song , Jong-hoon Jung , Gi-young Yang , Jin-young Lim
IPC: H01L23/50 , H01L29/788 , H01L23/528 , H01L27/02 , H01L27/118 , H01L23/498
Abstract: An integrated circuit (IC) may include a plurality of standard cells. At least one standard cell of the plurality of standard cells may include a power rail configured to supply power to the at least one standard cell, the power rail extending in a first direction, a cell area including at least one transistor configured to determine a function of the at least one standard cell, a first dummy area and a second dummy area respectively adjacent to two sides of the cell area in the first direction, and an active area extending in the first direction across the cell area, the first dummy area, and the second dummy area. A region of the active area, which is included in the first dummy area or the second dummy area, is electrically connected to the power rail.
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公开(公告)号：US10211384B2
公开(公告)日：2019-02-19
申请号：US15364806
申请日：2016-11-30
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Jong-hoon Jung , Dae-sik Kim
Abstract: An LED apparatus is provided. The LED apparatus includes a plurality of substrate layers, each substrate layer corresponding to one of a plurality of sub-pixels of a pixel; a heat sink plate provided on a first side of each substrate layer, the heat sink plate including a patterned area provided between adjacent substrate layers of the plurality of substrates layers; a fluorescence provided on the heat sink plate overlapping at least a portion of one of the plurality of substrate layers; and a plurality of light emitting diodes, each light emitting diode formed on a second side opposite to the first side of each substrate layer.
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公开(公告)号：US09542896B2
公开(公告)日：2017-01-10
申请号：US14589286
申请日：2015-01-05
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Jong-hoon Jung , Seong-woo Cho , Dae-sik Kim
CPC classification number: G09G3/3607 , G09G3/3413 , G09G2310/0235 , G09G2320/0242 , G09G2320/064 , G09G2340/0407 , G09G2340/06
Abstract: A control method of a display apparatus including a panel configured to include red (R), green (G), and white (W) subpixels, and a backlight configured to provide the panel with backlight using at least one of a white light source and a blue light source, including: converting image data into R, G, and blue (B) subframe data; turning on the R, G, and W subpixels according to the R, G, and B subframe data; and turning on the W subpixel, setting a brightness of the white light source to a brightness value of the R, G, and B subframe data, providing the panel with white light at the set brightness, turning on subpixels corresponding to remaining subframe data, setting at least one of the brightness of the white light source and a brightness of the blue light source, and providing the panel with light at the set brightnesses, is provided.
Abstract translation: 一种显示装置的控制方法，包括被配置为包括红（R），绿（G）和白（W）子像素的面板的显示装置，以及配置为使面板向背光提供背光的背光，该背光使用白光源和 蓝光源，包括：将图像数据转换为R，G和蓝（B）子帧数据; 根据R，G和B子帧数据打开R，G和W子像素; 并且打开W子像素，将白光源的亮度设置为R，G和B子帧数据的亮度值，为面板提供设定亮度的白光，打开与剩余子帧数据对应的子像素， 设置白光源的亮度和蓝光源的亮度中的至少一个，以及为设置亮度的光提供面板。
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公开(公告)号：US11042686B2
公开(公告)日：2021-06-22
申请号：US16750501
申请日：2020-01-23
Applicant: Samsung Electronics Co., Ltd.
Inventor： Jung-ho Do , Jong-hoon Jung , Ji-Su Yu , Seung-young Lee , Tae-joong Song , Jae-boong Lee
IPC: G06F30/398 , H01L27/02 , H01L27/118 , G06F30/392
Abstract: Provided is an integrated circuit including a plurality of standard cells each including a front-end-of-line (FEOL) region and a back-end-of-line (BEOL) region on the FEOL region, the FEOL region including at least one gate line extending in a first horizontal direction. A BEOL region of a first standard cell among the plurality of standard cells includes an eaves section not overlapping an FEOL region of the first standard cell in a vertical direction, the eaves section protruding in a second horizontal direction perpendicular to the first horizontal direction.
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公开(公告)号：US10804257B2
公开(公告)日：2020-10-13
申请号：US16685471
申请日：2019-11-15
Applicant: Samsung Electronics Co., Ltd.
Inventor： Seung-young Lee , Jong-hoon Jung , Myoung-ho Kang , Jung-ho Do
IPC: H01L27/02 , G11C11/419 , G11C11/40 , H01L23/528 , H01L27/105 , H01L27/118 , G11C5/14 , G11C7/18
Abstract: In one embodiment, the standard cell includes first and second active regions defining an intermediate region between the first and second active regions; and first, second and third gate lines crossing the first and second active regions and crossing the intermediate region. The first gate line is divided into an upper first gate line and a lower first gate line by a first gap insulating layer in the intermediate region, the second gate line is undivided, and the third gate line is divided into an upper third gate line and a lower third gate line by a second gap insulating layer in the intermediate region.
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