公开(公告)号：US20230307545A1

公开(公告)日：2023-09-28

申请号：US18204469

申请日：2023-06-01

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sung Uk JANG ,  Young Dae CHO ,  Ki Hwan KIM ,  Su Jin JUNG

IPC: H01L29/78 ,  H01L29/08 ,  H01L29/786 ,  H01L29/423

CPC classification number: H01L29/7851 ,  H01L29/0847 ,  H01L29/78696 ,  H01L29/42392

Abstract: A semiconductor device includes an active region extending in a first direction on a substrate, channel layers on the active region and spaced apart vertically, a gate structure intersecting the active region and the channel layers, the gate structure extending in a second direction and surrounding the channel layers, and a source/drain region on the active region at a side of the gate structure, the source/drain region contacting the channel layers, the source/drain region including first epitaxial layers having a first composition and including first layers on side surfaces of the channel layers and a second layer on the active region at a lower end of the source/drain region, and a second epitaxial layer having a second composition different from the first composition, the second epitaxial layer being between the first epitaxial layers in the first direction and being between the first epitaxial layers vertically in a third direction.

公开(公告)号：US20180366583A1

公开(公告)日：2018-12-20

申请号：US16111854

申请日：2018-08-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ki Hwan KIM ,  Gigwan PARK ,  Junggun YOU ,  DongSuk SHIN ,  Jin-Wook KIM

IPC: H01L29/78 ,  H01L29/66 ,  H01L29/08 ,  H01L23/535 ,  H01L21/8238 ,  H01L29/06 ,  H01L29/165 ,  H01L27/092 ,  H01L27/11 ,  H01L29/161 ,  H01L29/16

CPC classification number: H01L29/7848 ,  H01L21/823814 ,  H01L21/823821 ,  H01L21/823871 ,  H01L21/823878 ,  H01L21/845 ,  H01L23/535 ,  H01L27/0924 ,  H01L27/1104 ,  H01L27/1116 ,  H01L27/1211 ,  H01L29/0653 ,  H01L29/0847 ,  H01L29/1608 ,  H01L29/161 ,  H01L29/165 ,  H01L29/66545 ,  H01L29/66636

Abstract: A semiconductor device includes first and second active patterns protruding upward from a substrate, a gate electrode crossing the first and second active patterns and extending in a first direction, a first source/drain region on the first active pattern and on at least one side of the gate electrode, and a second source/drain region on the second active pattern and on at least one side of the gate electrode. The first and second source/drain regions have a conductivity type different from each other, and the second source/drain region has a bottom surface in contact with a top surface of the second active pattern and at a lower level than that of a bottom surface of the first source/drain region in contact with a top surface of the first active pattern. The first active pattern has a first width smaller than a second width of the second active pattern.

公开(公告)号：US20170117411A1

公开(公告)日：2017-04-27

申请号：US15288080

申请日：2016-10-07

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ki Hwan KIM ,  Gigwan PARK ,  Junggun YOU ,  DongSuk SHIN ,  Jin-Wook KIM

IPC: H01L29/78 ,  H01L29/16 ,  H01L29/161 ,  H01L29/165 ,  H01L23/535 ,  H01L29/06 ,  H01L27/11 ,  H01L21/8238 ,  H01L29/66 ,  H01L29/08 ,  H01L27/092

CPC classification number: H01L29/7848 ,  H01L21/823814 ,  H01L21/823821 ,  H01L21/823871 ,  H01L21/823878 ,  H01L23/535 ,  H01L27/0924 ,  H01L27/1104 ,  H01L27/1116 ,  H01L29/0653 ,  H01L29/0847 ,  H01L29/1608 ,  H01L29/161 ,  H01L29/165 ,  H01L29/66545 ,  H01L29/66636

Abstract: A semiconductor device includes first and second active patterns protruding upward from a substrate, a gate electrode crossing the first and second active patterns and extending in a first direction, a first source/drain region on the first active pattern and on at least one side of the gate electrode, and a second source/drain region on the second active pattern and on at least one side of the gate electrode. The first and second source/drain regions have a conductivity type different from each other, and the second source/drain region has a bottom surface in contact with a top surface of the second active pattern and at a lower level than that of a bottom surface of the first source/drain region in contact with a top surface of the first active pattern. The first active pattern has a first width smaller than a second width of the second active pattern.

公开(公告)号：US20250048699A1

公开(公告)日：2025-02-06

申请号：US18607960

申请日：2024-03-18

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ki Hwan KIM ,  Unki KIM ,  Chanyoung KIM ,  Jeongho YOO ,  Ingyu JANG ,  Sujin JUNG

IPC: H01L29/10 ,  H01L29/08 ,  H01L29/423

Abstract: A semiconductor device includes a substrate including an active pattern, a channel pattern and a source/drain pattern on the active pattern wherein the channel pattern includes semiconductor patterns vertically stacked and spaced apart from each other, the plurality of semiconductor patterns including a first semiconductor pattern and a neighboring second semiconductor pattern, and a gate electrode on the semiconductor patterns. The gate electrode includes an inner electrode between the first and second semiconductor patterns. The source/drain pattern includes a buffer layer and a main layer on the buffer layer. An indent region is defined in a vertical cross section of the device by the main layer, the first and second semiconductor patterns, and the inner electrode. The buffer layer is in the indent region. The buffer layer does not extend onto sidewalls of the first and second semiconductor patterns.

公开(公告)号：US20230037672A1

公开(公告)日：2023-02-09

申请号：US17692369

申请日：2022-03-11

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Ki Hwan KIM ,  Jeong Ho YOO ,  Cho Eun LEE ,  Yong Uk JEON ,  Young Dae CHO

IPC: H01L29/786 ,  H01L29/66 ,  H01L29/417

Abstract: A semiconductor includes an active pattern with a lower pattern and sheet patterns spaced apart from the lower pattern in a first direction, a source/drain pattern on the lower pattern, the source/drain pattern being in contact with the sheet patterns, and gate structures on opposite sides of the source/drain pattern, the gate structures being spaced apart from each other along a second direction and including gate electrodes that surround the sheet patterns, wherein the source/drain pattern includes a first epitaxial region having at least one of antimony and bismuth, the first epitaxial region having a bottom part in contact with the lower pattern, but not with the sheet patterns, and a thickness of the bottom part increasing and decreasing away from the gate structures in the second direction, and a second epitaxial region on the first epitaxial region, the second epitaxial region including phosphorus.

公开(公告)号：US20200219976A1

公开(公告)日：2020-07-09

申请号：US16666958

申请日：2019-10-29

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ki Hwan KIM ,  Sunguk Jang ,  Pankwi Park ,  Sangmoon Lee ,  Sujin Jung

IPC: H01L29/08 ,  H01L29/66 ,  H01L29/78

Abstract: A semiconductor device including an active fin that protrudes from a substrate and forms a plurality of recess regions spaced apart from each other, a gate pattern between the plurality of recess regions that covers a lateral surface and a top surface of the active fin, a plurality of source/drain patterns in the plurality of recess regions, and a diffusion reduction region adjacent to each of a plurality of bottoms of the plurality of recess regions and each of a plurality of sidewalls of the plurality of recess regions, the diffusion reduction region including a dopant having a lower diffusion coefficient than phosphorus (P).

公开(公告)号：US20170162576A1

公开(公告)日：2017-06-08

申请号：US15368723

申请日：2016-12-05

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ki Hwan KIM ,  Gi Gwan PARK ,  Jung Gun YOU ,  Dong Suk SHIN ,  Hyun Yul CHOI

IPC: H01L27/092 ,  H01L29/08 ,  H01L29/417 ,  H01L29/45 ,  H01L29/167 ,  H01L29/165 ,  H01L29/06 ,  H01L29/78 ,  H01L27/02

CPC classification number: H01L27/0924 ,  H01L21/823425 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/823821 ,  H01L21/845 ,  H01L27/0207 ,  H01L27/0886 ,  H01L27/092 ,  H01L27/1211 ,  H01L29/0649 ,  H01L29/0847 ,  H01L29/165 ,  H01L29/167 ,  H01L29/41766 ,  H01L29/41783 ,  H01L29/41791 ,  H01L29/456 ,  H01L29/78 ,  H01L29/7848 ,  H01L29/785

Abstract: A semiconductor device is provided. The semiconductor device includes a substrate comprising first and second regions, in the first region, first and second gate electrodes formed parallel to each other on the substrate, and being spaced apart from each other by a first distance, in the second region, third and fourth gate electrodes formed parallel to each other on the substrate, and being spaced apart from each other by a second distance which is greater than the first distance, in the first region, a first recess formed on the substrate between the first and second gate electrodes, in the second region, a second recess formed on the substrate between the third and fourth gate electrodes, a first epitaxial source/drain filling the first recess and a second epitaxial source/drain filling the second recess, wherein an uppermost portion of an upper surface of the first epitaxial source/drain is higher than an uppermost portion of an upper surface of the second epitaxial source/drain.